JPH08339903A - Chip resistor and manufacture thereof - Google Patents

Chip resistor and manufacture thereof

Info

Publication number
JPH08339903A
JPH08339903A JP8149998A JP14999896A JPH08339903A JP H08339903 A JPH08339903 A JP H08339903A JP 8149998 A JP8149998 A JP 8149998A JP 14999896 A JP14999896 A JP 14999896A JP H08339903 A JPH08339903 A JP H08339903A
Authority
JP
Japan
Prior art keywords
substrate
electrode
resistor
electrodes
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8149998A
Other languages
Japanese (ja)
Other versions
JP2775718B2 (en
Inventor
Sunao Osato
直 大郷
Kouji Azuma
絋二 東
Mitsuru Yokoyama
充 横山
Yozo Obara
陽三 小原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hokuriku Electric Industry Co Ltd
Original Assignee
Hokuriku Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hokuriku Electric Industry Co Ltd filed Critical Hokuriku Electric Industry Co Ltd
Priority to JP8149998A priority Critical patent/JP2775718B2/en
Publication of JPH08339903A publication Critical patent/JPH08339903A/en
Application granted granted Critical
Publication of JP2775718B2 publication Critical patent/JP2775718B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE: To provide a chip resistor and the manufacturing method thereof, wherein soldering strength is high, the area of the soldering part is small, the mounting density on a circuit board can be increased, the quality is high and the manufacturing is easy. CONSTITUTION: Metal-glaze-based first electrodes 6, which are directly connected to resistor 3, are provided at both end parts of the surface of a substrate 2 of an insulator. Metal-glaze-based second electrodes are provided on the rear surface of the substrate at the opposite side with the substrate 2 in-between with respect to the first electrodes under the state, wherein the electrodes are protruding from the rear surface of the substrate. An Ag-resin-based third electrode 8 is provided which covers both edges of the substrate 2 and is in contact with the first and second electrodes. The third electrode covers the parts of the second electrodes from the side of the edge of the substrate 2 at the specified thickness. The second electrodes and the third electrode are formed so as to protrude stepwise in two stages toward the sides of both edges from the side of the central part of the rear surface of the substrate 2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】この発明は、チップ状の絶縁
基板の表面に抵抗体が設けられ、この基板の両端部に電
極が形成されたチップ抵抗器とその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip resistor in which a resistor is provided on the surface of a chip-shaped insulating substrate and electrodes are formed at both ends of the substrate, and a method for manufacturing the same.

【0002】[0002]

【従来の技術】従来、チップ抵抗器の電極の構造は、ガ
ラスをバインダに用いてAg−Pt等を成分とするいわ
ゆるメタルグレーズペーストを塗布し焼成して形成した
ものであった。又、特開昭61-210601号公報に
開示されているように、基板裏面にも電極を形成し、表
裏の電極を、導電性ペーストによって包含し加熱硬化さ
せて電極を形成したものもある。
2. Description of the Related Art Conventionally, the structure of the electrodes of a chip resistor has been formed by applying a so-called metal glaze paste containing Ag-Pt or the like as a component using glass as a binder and firing it. Further, as disclosed in Japanese Patent Laid-Open No. 61-210601, there is also one in which electrodes are formed on the back surface of the substrate and the electrodes on the front and back sides are contained in a conductive paste and cured by heating to form the electrodes.

【0003】[0003]

【発明が解決しようとする課題】上記従来の技術の場
合、チップ抵抗器を回路基板にハンダ付けした際に、チ
ップ抵抗器裏面の電極に接合したハンダが、その裏面電
極周囲を覆って広がるようにハンダ付けされ、場合によ
っては不必要にハンダが広がったり、他の電極や回路パ
ターンとハンダが接触したりする場合があった。しか
も、ハンダが裏面電極の周囲に広く付着していると、回
路基板の実装密度向上の妨げとなり、後の回路基板の反
り等により、広がったハンダ付け部の一部がチップ抵抗
器の裏面電極又は回路基板のランドから外れてしまう場
合もあった。
In the above-mentioned conventional technique, when the chip resistor is soldered to the circuit board, the solder joined to the electrode on the back surface of the chip resistor spreads around the back electrode. In some cases, the solder was unnecessarily spread, or the solder came into contact with other electrodes or circuit patterns in some cases. Moreover, if the solder is widely adhered around the back surface electrode, it hinders the improvement of the mounting density of the circuit board, and due to the warp of the circuit board or the like later, a part of the soldered part that has spread becomes a back surface electrode of the chip resistor. Alternatively, it may come off from the land of the circuit board.

【0004】さらに、チップ抵抗器の工程上、メタルグ
レーズペーストやガラスコート等、比較的高温での熱処
理が行なわれ、抵抗体等の劣化や他の形成部分に対する
悪影響があった。
Further, heat treatment at a relatively high temperature such as metal glaze paste or glass coating is performed in the process of the chip resistor, which has a bad influence on the deterioration of the resistor or the like and other parts to be formed.

【0005】この発明は、上記従来の問題点に鑑みてな
されたもので、ハンダ付け強度が高く、しかもハンダ付
け部の面積が小さく、回路基板への実装密度を上げるこ
とができ、高品質で製造も容易なチップ抵抗器とその製
造方法を提供することを目的とする。
The present invention has been made in view of the above problems of the prior art, and has a high soldering strength, a small area of a soldering portion, a high mounting density on a circuit board, and high quality. It is an object of the present invention to provide a chip resistor which can be easily manufactured and a manufacturing method thereof.

【0006】[0006]

【課題を解決するための手段】この発明は、絶縁体の基
板表面の両端部に抵抗体と直接に接続しているメタルグ
レーズ系の第1電極を設け、この第1電極とは基板をは
さんで反対側の基板裏面にもメタルグレーズ系の第2電
極をその基板裏面から突出した状態に設け、上記基板の
両端面を覆い上記第1,2電極に接触したAg−レジン
系の第3電極を設け、この第3電極は上記第2電極を上
記基板端面側から一部分所定の厚さで覆い、上記基板裏
面の中央部側から両端面側に向かって、上記第2電極と
上記第3電極が2段階に階段状に突出して形成されてい
るチップ抵抗器である。
According to the present invention, a metal glaze type first electrode directly connected to a resistor is provided at both ends of a substrate surface of an insulator, and the first electrode separates the substrate. On the other side of the backside of the substrate, a second metal-glaze electrode is provided so as to project from the backside of the substrate, and both ends of the substrate are covered to contact the first and second electrodes. An electrode is provided, and the third electrode partially covers the second electrode from the substrate end face side with a predetermined thickness, and the second electrode and the third electrode from the center side of the substrate back face toward both end faces. This is a chip resistor in which electrodes are formed in a two-step projecting shape.

【0007】上記第3電極はコ字状に形成され、上記基
板の端面から延びて上記第1,2電極に直接接触し、上
記第1,2電極を上記基板の端面側から所定の厚さで覆
い、上記基板裏面の中央部側から端面側に向かって上記
第2電極及び上記第3電極が階段状に突出して形成され
ているチップ抵抗器である。また上記抵抗体は、ガラス
コート及びレジンコートにより覆われ、外部に露出する
上記電極がメッキで覆われているものでる。
The third electrode is formed in a U shape, extends from the end face of the substrate and is in direct contact with the first and second electrodes, and the first and second electrodes have a predetermined thickness from the end face side of the substrate. And a second resistor and a third electrode protruding stepwise from the central portion side of the back surface of the substrate toward the end face side. The resistor is covered with a glass coat and a resin coat, and the electrode exposed to the outside is covered with plating.

【0008】またこの発明は、多数の分割溝が形成され
分割により多数のチップを得る絶縁性基板表面の個々の
チップ部の両端部に、メタルグレーズ系の第1電極を各
々形成し、この第1電極とは基板をはさんで反対側の基
板裏面にも基板裏面から突出した状態に各々メタルグレ
ーズ系の第2電極を形成し、上記各第1電極間に抵抗体
を形成し、上記基板を上記分割溝に沿って分割し、上記
基板の分割された両端面にAg−レジン系の導電性塗料
を塗布し、この導電性塗料がコ字状に形成されて上記第
1,2電極に接触するとともに上記第2電極の一部を上
記基板端面側から所定の厚さで覆った第3電極を形成
し、上記基板裏面の中央部側から端面側に向かって上記
第2電極及び上記第3電極を階段状に2段階に突出させ
て形成するチップ抵抗器の製造方法である。
Further, according to the present invention, a metal glaze type first electrode is formed on each end of each chip portion on the surface of an insulating substrate where a large number of dividing grooves are formed to obtain a large number of chips by division. A second electrode of a metal glaze type is formed on the back surface of the substrate opposite to the one electrode so as to project from the back surface of the substrate, and a resistor is formed between the first electrodes. Is divided along the dividing groove, and an Ag-resin-based conductive coating material is applied to the divided both end surfaces of the substrate, and the conductive coating material is formed in a U-shape to form the first and second electrodes. A third electrode is formed which is in contact with and covers a part of the second electrode from the substrate end face side with a predetermined thickness, and the third electrode and the third electrode are formed from the central portion of the back face of the substrate toward the end face side. A chip resistor formed by projecting three electrodes in two steps in a stepwise manner. Vessels is a method of manufacturing.

【0009】さらに、上記導電性塗料は上記基板端面に
直接塗布され、この第3電極形成後に、外部に露出した
上記第1,2,3電極をメッキで覆うチップ抵抗器の製
造方法である。さらに、上記抵抗体形成後その抵抗体表
面にガラスコートを施し、上記抵抗体の抵抗値を調整す
るトリミングを、上記メッキ後に行なうものである。ま
た、上記抵抗体表面にガラスコートを施した後、上記抵
抗体の抵抗値を調整するトリミングを行ない、上記抵抗
体を覆うレジンコートを形成し、この後上記基板を個々
のチップ部毎に分割するチップ抵抗器の製造方法であ
る。
Further, the conductive paint is directly applied to the end surface of the substrate, and after the formation of the third electrode, the exposed first, second and third electrodes are covered by plating. Furthermore, after forming the resistor, a glass coat is applied to the surface of the resistor, and trimming for adjusting the resistance value of the resistor is performed after the plating. Further, after applying a glass coat to the surface of the resistor, trimming is performed to adjust the resistance value of the resistor to form a resin coat covering the resistor, and then the substrate is divided into individual chip parts. It is a method of manufacturing a chip resistor.

【0010】この発明のチップ抵抗器とその製造方法
は、基板裏面の両端部に第2,3電極が階段状に突出し
て形成され、回路基板にこのチップ抵抗器を取り付けた
際には、第3電極が回路基板に接触し、第2電極が僅か
に回路基板から離間した状態となり、この回路基板と第
2電極との間に確実にハンダが侵入し、チップ抵抗器の
ハンダ付けが確実になるとともに、ハンダ付け領域が正
確に制限され、ハンダが不用意に広がらないものであ
る。
According to the chip resistor and the method of manufacturing the same of the present invention, the second and third electrodes are formed in a stepwise manner on both ends of the back surface of the substrate, and when the chip resistor is mounted on the circuit board, The three electrodes come into contact with the circuit board and the second electrode is slightly separated from the circuit board, and the solder surely enters between the circuit board and the second electrode, so that the soldering of the chip resistor is surely performed. In addition, the soldering area is accurately limited, and the solder does not spread unintentionally.

【0011】[0011]

【発明の実施の形態】以下、この発明の一実施形態につ
いて図面に基づいて説明する。この実施形態のチップ抵
抗器1は、図1に示すように、セラミックの基板2の表
面に凸型の抵抗体3が印刷形成され、この両端に電極4
が設けられている。抵抗体3は、酸化ルテニウムを約1
0μの厚みに設け、レーザー又はサンドブラストにより
凸型の底辺から上方に向かってトリミング溝5を形成
し、抵抗値のトリミングが成されている。
BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described below with reference to the drawings. In the chip resistor 1 of this embodiment, as shown in FIG. 1, a convex resistor 3 is formed by printing on the surface of a ceramic substrate 2, and electrodes 4 are formed on both ends of the resistor 3.
Is provided. The resistor 3 contains ruthenium oxide at about 1
The trimming groove 5 is formed to have a thickness of 0 μm, and the trimming groove 5 is formed upward from the bottom side of the convex shape by laser or sandblasting to trim the resistance value.

【0012】このチップ抵抗器1の電極4は、抵抗体3
の両端部が直接に接続している第1電極6と、この第1
電極6と基板2をはさんで対向して基板2の裏面側に突
出して形成された第2電極7を有し、この第1、第2電
極6,7は、Ag−Pd、Ag−Pt等のメタルグレー
ズペーストを印刷形成したものである。さらに、第1、
第2電極6,7の間の基板2の端面に、キシレン又はエ
ポキシフェノール樹脂にAgを混入したAg−レジン系
の導電性塗料のペーストによる第3電極8が設けられて
いる。この第3電極8は、第1、第2電極6,7を基板
2の端面側から一部所定の厚さで被覆するように設けら
れ、両者の導通を図っている。これにより、基板2の裏
面の中央部側から端面側に向かって、第2電極7及び第
3電極8が、2段階に階段状に突出するように形成され
ている。
The electrode 4 of the chip resistor 1 is a resistor 3
The first electrode 6 whose both ends are directly connected to each other, and
The second electrode 7 is formed so as to face the electrode 6 and the substrate 2 and to project to the back surface side of the substrate 2. The first and second electrodes 6 and 7 are Ag-Pd and Ag-Pt. It is formed by printing a metal glaze paste such as. In addition, the first,
On the end surface of the substrate 2 between the second electrodes 6 and 7, a third electrode 8 made of a paste of Ag-resin-based conductive paint in which Ag is mixed in xylene or epoxyphenol resin is provided. The third electrode 8 is provided so as to partially cover the first and second electrodes 6 and 7 from the end face side of the substrate 2 with a predetermined thickness, and achieves electrical continuity between them. As a result, the second electrode 7 and the third electrode 8 are formed so as to project in a stepwise manner in two steps from the central portion side of the back surface of the substrate 2 toward the end surface side.

【0013】そして、外部に露出するこの第1、第2、
第3電極6,7,8全体を覆って、Niメッキ9及びハ
ンダメッキ10が順次施され、ハンダメッキ10が施さ
れた後の基板2の裏面側の電極4の形状も、基板2の裏
面の中央部側から端面側に向かって階段状に突出して形
成されている。また、抵抗体3の表面には、ガラスコー
ト11及びレジンコート12が施され保護されている。
The first, second, and
Ni plating 9 and solder plating 10 are sequentially applied to cover the entire third electrodes 6, 7 and 8, and the shape of the electrode 4 on the back surface side of the substrate 2 after the solder plating 10 is applied is also the back surface of the substrate 2. Is formed so as to project in a stepwise manner from the central portion side toward the end face side. The surface of the resistor 3 is protected by a glass coat 11 and a resin coat 12.

【0014】次にこの実施形態のチップ抵抗器の製造方
法について、図3(A)ないし(F)に基づいて説明す
る。先ず、図3(A)に示すように、分割される大型の
基板であるセラミック板13の分割溝であるスリット1
4をはさんで所定間隔で、第1電極6となるメタルグレ
ーズペーストを複数列印刷し、900℃近い温度で焼成
する。さらに同様にして第2電極7も、セラミック板1
3の裏面に、第1電極6と対向する位置に形成する。次
に、図3(B)に示すように、第1電極6の間のセラミ
ック板13上にマトリクス状に多数の抵抗体3を印刷形
成し、平均850℃の温度で焼成する。そして、図3
(C)に示すように、抵抗体3の表面にガラスコート1
1を施し平均650℃の温度で焼成する。この後、セラ
ミック板13をスリット14に沿って分割し、図3
(D)に示すように、基板2の端面にAg−レジン系の
導電性塗料の第3電極8を約20μの厚みに塗布し、2
00℃程度の温度で硬化させる。そして図3(E)、
(F)に示すように、Niメッキ9、ハンダメッキ10
を各々順次施し、外部に露出した第1、第2、第3電極
6,7,8を被覆する。
Next, a method of manufacturing the chip resistor of this embodiment will be described with reference to FIGS. 3 (A) to 3 (F). First, as shown in FIG. 3A, a slit 1 which is a dividing groove of a ceramic plate 13 which is a large substrate to be divided.
A plurality of rows of the metal glaze paste to be the first electrodes 6 are printed at predetermined intervals with 4 sandwiched therebetween, and baked at a temperature close to 900 ° C. Further, similarly, the second electrode 7 is also connected to the ceramic plate 1
It is formed on the back surface of No. 3 at a position facing the first electrode 6. Next, as shown in FIG. 3 (B), a large number of resistors 3 are printed and formed in a matrix on the ceramic plate 13 between the first electrodes 6 and fired at a temperature of 850 ° C. on average. And FIG.
As shown in (C), the glass coat 1 is formed on the surface of the resistor 3.
1 and baked at an average temperature of 650 ° C. After this, the ceramic plate 13 is divided along the slits 14,
As shown in (D), the third electrode 8 of Ag-resin-based conductive paint is applied to the end surface of the substrate 2 to a thickness of about 20 μ, and 2
It is cured at a temperature of about 00 ° C. And FIG. 3 (E),
As shown in (F), Ni plating 9 and solder plating 10
Are sequentially applied to cover the first, second, and third electrodes 6, 7, and 8 exposed to the outside.

【0015】最後に、各チップ抵抗器の抵抗体3をトリ
ミングして抵抗値を調整する。又、抵抗体3の表面にエ
ポキシ樹脂等のレジンコート12を施し、200℃付近
の温度で硬化させる。
Finally, the resistor 3 of each chip resistor is trimmed to adjust the resistance value. Further, a resin coat 12 of epoxy resin or the like is applied to the surface of the resistor 3 and cured at a temperature near 200 ° C.

【0016】なお、トリミングは、図3(C)の状態で
行なうこともあり、この場合はその後レジンコート12
を施して図3(D)以下の工程を行なう。これによっ
て、セラミック板13をチップ毎に分離しない状態で抵
抗値のトリミングを行なうので効率良くトリミング作業
を行なうことができ、しかもレジンコート12によっ
て、後のメッキ作業時にも抵抗体に悪影響を与えること
もない。
The trimming may be performed in the state shown in FIG. 3C. In this case, the resin coat 12 is then used.
Then, the steps following FIG. 3D are performed. As a result, the resistance value is trimmed without separating the ceramic plate 13 into chips, so that the trimming work can be performed efficiently, and the resin coat 12 adversely affects the resistor during the subsequent plating work. Nor.

【0017】この実施形態のチップ抵抗器によれば、ハ
ンダ付けの際に回路基板との間で、第2電極7と回路基
板との間にハンダが侵入し、ハンダ付け領域が制限さ
れ、絶縁効果が高いとともに、回路基板に対する固着力
も極めて強いものである。又、はんだが第2電極の下方
に吸い付けられるので、電極間距離を短くすることがで
き、チップ抵抗器の小型化及び回路基板の高密度実装を
可能にするものである。さらには、この第2電極間の回
路基板表面に、回路パターンを通すことも可能であり、
ハンダの不要な広がりが防止されることによる実装密度
の向上効果は極めて大きい。
According to the chip resistor of this embodiment, when soldering, the solder penetrates between the second electrode 7 and the circuit board between the circuit board and the solder, the soldering area is limited, and insulation is achieved. The effect is high, and the adhesion to the circuit board is extremely strong. Further, since the solder is sucked below the second electrode, the distance between the electrodes can be shortened, and the chip resistor can be downsized and the circuit board can be mounted at a high density. Furthermore, it is also possible to pass a circuit pattern on the surface of the circuit board between the second electrodes,
The effect of improving the mounting density by preventing unnecessary spread of the solder is extremely large.

【0018】また、製造工程上、後工程での熱処理の温
度が、前工程の熱処理の温度より低い温度で行なわれ、
後工程での熱処理による前工程での形成部分に悪影響が
なく、高品質なチップ抵抗器を製造することができるも
のである。さらに、電極4にハンダメッキされ、個々の
チップ抵抗器が形成された後にトリミングを行なうこと
により、各工程での熱による抵抗体の影響を除去するこ
とができ、より精度の高いチップ抵抗器を提供すること
ができる。
In the manufacturing process, the temperature of the heat treatment in the subsequent process is lower than the temperature of the heat treatment in the previous process,
It is possible to manufacture a high quality chip resistor without adversely affecting the portion formed in the previous process by the heat treatment in the subsequent process. Furthermore, by trimming after the electrodes 4 are solder-plated and the individual chip resistors are formed, it is possible to eliminate the effect of the resistor due to heat in each step, and to provide a more accurate chip resistor. Can be provided.

【0019】さらに、この実施形態のチップ抵抗器は、
分割した端面部分を、導電性樹脂の第3電極8で覆って
いるので、分割部のエッジが樹脂で覆われ、このエッジ
部分での断線が生じにくいものである。又、チップ抵抗
器の裏面部分が階段状に突出し、その先端部分で基板に
ハンダ付けされるので、位置決めが正確に成され、抵抗
値の測定等も確実に可能なものである。
Further, the chip resistor of this embodiment is
Since the divided end face portion is covered with the third electrode 8 made of a conductive resin, the edge of the divided portion is covered with the resin, and disconnection at this edge portion is unlikely to occur. Further, since the back surface of the chip resistor projects in a stepwise manner and is soldered to the substrate at the tip of the chip resistor, the positioning is accurately performed, and the resistance value can be measured reliably.

【0020】尚、この発明のチップ抵抗器の抵抗体は、
金属被膜抵抗体、炭素被膜抵抗体等その用途に合わせて
適宜選定し得るものである。またメタルグレーズペース
ト、Ag−レジン系導電性ペーストの成分は、適宜他の
添加物が入っていても良く、この実施形態のものに限定
されるものではない。
The resistor of the chip resistor of the present invention is
A metal film resistor, a carbon film resistor, or the like can be appropriately selected according to its use. Further, the components of the metal glaze paste and the Ag-resin-based conductive paste may appropriately contain other additives, and are not limited to those of this embodiment.

【0021】[0021]

【発明の効果】この発明のチップ抵抗器とその製造方法
は、チップ抵抗器を回路基板にハンダ付けする際に、第
2電極と回路基板との間にハンダが侵入し、ハンダ付け
領域が確実に制限され、回路基板に対する固着力も極め
て強いものである。又、ハンダが第2電極の下方に吸い
付けられるので、チップ抵抗器の電極間距離や、回路基
板上の他の電子部品との電極間隔を短くすることがで
き、チップ抵抗器の小型化及び回路基板の高密度実装を
可能にするものである。
According to the chip resistor and the method of manufacturing the same of the present invention, when the chip resistor is soldered to the circuit board, the solder penetrates between the second electrode and the circuit board to ensure the soldering area. It is limited to, and the adhesion force to the circuit board is extremely strong. Further, since the solder is sucked below the second electrode, the distance between the electrodes of the chip resistor and the electrode interval with other electronic components on the circuit board can be shortened, and the chip resistor can be made smaller and smaller. It enables high-density mounting of circuit boards.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明のチップ抵抗器の一実施形態を示す平
面図である。
FIG. 1 is a plan view showing an embodiment of a chip resistor of the present invention.

【図2】図1のA−A断面図である。FIG. 2 is a sectional view taken along line AA of FIG.

【図3】各(A)(B)(C)(D)(E)(F)はこの実施
形態のチップ抵抗器の製造工程を示す縦断面図である。
3 (A), (B), (C), (D), (E), and (F) are vertical cross-sectional views showing the manufacturing process of the chip resistor of this embodiment.

【符号の説明】[Explanation of symbols]

1 チップ抵抗器 2 基板 3 抵抗体 4 電極 6 第1電極 7 第2電極 8 第3電極 9 Niメッキ 10 ハンダメッキ 1 Chip Resistor 2 Substrate 3 Resistor 4 Electrode 6 First Electrode 7 Second Electrode 8 Third Electrode 9 Ni Plating 10 Solder Plating

───────────────────────────────────────────────────── フロントページの続き (72)発明者 小原 陽三 富山県上新川郡大沢野町下大久保3158番地 北陸電気工業株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yozo Ohara 3158 Shimookubo, Osawano-cho, Kamishinagawa-gun, Toyama Prefecture Hokuriku Electric Industry Co., Ltd.

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】 絶縁体の基板表面の両端部に抵抗体と直
接に接続しているメタルグレーズ系の第1電極を設け、
この第1電極とは基板をはさんで反対側の基板裏面にも
メタルグレーズ系の第2電極をその基板裏面から突出し
た状態に設け、上記基板の両端面を覆い上記第1,2電
極に接触した第3電極を設け、この第3電極は上記第2
電極を上記基板端面側から一部分所定の厚さで覆い、上
記基板裏面の中央部側から両端面側に向かって、上記第
2電極と上記第3電極が2段階の階段状に突出して形成
されているチップ抵抗器。
1. A metal glaze-based first electrode directly connected to a resistor is provided at both ends of a substrate surface of an insulator,
A metal glaze-based second electrode is provided on the back surface of the substrate opposite to the first electrode so as to project from the back surface of the substrate, and both end surfaces of the substrate are covered with the first and second electrodes. A contacting third electrode is provided, which is the second electrode
The electrodes are partially covered with a predetermined thickness from the end face side of the substrate, and the second electrode and the third electrode are formed so as to project in two steps from the center side of the back face of the substrate toward both end face sides. Chip resistor.
【請求項2】 上記第3電極はコ字状に形成され、上記
基板の端面から延びて上記第1,2電極に直接接触し、
上記第1,2電極を上記基板の端面側から所定の厚さで
覆い、上記基板裏面の中央部側から端面側に向かって上
記第2電極及び上記第3電極が階段状に突出して形成さ
れている請求項1記載のチップ抵抗器。
2. The third electrode is formed in a U shape, extends from the end surface of the substrate, and is in direct contact with the first and second electrodes,
The first and second electrodes are covered with a predetermined thickness from the end face side of the substrate, and the second electrode and the third electrode are formed so as to protrude stepwise from the center side of the back face of the substrate toward the end face side. The chip resistor according to claim 1, wherein
【請求項3】 上記抵抗体は、ガラスコート及びレジン
コートにより覆われ、外部に露出する上記電極がメッキ
で覆われている請求項1又は2記載のチップ抵抗器。
3. The chip resistor according to claim 1, wherein the resistor is covered with a glass coat and a resin coat, and the electrode exposed to the outside is covered with plating.
【請求項4】 多数の分割溝が形成され分割により多数
のチップを得る絶縁性基板表面の個々のチップ部の両端
部に、メタルグレーズ系の第1電極を各々形成し、この
第1電極とは基板をはさんで反対側の基板裏面にも基板
裏面から突出した状態に各々メタルグレーズ系の第2電
極を形成し、上記各第1電極間に抵抗体を形成し、上記
基板を上記分割溝に沿って分割し、上記基板の分割され
た両端面に導電性塗料を塗布し、この導電性塗料がコ字
状に形成されて上記第1,2電極に接触するとともに上
記第2電極の一部を上記基板端面側から所定の厚さで覆
った第3電極を形成し、上記基板裏面の中央部側から端
面側に向かって上記第2電極及び上記第3電極を階段状
に2段階に突出させて形成するチップ抵抗器の製造方
法。
4. A metal glaze-based first electrode is formed on each end of each chip portion on the surface of an insulating substrate where a large number of division grooves are formed and a large number of chips are obtained by division. Form a metal glaze type second electrode on the opposite side of the substrate across the substrate so as to project from the substrate backside, form a resistor between each of the first electrodes, and divide the substrate into Divide along the groove, apply conductive paint to the divided both end surfaces of the substrate, and the conductive paint is formed in a U shape to contact the first and second electrodes and the second electrode. A third electrode is formed by partially covering the substrate end face side with a predetermined thickness, and the second electrode and the third electrode are stepwise in two steps from the central portion side of the substrate back face toward the end face side. A method of manufacturing a chip resistor that is formed by projecting into a chip.
【請求項5】 上記第3電極はAg−レジン系の導電性
塗料であり、上記基板端面に直接塗布され、この第3電
極形成後に、外部に露出した上記第1,2,3電極をメ
ッキで覆う請求項4記載のチップ抵抗器の製造方法。
5. The third electrode is Ag-resin-based conductive paint, which is directly applied to the end face of the substrate, and after the formation of the third electrode, the first, second and third electrodes exposed to the outside are plated. The method for manufacturing a chip resistor according to claim 4, wherein the chip resistor is covered with.
【請求項6】 上記抵抗体形成後その抵抗体表面にガラ
スコートを施し、上記抵抗体の抵抗値を調整するトリミ
ングを、上記メッキ後に行なう請求項5記載のチップ抵
抗器の製造方法。
6. The method of manufacturing a chip resistor according to claim 5, wherein after forming the resistor, a glass coat is applied to the surface of the resistor, and trimming for adjusting the resistance value of the resistor is performed after the plating.
【請求項7】 上記抵抗体表面にガラスコートを施した
後、上記抵抗体の抵抗値を調整するトリミングを行な
い、上記抵抗体を覆うレジンコートを形成し、この後上
記基板を個々のチップ部毎に分割する請求項4又は5記
載のチップ抵抗器の製造方法。
7. A glass coat is applied to the surface of the resistor, trimming is performed to adjust the resistance value of the resistor to form a resin coat covering the resistor, and then the substrate is cut into individual chip parts. The method for manufacturing a chip resistor according to claim 4, wherein the chip resistor is divided for each.
JP8149998A 1996-05-20 1996-05-20 Chip resistor and manufacturing method thereof Expired - Lifetime JP2775718B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8149998A JP2775718B2 (en) 1996-05-20 1996-05-20 Chip resistor and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8149998A JP2775718B2 (en) 1996-05-20 1996-05-20 Chip resistor and manufacturing method thereof

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP6180814A Division JP2866808B2 (en) 1994-07-08 1994-07-08 Manufacturing method of chip resistor

Publications (2)

Publication Number Publication Date
JPH08339903A true JPH08339903A (en) 1996-12-24
JP2775718B2 JP2775718B2 (en) 1998-07-16

Family

ID=15487240

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8149998A Expired - Lifetime JP2775718B2 (en) 1996-05-20 1996-05-20 Chip resistor and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JP2775718B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180054273A (en) * 2016-11-15 2018-05-24 삼성전기주식회사 Chip resistor and chip resistor assembly

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180054273A (en) * 2016-11-15 2018-05-24 삼성전기주식회사 Chip resistor and chip resistor assembly

Also Published As

Publication number Publication date
JP2775718B2 (en) 1998-07-16

Similar Documents

Publication Publication Date Title
US7907046B2 (en) Chip resistor and method for producing the same
JPH08306503A (en) Chip-like electronic part
KR20030088496A (en) Method for manufacturing chip resistor
JP2000306711A (en) Multiple chip resistor and production thereof
JP3167968B2 (en) Manufacturing method of chip resistor
US10276285B2 (en) Chip resistor
JP2775718B2 (en) Chip resistor and manufacturing method thereof
JPH0553281B2 (en)
JP3353037B2 (en) Chip resistor
JP3447728B2 (en) Chip resistor
JP2939425B2 (en) Surface mount type resistor and its manufacturing method
JPH08236325A (en) Chip resistor manufacturing method
JP3111823B2 (en) Square chip resistor with circuit inspection terminal
JPH07147203A (en) Chip resistor and its manufacture
US5691690A (en) Chip type jumper
JPH0513201A (en) Square chip resistance
JP3435419B2 (en) Chip resistor
JPH07142203A (en) Chip resistor
JP3159963B2 (en) Chip resistor
JP3767084B2 (en) Resistor manufacturing method
JP3323140B2 (en) Chip resistor
JP3323156B2 (en) Chip resistor
JP2000340413A5 (en)
JPH09120904A (en) Chip resistor
JP3649668B2 (en) Trimming method for chip network resistor

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term
FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080501

Year of fee payment: 10