JPH08330477A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH08330477A
JPH08330477A JP7158707A JP15870795A JPH08330477A JP H08330477 A JPH08330477 A JP H08330477A JP 7158707 A JP7158707 A JP 7158707A JP 15870795 A JP15870795 A JP 15870795A JP H08330477 A JPH08330477 A JP H08330477A
Authority
JP
Japan
Prior art keywords
semiconductor element
semiconductor device
coating material
lead frame
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7158707A
Other languages
Japanese (ja)
Inventor
Katsuki Nakaniwa
庭 克 樹 中
Naoki Kikuchi
地 直 樹 菊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsumi Electric Co Ltd
Original Assignee
Mitsumi Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsumi Electric Co Ltd filed Critical Mitsumi Electric Co Ltd
Priority to JP7158707A priority Critical patent/JPH08330477A/en
Publication of JPH08330477A publication Critical patent/JPH08330477A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

PURPOSE: To provide a coating structure for a semiconductor element molded in a plastic package, which reduces characteristic variations and improve reliability. CONSTITUTION: In a semiconductor device which has an island part 1 made of a metallic plate and a lead frame 2 and in which a semiconductor element is fixed onto the island part 1 and the electrode of the semiconductor element 3 and the lead frame 2 are connected with each other by wires 4, the section from the island part 1 to the surface of that semiconductor element 3 is coated with coating material.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は、樹脂封止された半導体
装置に係り、とくに樹脂からのストレスによる特性変
動、及び外部からの水分進入による信頼性の劣化を低減
するに適した半導体装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-encapsulated semiconductor device, and more particularly to a semiconductor device suitable for reducing characteristic variations due to stress from a resin and deterioration of reliability due to moisture intrusion from the outside. It is a thing.

【０００２】[0002]

【従来の技術】従来、この種の半導体装置を図３、図４
に示す。2. Description of the Related Art Conventionally, a semiconductor device of this type is shown in FIGS.
Shown in

【０００３】図４において、１、２は金属板を打抜加工
して形成された、それぞれアイランド部、リードフレー
ム、３は半導体素子、４は半導体素子３の電極（図省
略）とリードフレーム２と電気的に接続される全ワイ
ヤ、５は半導体素子３の表面を被覆するジャンクション
コーティング材である。In FIG. 4, reference numerals 1 and 2 are stamped from a metal plate, an island portion, a lead frame, a semiconductor element 3 and an electrode (not shown) of the semiconductor element 3 and a lead frame 2, respectively. All wires 5 electrically connected to the semiconductor chip 3 are junction coating materials that cover the surface of the semiconductor element 3.

【０００４】図３は、図４の半導体素子３をエポキシ等
の樹脂６で封止された半導体装置を示す。FIG. 3 shows a semiconductor device in which the semiconductor element 3 of FIG. 4 is sealed with a resin 6 such as epoxy.

【０００５】[0005]

【発明が解決しようとする課題】しかしながら、上記従
来例によれば、上記封止材である樹脂にストレスが生
じ、このストレスが半導体素子に及ぼすのを、上記コー
ティング材が緩和しているが、コーティング材が半導体
素子の表面のみを被覆しているので充分ではなく、この
ため樹脂からのストレスによる半導体素子の電気特性の
変動が生じるという問題があった。However, according to the above-mentioned conventional example, the coating material relieves the stress that occurs in the resin as the encapsulating material and the stress is exerted on the semiconductor element. The coating material is not sufficient because it covers only the surface of the semiconductor element, and there is a problem in that the electrical characteristics of the semiconductor element fluctuate due to stress from the resin.

【０００６】また、上記コーティング材の被覆が不充分
なため、外部からの水分進入により信頼性が劣化すると
いう問題があった。Further, since the coating material is insufficiently covered, there is a problem that reliability is deteriorated due to entry of moisture from the outside.

【０００７】[0007]

【課題を解決するための手段】上記課題は、上記コーテ
ィング材をアイランド部と半導体素子の両方に被覆する
ことにより解決される。The above problems can be solved by coating both the island portion and the semiconductor element with the above coating material.

【０００８】[0008]

【作用】上記構成によれば、コーティング材が半導体素
子の表面のみではなく、アイランド部にも被覆されるの
で、コーティング材の固着がより強固となり、封止材で
ある樹脂のストレスが半導体素子へ及ぼす影響をより少
なくして、半導体素子の電気特性の変動が低減され、ま
たコーティング材が半導体素子の周囲を被うので、外部
からの水分の半導体素子への進入をいままでより防ぐこ
とができて、半導体素子の信頼性が向上する。According to the above construction, since the coating material covers not only the surface of the semiconductor element but also the island portion, the fixing of the coating material becomes stronger and the stress of the resin as the sealing material is applied to the semiconductor element. The influence on the semiconductor element is reduced by reducing the influence on the semiconductor element, and the coating material covers the periphery of the semiconductor element, so that it is possible to prevent moisture from entering the semiconductor element from the outside. As a result, the reliability of the semiconductor device is improved.

【０００９】[0009]

【実施例】次に、本発明に係る半導体装置について、図
１、図２に基づいて説明する。図中、図３、図４と対応
する部分には同一符号を付す。EXAMPLES Next, a semiconductor device according to the present invention will be described with reference to FIGS. In the figure, portions corresponding to those in FIGS. 3 and 4 are designated by the same reference numerals.

【００１０】図２において、１、２は金属板を打抜加工
して形成された、それぞれアイランド部、リードフレー
ム、３はアイランド部１に固着された半導体素子、４は
半導体素子３の電極（図省略）とリードフレーム２とを
電気的に接続する金ワイヤ、５は半導体素子３とアイラ
ンド部１を被覆するジャンクションコーティング材であ
る。ここで、コーティング材５は、シリコンゴム等の弾
性材からなり、またこのコーティング材５は、半導体素
子３の表面のみではなく、その側面３ａとアイランド部
１ａ上にも塗布して被覆される。In FIG. 2, reference numerals 1 and 2 denote an island portion and a lead frame, respectively, formed by stamping a metal plate, 3 a semiconductor element fixed to the island portion 1, and 4 an electrode of the semiconductor element 3 ( Gold wires 5 for electrically connecting the lead frame 2 (not shown) to the lead frame 2 are junction coating materials for covering the semiconductor element 3 and the island portion 1. Here, the coating material 5 is made of an elastic material such as silicon rubber, and the coating material 5 is applied not only on the surface of the semiconductor element 3 but also on its side surface 3a and the island portion 1a.

【００１１】図１は、図２の半導体素子３をエポキシ等
の樹脂６で封止された半導体装置を示す。ここで、リー
ドフレーム２は半導体装置の外部端子を形成する。FIG. 1 shows a semiconductor device in which the semiconductor element 3 of FIG. 2 is sealed with a resin 6 such as epoxy. Here, the lead frame 2 forms an external terminal of the semiconductor device.

【００１２】[0012]

【発明の効果】上記構成によれば、コーティング材が半
導体素子の表面のみではなく、アイランド部にも被覆さ
れるので、コーティング材の固着がより強固となり、封
止材である樹脂のストレスが半導体素子へ及ぼす影響を
より少なくして、半導体素子の電気特性の変動が低減さ
れ、またコーティング材が半導体素子の周囲を被うの
で、外部からの水分の半導体素子への進入をいままでよ
り防ぐことができて、半導体素子の信頼性が向上する等
の利点が生じる。According to the above structure, since the coating material is coated not only on the surface of the semiconductor element but also on the island portion, the fixing of the coating material becomes stronger and the stress of the resin as the sealing material is applied to the semiconductor. The influence on the element is reduced, fluctuations in the electrical characteristics of the semiconductor element are reduced, and since the coating material covers the periphery of the semiconductor element, it is necessary to prevent moisture from entering the semiconductor element from the outside. Therefore, there are advantages such as improvement in reliability of the semiconductor element.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明に係る半導体装置を示す図である。FIG. 1 is a diagram showing a semiconductor device according to the present invention.

【図２】本発明に係る半導体装置で、樹脂封止する前の
状態を示す図である。FIG. 2 is a diagram showing a state of the semiconductor device according to the present invention before resin sealing.

【図３】従来の半導体装置を示す図である。FIG. 3 is a diagram showing a conventional semiconductor device.

【図４】従来の半導体装置で、樹脂封止する前の状態を
示す図である。FIG. 4 is a diagram showing a state of the conventional semiconductor device before resin sealing.

【符号の説明】[Explanation of symbols]

１ アイランド部 ２ リードフレーム ３ 半導体素子 ４ ワイヤ ５ コーティング材 ６ 樹脂 1 Island Part 2 Lead Frame 3 Semiconductor Element 4 Wire 5 Coating Material 6 Resin

Claims (1)

【特許請求の範囲】[Claims] 【請求項１】 金属板で形成されたアイランド部とリー
ドフレームとを有し、該アイランド部上に半導体素子を
固着し、該半導体素子の電極部と該リードフレームとを
ワイヤ接続されてなる半導体装置において、該アイラン
ド部から該半導体素子の表面にかけてコーティング材で
被覆されてなる構成の半導体装置。1. A semiconductor comprising an island portion formed of a metal plate and a lead frame, a semiconductor element being fixed on the island portion, and an electrode portion of the semiconductor element and the lead frame being wire-connected. In the device, a semiconductor device configured to be covered with a coating material from the island portion to the surface of the semiconductor element.
JP7158707A 1995-05-31 1995-05-31 Semiconductor device Pending JPH08330477A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7158707A JPH08330477A (en) 1995-05-31 1995-05-31 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7158707A JPH08330477A (en) 1995-05-31 1995-05-31 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH08330477A true JPH08330477A (en) 1996-12-13

Family

ID=15677605

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7158707A Pending JPH08330477A (en) 1995-05-31 1995-05-31 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH08330477A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007165442A (en) * 2005-12-12 2007-06-28 Mitsubishi Electric Corp Mold package

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007165442A (en) * 2005-12-12 2007-06-28 Mitsubishi Electric Corp Mold package
US8569871B2 (en) 2005-12-12 2013-10-29 Mitsubishi Electric Corporation Semiconductor device having a molded package

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