JPH08328037A - Active matrix type liquid crystal display device and its driving method - Google Patents

Abstract

PURPOSE: To lessen the decrease in on-currents as far as possible and to decrease leak currents when polycrystalline silicon thin-film transistors are used as the switching elements of an active matrix liquid crystal display device. CONSTITUTION: This active matrix liquid crystal display device has display parts which are formed by holding liquid crystal layers by pixel electrodes 1 and counter electrodes 2 and two-dimensionally arranging these electrodes, signal lines 4 which are connected to the pixel electrodes 1 of the display parts by each column and apply image signals and the polycrystalline silicon thin-film transistors 30 of which the source electrodes are connected to the signal lines 4 and the drain electrodes are connected to the pixel electrodes 1 for selectively applying the image signals to the pixel electrodes 1. The liquid crystal display device described above is provided with a counter electrode driving circuit (voltage impressing means) 9 for controlling the fluctuation in the reference potential of the counter electrodes 2. The polycrystalline silicon TFTs 30 form the low-concn. impurity regions adjacent only to the drain electrode side thereof.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type liquid crystal display device having a polycrystalline silicon thin film transistor in a pixel portion, and more particularly to a structure and driving for preventing lowering of display contrast and occurrence of crosstalk between pixels. Regarding the method.

[0002]

2. Description of the Related Art A polycrystalline silicon thin film transistor having a channel region formed of polycrystalline silicon can be operated at a higher speed than an amorphous silicon thin film transistor, and therefore it has been proposed to be applied to a high performance active matrix type liquid crystal display device. (For example, Japanese Patent Laid-Open No. 5-26
5042 publication). An active matrix type liquid crystal display device provided with a polycrystalline silicon thin film transistor as a charge transfer switch will be described with reference to the equivalent circuit shown in FIG.

In the active matrix type liquid crystal display device shown in FIG. 7, a pixel is formed with a liquid crystal layer sandwiched between a pixel electrode 1 and a counter electrode 2, and the pixels are arranged two-dimensionally to form a display section. An N-type polycrystalline silicon thin film transistor 3 is connected to each pixel electrode 1, and the other side of the thin film transistor 3 is connected to a signal line 4 for supplying an image signal. Here, the threshold voltage of the thin film transistor 3 is set to, for example, 1V. The counter electrode 2 is, for example, 0
It is fixed to the reference potential of V. The signal line 4 is formed for each column, and the thin film transistors 3 in the same column are all connected to the common signal line 4. The gate electrode of the thin film transistor 3 is connected to the common gate line 5 for each row. The gate electrode of the thin film transistor 3 is formed of the same polycrystalline silicon thin film transistor as the thin film transistor of the pixel portion 3 on the same substrate as the gate line driving circuit 6
The gate line drive circuit 6 controls ON / OFF of each thin film transistor 3 in the pixel portion. Further, an image signal is applied from the signal line drive circuit 7 to each signal line 4.

A driving method of the active matrix type liquid crystal display device will be described with reference to FIG. FIG. 8 shows the gate drive pulse 10 applied to the gate electrode of the thin film transistor 3, the potential of the signal line 4 (potential at point A in the equivalent circuit of FIG. 6) and the potential of the pixel electrode 1 (FIG. 7).
Potential of point C in the equivalent circuit of FIG. The signal line 4 is given a negative potential of, for example, −5V to 0V in a certain frame, and is given a positive potential of, for example, 0V to 5V in the next frame so that the polarity is inverted in a predetermined cycle. Has become. The gradation of the density displayed in each pixel is the potential (-5V to 0V or 0V to 5V).
It is adjusted by the absolute value of.

The gate drive pulse 10 applied to the gate electrode of the thin film transistor 3 is composed of, for example, rectangular pulses of -6V (L level) and 9V (H level). That is, while −6 V is applied to the gate electrode, the thin film transistor 3 is turned off, the pixel electrode 1 and the signal line 4 are opened, and the potential of the pixel electrode 1 is held (period B in FIG. 8). ).

Next, when 9V (H level of the gate drive pulse 10) is applied to the gate electrode of the thin film transistor 3, the thin film transistor 3 is turned on, and a current is applied so that the pixel electrode 1 has the same potential as the signal line 4. Flow through the signal line 4,
The image signal from the signal drive circuit 7 is written in the pixel (period A in FIG. 8). However, the thin film transistor 3
Is off, the signal line 4 or the pixel electrode 1 is supplied with a potential of up to 5 V. At this time, since −6 V is applied to the gate electrode of the thin film transistor 3, the thin film transistor 3
There is a case where the maximum gate electrode of -11V becomes -11V with respect to the drain electrode.

The current-voltage characteristic of the thin film transistor 3 is
As shown by the solid line in FIG. 9, if the gate voltage becomes sufficiently low or the drain voltage becomes large, a large leak current will flow even in the off state. The magnitude of the leak current is almost determined by the potential difference between the gate and the drain. That is, when the potential difference between the gate and the drain becomes large, a strong electric field is applied to the vicinity of the drain, which increases thermionic emission and causes a large leak current, which is a phenomenon peculiar to the polycrystalline silicon thin film transistor. As a result, the pixel electrode 1 There was a problem that the potential of could not be held sufficiently. Therefore, when the polycrystalline silicon thin film transistor 3 is used as a switching element of an active matrix type liquid crystal display device, there are problems that the contrast in the pixels of the display portion is lowered and crosstalk between the pixels occurs.

[0008]

As a technique for reducing the leak current of a polycrystalline silicon thin film transistor, as disclosed in, for example, Japanese Patent Publication No. 3-38755, a low concentration is provided adjacent to a source / drain region. L to provide an impurity region
The DD structure has been proposed. As shown in FIG. 10, the thin film transistor having this structure has a semiconductor active layer 32, a gate insulating layer 33, a gate electrode 34, and an upper insulating layer 35 sequentially formed on an insulating substrate 31, and in the semiconductor active layer 32, The source region 32a in which impurities are introduced at a high concentration
Adjacent to the drain region 32b, the low concentration impurity region 32c
Is provided. The source region 32a and the drain region 32b are connected to the source electrode 36a and the drain electrode 36b, respectively.

According to this structure, the electric field applied to the vicinity of the drain region 32b or the source region 32a in the off state of the thin film transistor is dispersed in the low concentration impurity region 32c, so that the magnitude thereof is relaxed, and as a result, the leak current is reduced. To be done. In the current-voltage characteristics in this case, as indicated by the dotted line in FIG. 9, the leak current does not increase even if the drain voltage increases in the off state.

When the thin film transistor having the LDD structure is used in the active matrix type liquid crystal display device, it is necessary to provide the low concentration impurity regions 32c on both the source electrode 36a side and the drain electrode 36b side. When the thin film transistor is an N-type, a strong electric field is applied to the source electrode 36a and the drain electrode 36b in the vicinity of the higher potential, but when the active matrix type liquid crystal display device is in operation, as shown in FIG. The signal line 4 to which the electrode 36a is connected and the pixel electrode 1 to which the drain electrode 36b is connected
This is because the magnitude relationship of the electric potentials of the is constantly changing.

However, when the low-concentration impurity region exists in the lower one of the source electrode 36a and the drain electrode 36b, carriers are injected into the channel due to the potential barrier formed by the low-concentration impurity region 32c in the ON state of the thin film transistor. Figure 9
As described above, the value of the drain current in the ON state is greatly reduced. As a result, there is a problem that the active matrix liquid crystal display device cannot be driven when the number of pixels is increased or when high-speed display is required. This phenomenon similarly occurs in a thin film transistor having P-type polycrystalline silicon as a channel region.

Further, there is shown an active matrix panel in which a plurality of thin film transistors are connected in series to a pixel electrode and the gates of the thin film transistors are connected to each other (Japanese Patent Publication No. 5-44195).
(See the official gazette). This structure does not require a special process such as forming an LDD region, and has the effect of reducing the leak current by dividing the voltage between the source and drain, but it is the main factor of the leak current. Since the potential difference between a gate and a drain does not change, there is a problem that the effect of reducing the leak current is not great.

The present invention has been made in view of the above circumstances, and when a polycrystalline silicon thin film transistor is used as a switching element of an active matrix type liquid crystal display device, the reduction of the on-current is minimized and the leakage current is reduced. An object is to provide a structure and a driving method of an active matrix type liquid crystal display device which can be realized.

[0014]

In order to achieve the above object, a first aspect of the present invention is to provide a display section in which a liquid crystal layer is sandwiched between a pixel electrode and a counter electrode and which is two-dimensionally arranged, and a display section for each column. A signal line connected to the pixel electrode and supplying an image signal, and a polycrystalline silicon thin film transistor having a source electrode connected to the signal line and a drain electrode connected to the pixel electrode for selectively supplying the image signal to the pixel electrode, An active matrix type liquid crystal display device having the following structure. A voltage applying unit is provided to control the reference potential of the counter electrode. The polycrystalline silicon thin film transistor has a low-concentration impurity region adjacent to only the drain electrode side thereof.

According to a second aspect of the present invention, there is provided a display section in which a liquid crystal layer is sandwiched between a pixel electrode and a counter electrode and which is two-dimensionally arranged, and a signal line which is connected to the pixel electrode of the display section for each column and gives an image signal. And an N-type polycrystalline silicon thin film transistor having a source electrode connected to the signal line and a drain electrode connected to the pixel electrode for selectively applying the image signal to the pixel electrode. The method is characterized in that the reference potential of the counter electrode is changed according to the on / off state of the thin film transistor. That is, the reference potential during the period when the thin film transistor is in the off state is set to a voltage that is higher than the maximum potential of the image signal by more than the reference potential during the period when the thin film transistor is in the on state.

A third aspect of the present invention is a method of driving an active matrix type liquid crystal display device, which differs from the second aspect in that a P-type polycrystalline silicon thin film transistor is used. That is, the reference potential of the counter electrode is changed in accordance with the on / off state of the thin film transistor, which is the same as in claim 2, but the reference potential during the period when the thin film transistor is in the off state is changed to the period during which the thin film transistor is in the on state. It is characterized in that the voltage is set to be lower than the maximum potential of the image signal as compared with the reference potential.

[0017]

According to the first aspect of the present invention, by providing the voltage applying means for controlling the reference potential of the counter electrode, the potential of the pixel electrode can be always higher than the potential of the signal line when the thin film transistor is in the OFF state, and the drain is drained. A polycrystalline silicon thin film transistor having a low-concentration impurity region provided only on the electrode (pixel electrode) side can be used, and the leak current can be reduced without greatly reducing the on-current.

According to the second aspect, since the potential of the pixel electrode is always higher than the potential of the signal line when the N-type polycrystalline silicon thin film transistor is in the off state, the low concentration impurity region may be provided only on the pixel electrode side. The leak current can be reduced without significantly reducing the on-current.

According to the third aspect, since the potential of the pixel electrode is always lower than the potential of the signal line when the P-type polycrystalline silicon thin film transistor is in the off state, the low concentration impurity region may be provided only on the pixel electrode side. The leak current can be reduced without significantly reducing the on-current.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to the drawings. FIG. 1 is an equivalent circuit diagram of an active matrix type liquid crystal display device according to an example. In an active matrix type liquid crystal display device, a pixel portion is formed by sandwiching a liquid crystal layer between a pixel electrode 1 provided on a matrix substrate and a counter electrode 2 provided on a counter substrate, and the pixel portion is arranged two-dimensionally. And constitutes the display section. The pixel electrode 1 is
It is formed of a transparent electrode that defines a pixel region. A drain electrode side of a thin film transistor 30 having a channel region made of N-type polycrystalline silicon is connected to each pixel electrode 1. The source electrode side of the thin film transistor 30 is connected to the signal line 4 for giving an image signal. Therefore, the signal charge from the signal line 4 is held in the capacitance formed by the liquid crystal layer sandwiched between each pixel electrode 1 and the counter electrode 2. Here, the threshold voltage of the thin film transistor 30 is set to, for example, 1V.

The signal line 4 is formed for each column, and the thin film transistors 30 in the same column are all connected to the common signal line 4. In addition, the gate electrode of the thin film transistor 30 is
Each row is connected to a common gate line 5.
The gate line 5 is also connected to the gate line drive circuit 6 formed on the same matrix substrate as each thin film transistor 30 by a polycrystalline silicon thin film transistor, and ON / OFF control of the thin film transistor 30 is performed. Also,
The counter electrodes 2 in each row are connected to a counter electrode line 8, and each counter electrode line 8 is connected to a counter electrode drive circuit (voltage applying means) 9 that sets the counter electrode 2 to two kinds of potentials.

In order to increase the value of the capacitance portion that holds the signal charge, as shown in FIG. 2, the charge holding capacitor 20 may be connected in parallel with the capacitance of the liquid crystal layer. In this case, one electrode 21 (hereinafter referred to as the charge storage capacitor electrode 21) that is not connected to the pixel electrode 1 of the charge storage capacitor 20 in the same row (hereinafter, referred to as the charge storage capacitor electrode 21) has a counter electrode line 8 ′ different from the counter electrode line 8. And the counter electrode drive circuit 9 similar to the counter electrode 2.
Driven by.

Next, the specific structure of the thin film transistor 30 will be described with reference to FIG. The thin film transistor 30 includes an insulating substrate 31, a semiconductor active layer 32,
The gate insulating layer 33, the gate electrode 34, and the upper insulating layer 35 are sequentially formed. The semiconductor active layer 32 includes a source region 32 a / drain region 32 b in which high-concentration impurities are implanted, and a channel region 32 immediately below the gate electrode 24.
d is formed. Then, the low-concentration impurity region 32 is provided only between the drain region 32b and the channel region 32d.
c is formed. The source region 32a / drain region 32b has a source electrode 36a connected to the signal line 4 and a drain electrode 36b connected to the pixel electrode 1 via a contact hole 37 formed in the gate insulating layer 33 and the upper insulating layer 34. Respectively connected to. By using the thin film transistor having the above structure, the current-voltage characteristics of the thin film transistor when a voltage higher than that of the source electrode is applied to the drain electrode are as shown by the solid line in FIG. 4, and the low concentration impurity regions are provided on both sides shown by the dotted line. The on-current can be increased as compared with the formed thin film transistor (structure of FIG. 10).

Next, an embodiment of a method of driving the above-mentioned active matrix type liquid crystal display device will be described with reference to FIG. FIG. 5 shows the gate drive pulse 10 applied to the gate electrode of the thin film transistor 30, the potential of the signal line 4 (potential at point A in the equivalent circuit of FIG. 1), and the potential of the pixel electrode 1 (in the equivalent circuit of FIG. 1). (Potential at point C)
And the potential of the counter electrode 2 (charge holding capacitor electrode 21) (counter electrode drive pulse 11).

A certain frame (I in FIG. 5,
In the period of V and VI), for example, a negative potential from −5V to 0V is given as an image signal, and the next frame (I in FIG. 5) is supplied.
In the period (I, III, IV), a positive potential of 0V to 5V is applied as an image signal. Therefore, the maximum amplitude of the image signal is 10V. The gradation of the image density is set by the absolute value of the image signal (the magnitude of the positive potential or the negative potential). The polarity of the potential of the signal line 4 is inverted for each frame in order to avoid fluctuation in the characteristics of the liquid crystal layer sandwiched between the pixel electrode 1 and the counter electrode 2. -6V (L level) is applied to the gate electrode of the thin film transistor 30.
And a drive pulse 10 consisting of a rectangular pulse of two potentials of 9 V (H level) is applied from the gate line drive circuit 6.

When writing the image signal of the signal line 4 to the pixel, 9V is applied to the gate electrode of the thin film transistor 30, the thin film transistor 30 is turned on, and a current is applied so that the pixel electrode 1 has the same potential as the signal line 4. The image signal is written. At this time, at the same time, the potential of the counter electrode 2 (charge holding capacitor electrode) is set to 0 V by the counter electrode drive circuit 9.
Is set to Therefore, the difference between the signal voltage of the image signal supplied from the signal line 4 and the potential of the counter electrode 2 (charge storage capacitor electrode) is applied to the liquid crystal layer sandwiched between the pixel electrode 1 and the counter electrode 2. (Periods III and VI in FIG. 5).

Next, after the writing of the image signal is completed, the thin film transistor 30 is held in order to hold the signal potential.
-6V is applied to the gate electrode of the thin film transistor 30, and the thin film transistor 30 is turned off (the period of I, II, IV and V in FIG. 5). At this time, at the same time, the counter electrode drive circuit 9 sets the potential of the counter electrode 2 (charge holding capacitor electrode) to a potential (10 V in this embodiment) that is equal to or larger than the maximum amplitude (10 V) of the image signal. Then, the potential of the pixel electrode 1 is
It rises by 10 V with the potential of the (charge storage capacitor electrode 21). This is because the pixel electrode 1 is in the floating state because the thin film transistor 30 is in the off state. The source electrode of the thin film transistor 30 is the signal line 4
Since the drain electrode connected to the pixel electrode 1 is always at a higher potential than the source electrode on the signal line 4 side, the drain side of the thin film transistor 30 is connected to the drain side of the thin film transistor 30. Only low-concentration impurity region 3
Leakage current can be kept low only by providing 2c. Further, even if the potential of the counter electrode 2 is changed when the thin film transistor 30 is in the off state, the pixel electrode 1 and the counter electrode 2 may be changed.
Since the potential between the (charge storage capacitor electrode 21) does not change, the voltage applied to the liquid crystal layer does not change.

According to the above embodiment, when the thin film transistor 30 made of N-type polycrystalline silicon is in the off state,
Since the potential of the pixel electrode 1 (potential of C point) is always higher than the potential of the signal line 4 (potential of A point), the low-concentration impurity region 32c is formed only on the pixel electrode 1 (drain electrode 36b) side in the thin film transistor 30. The leak current can be reduced without significantly reducing the on-current. Therefore, even when the number of pixels is large or when high-speed display is performed, the contrast of the active matrix type liquid crystal display device can be improved and crosstalk between pixels can be reduced.

In the above-mentioned embodiments, the active matrix type liquid crystal display device in which the thin film transistor 30 is made of N-type polycrystalline silicon is shown, but it is also effective when the thin film transistor 30 is made of P-type polycrystalline silicon. In this case, when the P-type polycrystalline silicon thin film transistor 30 is turned on, −9V is applied to the gate electrode and 0V is applied to the counter electrode 2 (charge holding capacitance electrode 21), and when the thin film transistor 30 is turned off, 6V is applied to the gate electrode and the counter electrode is imaged. Driving is performed so as to give a voltage (-10 V) lower than the maximum amplitude (10 V) of the signal. Therefore, P
Since the potential of the pixel electrode 1 (potential at point C) is always lower than the potential of the signal line 4 (potential at point A) when the thin film transistor 30 made of polycrystalline silicon is in the off state, in the thin film transistor 30, the pixel electrode 1 (Drain electrode 3
The low-concentration impurity region 32c may be provided only on the 6b) side, and the leak current can be reduced without significantly reducing the on-current.

Next, another embodiment of the driving method of the active matrix type liquid crystal display device will be described with reference to FIG. In FIG. 6, the drive pulse 10 applied to the gate electrode of the thin film transistor 30, the potential of the signal line 4 (potential at point A in the equivalent circuit of FIG. 1), the potential of the pixel electrode 1 (C in the equivalent circuit of FIG. 1). The potential of the point) and the potential of the counter electrode 2 (charge holding capacitor electrode 21) are shown.
The channel region of the thin film transistor 30 is made of N-type polycrystalline silicon. The potential of the counter electrode 2 is 0V, 5V, 1 by a counter electrode drive circuit (voltage applying means) 9.
It can be set to three types of 0V.

A positive potential of 0 V to 5 V is applied to the signal line 4 regardless of the frame. Thin film transistor 3
A drive pulse 1 composed of a rectangular pulse of -1 V (L level) and 9 V (H level) is applied to the gate electrode of 0, respectively.
0 is applied. The maximum amplitude of the image signal is 5V. The gradation of the image density is set by the magnitude of the potential of the image signal.

When writing the image signal of the signal line 4 to the pixel, 9V is applied to the gate electrode of the thin film transistor 30, the thin film transistor 30 is turned on, and a current flows so that the pixel electrode 1 has the same potential as the signal line 4. , The image signal is written. At this time, in the period III of FIG. 6, the potential of the counter electrode 2 (charge holding capacitance electrode 21) is simultaneously set to 0 V by the counter electrode drive circuit 9. Therefore, in the liquid crystal layer sandwiched between the pixel electrode 1 and the counter electrode 2, a positive potential which is the difference between the signal voltage of the image signal supplied from the signal line 4 and the potential of the counter electrode 2 (charge holding capacitance electrode 21). Will be applied.

On the other hand, in the period VI of FIG. 6, 9V is applied to the gate electrode, and at the same time, the potential of the counter electrode 2 (charge holding capacitance electrode 21) is set to 5V by the counter electrode drive circuit 9. Then, a negative voltage, which is the difference between the signal voltage and the potential of the counter electrode 2 (charge holding capacitor electrode), is applied to the liquid crystal layer. In this way, the counter electrode 2 is provided for each frame.
By changing the potential of the (charge storage capacitor electrode 21), it is possible to invert the polarity of the voltage applied to the liquid crystal layer sandwiched between the pixel electrode 1 and the counter electrode 2, and to avoid fluctuations in the characteristics of the liquid crystal.

Next, after the writing of the image signal is completed, the thin film transistor 30 is held in order to hold the signal potential.
-6V is applied to the gate electrode of the thin film transistor 30, and the thin film transistor 30 is turned off (the period of I, II, IV and V in FIG. 6). At this time, at the same time, the potential of the counter electrode 2 (charge holding capacitor electrode 21) is increased by the maximum amplitude (5 V) of the image signal. That is, in the periods I and II of FIG.
The counter electrode drive circuit 9 sets the potential of the counter electrode 2 (charge holding capacitor electrode) to 10V and 5V during the periods IV and V in FIG. Then, the potential of the pixel electrode 1 also rises by 5 V in accordance with the potential of the counter electrode 2 (charge holding capacitance electrode). This is because the pixel electrode 1 is in a floating state because the thin film transistor 30 is off.

Since the source electrode of the thin film transistor 30 is connected to the signal line 4 and has a potential between 0V and 5V, the drain electrode connected to the pixel electrode 1 is always at a higher potential than the source electrode. The leak current can be kept low only by providing the low-concentration impurity region 32c only on the pixel electrode 1 (drain electrode 36b) side in the thin film transistor 30. In addition, the thin film transistor 30
Is in the off state, the counter electrode 2 (charge holding capacitance electrode 2
Even if the potential of 1) is changed, the pixel electrode 1 and the counter electrode 2
Since the potential between the (charge storage capacitor electrode 21) does not change, the voltage applied to the liquid crystal layer does not change.

This driving method is also effective for the thin film transistor 30 having the channel region made of P-type polycrystalline silicon. In this case, the signal line 4 is supplied with a negative potential from 0 V to −5 V regardless of the frame. The potential of the counter electrode 2 can be set to three types of 0 V, −5 V, and −10 V by the counter electrode drive circuit (voltage applying means) 9. When the thin film P-type polycrystalline silicon thin film transistor 30 is turned on when the image signal of the signal line 4 has a negative potential, −9 V is applied to the gate electrode and 0 V is applied to the counter electrode (charge holding capacitor electrode), and the image signal of the signal line 4 is changed. At 0, when the thin film P-type polycrystalline silicon thin film transistor 30 is turned on, −9 V is applied to the gate electrode and −5 V is applied to the counter electrode (charge holding capacitor electrode).

When the signal potential is held after writing the image signal, the potential of the counter electrode 2 (charge holding capacitor electrode) is driven so as to be lowered (-5V) by the maximum amplitude (5V) of the image signal. Therefore, when the thin film transistor 30 formed of P-type polycrystalline silicon is in the off state, the signal line 4
Since the potential of the pixel electrode 1 (potential of point C) is always lower than the potential of (the potential of point A), if the low-concentration impurity region 32c is provided only on the pixel electrode 1 (drain electrode 36b) side of the thin film transistor 30. Well, the leak current can be reduced without significantly reducing the on-current.

In each of the driving methods described above, the potentials of both the counter electrode 2 and the charge storage capacitor electrode 21 are changed, but the charge storage capacitor 20 has a larger capacitance than the capacitance between the pixel electrode 1 and the counter electrode 2. If it is several times or more larger, the potential of only the charge storage capacitor electrode 21 may be changed via the counter electrode line 8 '. This is because the potential of the pixel electrode 1 when the thin film transistor 30 is in the off state is determined by the capacitance division of the electrostatic capacitance between the charge storage capacitor electrode 21, the counter electrode 2 and the pixel electrode 1.

[0039]

According to the present invention, in an active matrix type liquid crystal display device using a polycrystalline silicon thin film transistor as a switching element, a structure and a driving method are provided in which a low concentration impurity region is provided only on the pixel electrode side of the thin film transistor. The leak current can be reduced without significantly reducing the on-current. As a result, even if the active matrix type liquid crystal display device has a large number of pixels or high-speed display is required, the contrast is large and the crosstalk between the pixels can be reduced, and the image quality can be improved.

[Brief description of drawings]

FIG. 1 is an equivalent circuit diagram showing an embodiment of an active matrix type liquid crystal display device of the present invention.

FIG. 2 is an equivalent circuit diagram showing another embodiment of the pixel portion of the active matrix type liquid crystal display device.

FIG. 3 is a cross-sectional explanatory diagram of a thin film transistor used in an active matrix liquid crystal display device.

FIG. 4 is a current-voltage characteristic diagram of a thin film transistor used in an active matrix liquid crystal display device.

FIG. 5 is a timing chart diagram for explaining an example of a driving method of an active matrix type liquid crystal display device of the present invention.

FIG. 6 is a timing chart diagram for explaining another embodiment of the driving method of the active matrix type liquid crystal display device of the present invention.

FIG. 7 is an equivalent circuit diagram of a conventional active matrix type liquid crystal display device.

FIG. 8 is a timing chart diagram for explaining a driving method of a conventional active matrix type liquid crystal display device.

FIG. 9 is an explanatory cross-sectional view of a thin film transistor having an LDD structure.

FIG. 10 is a current-voltage characteristic diagram of a thin film transistor.

[Explanation of symbols]

1 ... Pixel electrode, 2 ... Counter electrode, 4 ... Signal line, 5 ...
Gate line, 6 ... Gate line drive circuit, 7 ... Signal line drive circuit, 8, 8 '... Counter electrode line, 9 ... Counter electrode drive circuit (voltage applying means), 10 ... Gate drive pulse, 1
1 ... Counter electrode drive pulse, 20 ... Charge holding capacity, 2
1 ... Charge holding capacitor electrode, 30 ... Thin film transistor,
32 ... Semiconductor active layer, 32a ... Source region, 32b
... Drain region, 32c ... Low concentration impurity region, 36
a ... Source electrode, 36b ... Drain electrode

Claims (3)

[Claims] 1. A display section in which a liquid crystal layer is sandwiched between a pixel electrode and a counter electrode and which is arranged two-dimensionally, a signal line which is connected to the pixel electrode of the display section for each column and gives an image signal, and the image. An active matrix type liquid crystal display device comprising: a polycrystalline silicon thin film transistor in which a source electrode is connected to the signal line and a drain electrode is connected to the pixel electrode in order to selectively apply a signal to the pixel electrode. An active matrix type liquid crystal display device is characterized in that a voltage applying means for controlling fluctuation of the reference potential is provided, and the polycrystalline silicon thin film transistor is formed with a low concentration impurity region adjacent only to its drain electrode side. 2. A display section in which a liquid crystal layer is sandwiched between a pixel electrode and a counter electrode and which is two-dimensionally arranged, a signal line which is connected to the pixel electrode of the display section for each column and gives an image signal, and the image. A method for driving an active matrix liquid crystal display device, comprising: an N-type polycrystalline silicon thin film transistor in which a source electrode is connected to the signal line and a drain electrode is connected to the pixel electrode in order to selectively apply a signal to the pixel electrode. The reference potential of the counter electrode is changed corresponding to the on / off state of the thin film transistor, and the reference potential during the period when the thin film transistor is in the off state is compared with the reference potential during the period when the thin film transistor is in the on state. A method for driving an active matrix type liquid crystal display device, characterized in that a voltage higher than the maximum amplitude of a signal is set. 3. A display section in which a liquid crystal layer is sandwiched between a pixel electrode and a counter electrode and which is arranged two-dimensionally, a signal line which is connected to the pixel electrode of the display section for each column and gives an image signal, and the image. A method for driving an active matrix liquid crystal display device, comprising: a P-type polycrystalline silicon thin film transistor in which a source electrode is connected to the signal line and a drain electrode is connected to the pixel electrode in order to selectively apply a signal to the pixel electrode. The reference potential of the counter electrode is changed corresponding to the on / off state of the thin film transistor, and the reference potential during the period when the thin film transistor is in the off state is compared with the reference potential during the period when the thin film transistor is in the on state. A method for driving an active matrix type liquid crystal display device, characterized in that a voltage lower than a maximum amplitude of a signal is set.