JPH0832063B2 - Video signal processing circuit - Google Patents

Description

The present invention relates to a video signal processing circuit suitable for a color hard copy apparatus or the like.

"Conventional technology" A / D conversion is performed on a video signal at every predetermined sampling period, and based on the series of digital data obtained as a result,
Color hard copy devices for printing are known. When connecting a color hard copy device of this type to a host computer equipped with a monitor display device to obtain a color hard copy of the monitor screen, the reference level for A / D conversion in the color hard copy device is set from the host computer. It needs to be adjusted according to the level of the video signal sent. Here, even if the host computer is the same model, the above-mentioned video signal level varies slightly among products, so the above reference level adjustment is indispensable when connecting a color hard copy device to the host computer. Met. Then, the reference level adjustment at that time has been conventionally performed by an apparatus configuration as shown in FIG. 2, for example.

In FIG. 2, the A / D converter 1 is supplied with a sampling clock having a predetermined sampling period. And
The video signal is A / D converted by the A / D converter 1 every sampling period. At the beginning of the input of the video signal, appropriate high potential and low potential are applied to the A / D converter 1 at the reference level Vref ₁ corresponding to the white level and the V potential corresponding to the black level, respectively.
It is given as the initial value of ref ₂ and A / D conversion is performed according to these reference levels. Then, the digital data obtained as a result is sequentially stored in the frame memory 2.

Then, the digital data stored in the frame memory 2 is read by the CPU 3, and the CPU 3 includes data corresponding to the white level (for example, all “1”) and data corresponding to the black level (for example, all “0”) in the read data. It is determined whether there is at least one each. If there is no data corresponding to the white level, the reference level Vr corresponding to the white level
This means that ef ₁ is too high, and that there is no data corresponding to the black level, the reference level Vref ₂ corresponding to the black level is too low. Then, the CPU 3 determines from the determination result whether or not the reference levels Vref ₁ and Vref ₂ can be set as they are, and if a change is necessary,
Change the reference level data Dref ₁ corresponding to the white level and the reference level data Dref ₂ corresponding to the black level.

These data Dref ₁ and Dref ₂ are sequentially D / A converted by the D / A converter 4, and the voltages corresponding to the data Dref ₁ and Dref ₂ are sequentially sampled and held by the comparison voltage holding circuit 5. Then, the voltage corresponding to the data Dref ₁ becomes A / D as a new reference level Vref ₁ corresponding to the white level.
The voltage applied to the converter 1 and corresponding to the data Dref ₂ is applied to the A / D converter 1 as a new reference level Vref ₂ corresponding to the black level. In this way, the reference levels Vref ₁ and Vref ₂ are updated.

[Problems to be Solved by the Invention] In the above-described conventional reference level adjustment method, in order to set the reference levels Vref ₁ and Vref ₂ to accurate values according to the video signal level, the frame memory 2
Read the stored data of the reference level Vref
The operation of updating ₁ and Vref ₂ must be repeated several times. Therefore, there is a problem that it takes time to adjust the reference level.

The present invention has been made in view of the above-mentioned circumstances, and the reference levels Vref ₁ and Vref ₂ are adjusted in a short time without reading the data stored in the frame memory 2 to quickly obtain a digital signal corresponding to a video signal. It is an object of the present invention to provide a video signal processing circuit capable of processing.

"Means for Solving the Problem" The present invention relates to a video signal processing circuit which receives an analog video signal and sequentially outputs digital data corresponding to the video signal, wherein the first signal corresponds to a white level. A second reference level corresponding to the reference level and the black level is input, and an A / D converter that performs A / D conversion of the video signal input based on the first and second reference levels;
White level detection means for comparing the digital data output from the A / D converter with first reference digital data corresponding to a white level and outputting the comparison result as a white level detection signal; and the A / D converter. A black level detecting means for comparing the digital data output by the second reference digital data corresponding to the black level and outputting the comparison result as a black level detection signal; and the digital data output by the A / D converter. Is above the first reference digital data, the first reference level is updated, and when the output digital data of the A / D converter is below the second reference digital data, the second reference level is updated. And a reference level control means for updating the reference level.

[Operation] According to the above configuration, the input video signal is A / D converted,
The resulting digital data is compared with the first reference digital data corresponding to the white level and the second reference digital data corresponding to the black level. Then, the comparison result is output as a white level detection signal and a black level detection signal, and the reference level in the A / D conversion is adjusted based on these detection signals.

[Embodiment] An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a video signal processing circuit according to an embodiment of the present invention. In the figure, the parts corresponding to those in the above-mentioned FIG. 2 are designated by the same reference numerals, and the description thereof will be omitted.

The video signal processing circuit shown in FIG. 1 outputs a white "1" level when the output digital data of the A / D converter 1 matches the reference digital data DH (for example, all "1") corresponding to the white level. When the output digital data of the level detection circuit 6 and the A / D converter 1 matches the reference digital data DL (for example, all “0”) corresponding to the black level, the level “1” is output.
Is provided, and the flip-flops 8 and 9 for holding the output signals of the white level detection circuit 6 and the black level detection circuit 7 respectively, and the AND gate 10 are provided, and based on the output signals of the flip-flops 8 and 9. The point that the CPU 3 updates the reference level data Dref ₁ and Dref ₂ is different from the configuration of FIG. 2 described above.

In this configuration, when the input of the video signal is started, the level of the first input terminal of the AND gate 10 is set to "1". Then, the sampling clock is input to the A / D converter 1 and also flip-flops via the AND gate 10.
Input to 8,9. Therefore, when digital data corresponding to the white level is output from the A / D converter 1, the subsequent 1
During the sampling period, the output signal of the flip-flop 8 becomes “1”, and when the A / D converter 1 outputs the digital data corresponding to the black level, the flip-flop 9 of the flip-flop 9 outputs during the subsequent sampling period. The output signal becomes "1".

The CPU 3 has flip-flops 8 and 9 at predetermined intervals.
Of the output signals are monitored to determine whether each output signal becomes "1" at least once. Then, the CPU 3 judges, based on this judgment result, whether or not the reference levels Vref ₁ and Vref ₂ corresponding to the white level and the black level may be set as they are, and it is necessary to change them. If so, the data Dref ₁ and Dref ₂ are updated.

According to this video signal processing circuit, while the output data of the A / D converter 1 is input to the frame memory 2,
White level, black level detection and reference level Vref ₁ , Vref
Optimization control of ₂ is performed. Therefore, unlike the case of the configuration shown in FIG. 2 described above, the time required to read the stored contents of the frame memory 2 is not required, and the reference levels Vref ₁ and Vr can be obtained in a short time.
ef ₂ can be controlled to the optimum value.

In the above embodiment, the reference levels Vref ₁ and Vref ₂ are determined to be optimum when at least one piece of data corresponding to the white level and the data corresponding to the black level are found within a predetermined period. The criterion for determining whether or not the level is optimum is not limited to the above-described embodiment, but can be set according to the type of image to be printed.

[Advantages of the Invention] As described above, according to the present invention, a video signal processing circuit which receives an analog video signal and sequentially outputs digital data corresponding to the video signal, and which corresponds to a white level A first reference level and a second reference level corresponding to a black level are input, and an A / D converter for A / D converting the input video signal based on the first and second reference levels A white level detecting means for comparing the digital data output from the A / D converter with first reference digital data corresponding to a white level and outputting the comparison result as a white level detection signal; The second digital data corresponding to the black level is output from the digital data output from the converter.
When the digital data output from the A / D converter exceeds the first reference digital data, the black level detection means compares the reference digital data with the reference digital data and outputs the comparison result as a black level detection signal. A reference level control means for updating the first reference level and updating the second reference level when the output digital data of the A / D converter falls below the second reference digital data. Therefore, the first and second reference levels can be adjusted in a short time, and the digital signal corresponding to the video signal can be quickly obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of a video signal processing circuit according to an embodiment of the present invention, and FIG. 2 is a block diagram showing the configuration of a conventional video signal processing circuit. 1 ... A / D converter, 6 ... white level detection circuit, 7 ... black level detection circuit, 3 ... CPU, 4 ... D / A converter, 5 ...
Comparison voltage holding circuit.

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Claims (1)

[Claims] 1. A video signal processing circuit which receives an analog video signal and sequentially outputs digital data corresponding to the video signal, the circuit corresponding to a first reference level corresponding to a white level and a black level. A second reference level is input, and the video signal input based on the first and second reference levels is input.
An A / D converter for A / D conversion, and the digital data output by the A / D converter is compared with first reference digital data corresponding to a white level, and the comparison result is output as a white level detection signal. White level detection means, and black level detection means for comparing the digital data output from the A / D converter with second reference digital data corresponding to a black level and outputting the comparison result as a black level detection signal, When the digital data output by the A / D converter exceeds the first reference digital data, the first reference level is updated, and the output digital data of the A / D converter is changed to the second reference data. And a reference level control means for updating the second reference level when the value falls below the reference digital data.