JP3130556B2 - Image reading device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image reading apparatus which performs shading correction on an analog image signal when reading an original image based on the result of reading a white reference plate.

[0002]

2. Description of the Related Art An image reading apparatus which illuminates a document surface with a light source such as a fluorescent lamp, receives reflected light from the light source by a line image sensor, and sequentially reads a document image line by line is well known.

In general, when a fluorescent lamp or the like is used as a light source, the illuminance distribution varies, and the line image sensor also varies in sensitivity for each pixel.

Therefore, in the above-mentioned image reading apparatus, in order to prevent the influence of these variations and to take out an image of a constant density at a constant image signal level, the image signal obtained from the line image sensor is subjected to shading correction. I have to.

Normally, shading correction is performed by reading a white reference plate indicating a white reference density, storing a level change of an image signal at that time, and then reading an original image.
The obtained image signal is corrected based on the level change.

For example, it is assumed that a white reference plate is read and an image signal P whose level fluctuates as shown in FIG. 8 is obtained.

At this time, conventionally, while the peak voltage Vp of the image signal P is set as a + side reference voltage of an A / D (analog / digital) conversion circuit for converting the image signal P into a digital signal,- As the side reference voltage, a voltage at a fixed ratio to the peak voltage Vp, for example, Vp / 2 is set. And in that setting state,
The white reference plate was read again.

The A / D conversion circuit converts a range from the negative reference voltage to the positive reference voltage into a predetermined digital signal value. Therefore, if the number of quantization bits of the A / D conversion circuit is 4 bits, "0000" when the image signal level is the voltage Vp / 2, and the peak voltage Vp
At this time, a digital signal value of “1111” is output.

Such a digital signal value is stored in a memory for one line for each pixel in a memory, and thereafter, an original image is read. Now, it is assumed that a document image is read and the image signal level of one pixel is Vi. It is also assumed that the stored digital signal value of the pixel is X. In this case, since the number of quantization bits is four, the number of quantization levels is “16”, and the number of levels corresponds to the range of voltage Vp / 2 or more.
The range up to corresponds to twice “32”. Accordingly, in this case, the image signal level Vi is subjected to shading correction to the image signal level Vo expressed by the following equation.

[0010]

## EQU1 ## Vo = {32 / (16 + X)}. Vi

In this case, assuming that the peak voltage Vp of the image signal is 100%, the quantization error e becomes e
= 100/32, which is a large value of about 3.1%, and the seeding correction cannot be performed with high accuracy.

One method of reducing the quantization error e is to increase the number of quantization bits. However, this method increases the cost of the A / D conversion circuit.

As another method, there is a method of increasing the negative reference voltage for the A / D conversion circuit to narrow a signal level range for converting an image signal at the time of reading a white reference plate into a digital signal.

However, according to this method, the image signal level is changed due to aging of the characteristics of the light source and the line image sensor.
When the voltage drops below the set negative reference voltage, predetermined shading correction cannot be performed.

[0015]

As described above, conventionally,
If the accuracy of shading correction is to be improved, there is a problem that the cost is increased, and it becomes impossible to cope with a change in the characteristic of the component, and it is impossible to always perform a stable operation.

SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned problems and to provide an image reading apparatus capable of constantly and stably executing high-precision shading correction without increasing costs.

[0017]

According to a first aspect of the present invention, an A / D converter for converting an analog image signal into a digital signal includes a + side reference voltage corresponding to the maximum value of the digital signal value. , The-side reference voltage corresponding to the zero level is applied. First, constant voltages are respectively applied as those reference voltages, and in that state, a white reference plate is read to extract a digital signal, and the digital signal is read out. A maximum value and a minimum value in one line are detected, and the maximum value is applied as a + side reference voltage and the minimum value is applied as a − side reference voltage. Then, in that state, a white reference plate is read and a digital signal is read. And take out
The obtained digital signal data is stored, and thereafter, the original image is read, and the level correction is performed based on the data storing the obtained analog image signal, so that predetermined shading correction is performed. I have to.

In the second invention, a peak value of an analog image signal is detected by reading a white reference plate, and the peak value is applied as a + side reference voltage, while various voltages are sequentially applied as a − side reference voltage. At the same time, each time one voltage is applied, the white reference plate is read to extract a digital signal.
There is no zero signal value in the line, and one voltage with the maximum applied voltage is applied as a − side reference voltage, and in that state, a white reference plate is read to extract a digital signal,
The digital signal data obtained in this way is stored, and shading correction is performed in the same manner as described above.

[0019]

According to the invention, the conventional A / D conversion means can be used as it is, and the reference voltage on the + side and the-side always have the maximum value of the image signal at the time of reading the white reference plate. And the minimum value are set correctly.

Therefore, even if the image signal level changes due to aging of the light source or the line image sensor, the signal level range to be converted into a digital signal can be set to be the narrowest according to the image signal at that time.

As a result, high-precision shading correction can always be performed stably without increasing the cost.

[0022]

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram of an image reading apparatus according to a first embodiment of the present invention. In the figure, a light source 1 includes a white reference plate 2 and a reading original 3 passing therethrough.
Is to illuminate. Image light from the white reference plate 2 or the read original 3 is reflected by the mirror 4, condensed by the lens 5, and is incident on the line image sensor 6.

An image signal output from the line image sensor 6 is input to an amplifier 7, and the output of the amplifier 7 is
It is input to the variable gain amplifying circuit 8. The variable gain amplifying circuit 8 can set the gain arbitrarily. The variable gain amplifier 8 includes a signal from the RAM 9 and a CPU.
10 and the output signal is A /
It is input to the D conversion circuit 11 and the peak hold circuit 12.

The output of the selector 13 is input to the A / D conversion circuit 11 as a + side reference voltage Vref (+), and one output of the voltage generation circuit 14 is input as a − side reference voltage Vref (−). . Selector 13
The output of the peak hold circuit 12 and the voltage generation circuit 1
4 and the other output.

The output of the A / D conversion circuit 11 is input to the RAM 9, the digital image processing unit 15, and the fluctuation range detection circuit 16. The CPU 10 has the fluctuation range detection circuit 1
6 to control the variable gain amplifying circuit 8, the selector 13, and the voltage generating circuit 14. In addition to these, the light source 1 is turned on or off, and a read original 3 not shown
The transport mechanism is controlled.

With the above configuration, it is assumed that the image reading apparatus of the present embodiment has started.

When the image reading apparatus starts, the light source 1 is first turned on as shown in FIG. 2 (step 101). Next, the voltage generation circuit 14 generates a constant voltage Vr and a voltage of 0 volt. The voltage of 0 volt is applied as the negative reference voltage Vref (−) of the A / D conversion circuit 11. At this time, the selector 13 inputs the constant voltage Vr generated by the voltage generation circuit 14 and converts the voltage to the + side reference voltage Vr of the A / D conversion circuit 11.
It is applied as ef (+) (process 102). Next, the gain of the variable gain amplifier circuit 8 is set to “1” (Process 1).
03).

In this state, the reading scan of the white reference plate 2 is executed. Thus, the line image sensor 6 outputs one line of the image signal. The amplifier 7 amplifies the image signal,
The variable gain amplifying circuit 8 receives the image signal, and in this case, outputs the image signal P at the same signal level.

The constant voltage Vr is set in advance so as to be higher than the maximum level of the image signal P output from the variable gain amplifier 8 at this time. For this reason,
As shown in FIG. 3, the image signal P fluctuates in a constant level range equal to or lower than the constant voltage Vr.

The A / D conversion circuit 11 converts the range of the image signal P from the negative side reference voltage Vref (−) to the positive side reference voltage Vref (+), that is, the range from 0 volts to the constant voltage Vr. Convert to signal value. The fluctuation range detection circuit 16 detects the maximum value Vmax and the minimum value Vmin in one line section from the signal value of the digital signal (process 104).

The CPU 10 calculates the fluctuation rate D from the maximum value Vmax and the minimum value Vmin according to the following equation.

[0033]

D = (Vmax−Vmin) / Vmax

Then, the calculated fluctuation rate D is compared with a predetermined constant value T1 (decision 105). Here, if the fluctuation rate D is equal to or smaller than the fixed value T1 (N in judgment 105), the maximum value Vmax is further compared with a predetermined constant value T2 (judgment 106).

If the maximum value Vmax is equal to or greater than the fixed value T2 (N in decision 106), the voltage generation circuit 14
Then, each voltage value of the maximum value Vmax and the minimum value Vmin is output. Then, the voltage value of the maximum value Vmax is represented by A /
+ Side reference voltage Vref (+) of D conversion circuit 11
And the voltage value of the minimum value Vmin is applied as the negative reference voltage Vref (−) (Process 10
7).

In this state, the white reference plate 2 is read and scanned again as described above. Now, it is assumed that the number of quantization bits of the A / D conversion circuit 11 is, for example, 4 bits. In this case, as shown in FIG. 4, the A / D conversion circuit 11 divides the range from the minimum value Vmin to the maximum value Vmax of the input image signal P into 16 equal parts and changes the range from "0000" to "1111".
Output each digital signal. The RAM 9 stores the digital signal value of each pixel output in this manner for one line (process 108).

Thereafter, reading of the original image is started.
That is, the reading scan is executed line by line while the reading document 3 is conveyed and sub-scanned (step 109).

At this time, the RAM 9 sequentially outputs the stored digital signal values of the respective pixels in synchronization with the reading scan of each line. The variable gain amplifying circuit 8 amplifies the image signal of each line obtained by reading the original image while changing the gain based on the digital signal value (Process 11).
0). As a result, the image signal P output from the variable gain amplifying circuit 8 has been subjected to shading correction.

The peak hold circuit 12 outputs the image signal P
, The peak value Vp is detected for each line. At this time,
The selector 13 inputs the peak value Vp and sets the A / D
It is applied to the conversion circuit 11 as a + side reference voltage Vref (+). Further, the voltage generation circuit 14 applies 0 volt as the negative reference voltage Vref (−) (process 111).

Thus, the A / D conversion circuit 11 converts the image signal P from the 0 level to the peak value Vp into predetermined digital signals. And the digital image processing unit 1
5 is for the image information changed to the digital signal,
For example, various processes such as display and recording are executed (process 1).
12).

On the other hand, in the above description, the fluctuation rate D is a constant value T
1 (Y in decision 105) or when the maximum value Vmax is less than the fixed value T2 (decision 1
06, Y), for example, an alarm is issued to alert the user of the abnormality by an alarm sound or lamp display (step 113). Thereafter, the same processing is executed (to processing 107).

Generally, the fluctuation range of the image signal P when reading the white reference plate 2 is as small as 20 to 30% of the maximum value. Now, for example, as shown in FIG. 4, it is assumed that the fluctuation width of the image signal P, that is, the width between the maximum value Vmax and the minimum value Vmin is 25% of the maximum value Vmax.

In this case, the maximum value Vmax and the minimum value Vmi
Since the width between n is quantized by 4 bits, the number of quantization levels becomes 16. The maximum value Vmax is four times that,
The minimum value Vmin is three times as large as “4”.
8 ".

Therefore, assuming that the image signal level of one pixel input to the variable gain amplifier circuit 8 is Vi and the signal value of the image signal stored in the RAM 9 is X, the variable gain amplifier circuit The shading correction is performed to the image signal level Vo shown in FIG.

[0045]

## EQU3 ## Vo = {64 / (48 + X)}. Vi

In this case, the peak voltage Vp of the image signal is set to 10
Assuming 0%, the quantization error e is e = 100 /
64, or about 1.6 percent.

As described above, in this embodiment, the white reference plate 2
Is read, a constant voltage is first set to each of the reference voltages Vref (+) and Vref (−) of the A / D conversion circuit 11, an image signal is taken out, and then the maximum value Vmax of the image signal is set. The minimum value Vmin is set to each of the reference voltages Vref (+) and Vref (-) to extract a digital signal value.

Accordingly, it is possible to correctly set the minimum value Vmin of the image signal to zero of the digital signal value and the maximum value Vmax to the maximum value of the digital signal value.

As a result, the shading correction can always be performed stably, the quantization error at the time of digital conversion of the image signal is reduced, and the correction accuracy is improved. Also,
In this case, the number of quantization bits is the same as the conventional one, and the apparatus cost does not increase.

In this embodiment, if the fluctuation range of the image signal exceeds a certain value or the maximum value is less than a certain value, an alarm is output, so that the operator can reduce the light amount of the light source 1 due to aging or the like. And the characteristic deterioration of the line image sensor 6
You can easily find out.

It should be noted that the + side reference voltage Vref (+) of the A / D conversion circuit 11 is set to a value slightly higher than the maximum value Vmax of the image signal, and the − side reference voltage Vref (−) is set to the minimum value Vmin. A slightly lower value may be set. Thereby, it is possible to cope with the fluctuation of the signal level after each voltage setting.

In the above embodiment, when the image signal level is low, an alarm is immediately output. However, after waiting for a certain period of time, the image signal level is detected again and an alarm is output if the image signal level is still low. You may do so. This operation is effective when a light source such as a fluorescent lamp, which takes a long time to increase the light amount, is used.

Next, a second embodiment of the present invention will be described.

FIG. 5 is a block diagram showing the arrangement of the image reading apparatus of this embodiment. In the figure, the same reference numerals as those in FIG. 1 denote the same blocks, and in the same figure, the components of the optical system, the line image sensor 6 and the amplifier 7 are omitted.

In the figure, the output signal of the peak hold circuit 12 is applied as a + side reference voltage Vref (+) of the A / D conversion circuit 11 and is also input to the variable voltage dividing circuit 17. The variable voltage dividing circuit 17 divides an input voltage at various voltage dividing ratios, and its output is applied as a negative reference voltage Vref (−) of the A / D conversion circuit 11. The zero data determination circuit 18 determines the presence or absence of a signal value “0” in the output signal of the A / D conversion circuit 11. The CPU 10 inputs the determination result and controls the variable voltage dividing circuit 17 and other components.

With the above configuration, when the image reading apparatus of this embodiment is started, as shown in FIG. 6, first, the light source 1 is turned on (processing 201), and the gain of the variable gain amplifying circuit 8 is set to "1".
(Step 202). Further, the CPU 10 sets the variable Div on the control program to Div = 0.5 (process 203).

Then, the reading scan of the white reference plate 2 is executed. As a result, the image signal P is output from the variable gain amplifying circuit 8, and the peak hold circuit 12 detects the peak value Vp of the image signal P (Step 204).

Here, the variable Div is set in the variable voltage dividing circuit 17 as a voltage dividing ratio. As a result, the peak value Vp of the image signal P is applied as the + side reference voltage Vref (+) of the A / D conversion circuit 11, and the peak value Vp
A voltage corresponding to the product of p and the variable Div is applied as the negative reference voltage Vref (-) (process 20).
5).

Thereafter, the reading scan of the white reference plate 2 is executed again. Thus, the A / D conversion circuit 11 converts the range of the voltage value of the image signal P from 0.5 · Vp to Vp into a digital signal. The zero data determination circuit 18 determines whether the signal value of the digital signal has become “0” within one line (decision 207).

Now, assuming that the image signal P fluctuates at a level higher than the voltage value 0.5.Vp as shown in FIG. 7, the signal value of the digital signal is "0" for all the pixels of one line. Will be exceeded. Thus, the signal value "0"
If there is no (N in judgment 207), "0.1" is added to the variable Div (process 208), and the same operation is executed (to process 205). If the digital signal does not have the signal value “0”, the operation is further repeated.

As a result, the negative reference voltage Vre
f (−) increases by 0.1 · Vp. Now, the − side reference voltage Vref (−) has a voltage value of 0.7 ·
It is assumed that the signal level of the image signal P has been exceeded as shown in the section a in Vp. Then, in that section, the signal value of the digital signal becomes “0”.

When the signal value “0” is detected as described above (Y in decision 207), the variable Div is subtracted by “0.1” to control the variable voltage dividing circuit 17. As a result, the voltage value before exceeding the signal level of the image signal P is applied as the negative reference voltage Vref (-) (Process 20).
9).

After that, the operations after the process 108 described in FIG. 2 are executed in the same manner. That is, the reading scan of the white reference plate 2 is executed, and the digital signal value of the image signal at that time is represented by R
Store in AM9. Then, the scanning of the original document and the gain control of the variable gain amplifying circuit 8 based on the signal value are started.
Also, the + side reference voltage Vr of the A / D conversion circuit 11
A peak value Vp of the image signal P is applied to ef (+), and 0 volt is applied to the negative reference voltage Vref (−). In this state, the document image is read and processed by the digital image processing unit 15.

As described above, in this embodiment, the white reference plate 2
When reading is performed, the + side reference voltage Vref (+) of the A / D conversion circuit 11 sets the peak value Vp of the image signal, while the − side reference voltage Vref (−) is set from the voltage value 0.5 · Vp. While increasing by 0.1 · Vp, the digital image signal obtained during the period is determined. And
When the signal value “0” is detected, the negative side reference voltage V
ref (−) is set to the immediately preceding voltage value.

As a result, the image signal can always be converted into a digital signal in the level range corresponding to the fluctuation width when reading the white reference plate, as in the above-described embodiment. Thus, the correction accuracy in shading correction is improved.

In this case, the zero data determination circuit 18 for checking the output signal of the A / D conversion circuit 11 only determines the presence or absence of the signal "0". , The circuit becomes simple. A / D
Since only the peak hold circuit 12 and the variable voltage dividing circuit 17 are required to apply the reference voltage to the conversion circuit 11, the circuit is simpler and the number of circuits can be reduced as compared with the case of FIG.

In the above embodiment, the negative reference voltage Vref (-) is increased by 0.1.Vp from a low value of 0.5.Vp, but the increase level in one step is arbitrary. Of course, it can be set to. Alternatively, the voltage may be sequentially decreased from a high voltage, and set to a voltage value that first becomes smaller than the minimum value of the image signal.

[0068]

As described above, according to the first aspect of the present invention, a constant voltage is first applied as a reference voltage of the A / D conversion means to read the white reference plate, and the image signal detected at that time is read. Since the predetermined processing is performed by applying the maximum value, the minimum value, and the reference voltage, the conventional A / D conversion means can be used as it is, and the reference voltage always reads the white reference plate. Since the maximum value and the minimum value of the image signal at the time are correctly set, it is possible to always perform high-precision shading correction stably without increasing the cost.

According to the second aspect, the peak value of the image signal detected by reading the white reference plate is applied as the + side reference voltage, while various voltages are sequentially applied as the − side reference voltage. From the obtained digital image signal, one voltage corresponding to the minimum value of the image signal is determined and-
Since the voltage is applied as the side reference voltage, similarly to the above, high-precision shading correction can always be executed stably without increasing the cost.

[Brief description of the drawings]

FIG. 1 is a block diagram of an image reading apparatus according to a first embodiment of the present invention.

FIG. 2 is an operation flowchart at the time of image reading.

FIG. 3 is an explanatory diagram of an image signal at the time of reading a first white reference plate.

FIG. 4 is an explanatory diagram of an image signal at the time of a second white reference plate reading.

FIG. 5 is a block diagram of an image reading apparatus according to a second embodiment of the present invention.

FIG. 6 is an operation flowchart at the time of image reading in the embodiment.

FIG. 7 is an explanatory diagram of an image signal when reading a white reference plate in the embodiment.

FIG. 8 is an explanatory diagram of an image signal when reading a conventional white reference plate.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 light source 2 white reference plate 3 read document 4 mirror 5 lens 6 line image sensor 7 amplifier 8 variable gain amplifier circuit 9 RAM 10 CPU 11 A / D conversion circuit 12 peak hold circuit 13 selector 14 voltage generation circuit 15 digital image processing unit 16 Fluctuation range detection circuit 17 Variable voltage dividing circuit 18 Zero data judgment circuit

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-1-170167 (JP, A) JP-A-63-78666 (JP, A) JP-A-62-173855 (JP, A) JP-A-63-173855 287161 (JP, A) JP-A-2-311083 (JP, A) JP-A-3-69271 (JP, A) JP-A-2-234572 (JP, A) JP-A 4-119071 (JP, A) JP-A-4-65972 (JP, A) JP-A-4-137973 (JP, A) JP-A-3-79563 (JP, U) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04N 1/401 G06T 1/00 460

Claims (3)

(57) [Claims] 1. A white reference plate or a document image is read and
Reading means for extracting an analog image signal line by line, A / D conversion means for converting the analog image signal into a digital image signal, and a + side reference corresponding to the maximum digital signal value to the A / D conversion means A voltage application means for applying a voltage and a negative reference voltage corresponding to the zero level, wherein the image reading apparatus performs shading correction of an analog image signal when reading an original image based on the result of reading the white reference plate. A constant voltage applying means for applying a constant voltage as the reference voltage and a negative reference voltage, a white reference plate first reading means for reading a white reference plate and applying a digital image signal with the constant voltage applied, and the digital image signal A maximum / minimum detecting means for detecting a maximum value and a minimum value in one line; And a maximum final voltage applying means for applying the minimum value voltage as the negative reference voltage, and reading the white reference plate with the maximum value and the minimum value applied to read a digital image signal. A second reading unit for reading a white reference plate, a storage unit for storing digital image signal data obtained by reading the white reference plate, a document reading unit for reading a document image to extract an analog image signal, and an analog image signal And a shading correction unit for performing a level correction based on the data storing the data. 2. Reading a white reference plate or a document image and
Reading means for extracting an analog image signal line by line, A / D conversion means for converting the analog image signal into a digital image signal, and a + side reference corresponding to the maximum digital signal value to the A / D conversion means A voltage applying means for applying a negative reference voltage corresponding to the voltage and the zero level, wherein the image reading device performs shading correction of an analog image signal when reading an original image based on the reading result of the white reference plate. Value detecting means for reading the peak value of the analog image signal by reading the analog image signal, peak value applying means for applying the peak value as the + side reference voltage, and various voltages for sequentially applying various voltages as the-side reference voltage The white reference plate is read every time one voltage is applied by the application means and the various voltage application means, and a digital image signal is read. A first reading means for reading out the reference plate, and one voltage having no maximum signal value and no applied signal value in one line among the digital image signals corresponding to the various voltages, is applied as the negative reference voltage. One voltage application means, a second reference plate reading means for reading out the digital signal by reading the white reference plate in a state where the one voltage is applied, and a storage means for storing data of the digital signal obtained by reading the white reference plate An image reading device for reading a document image and extracting an analog image signal, and shading correction means for performing a level correction based on the data storing the analog image signal. 3. The variable voltage applying means for dividing the peak value of the analog image signal detected by the peak value detecting means at various voltage dividing ratios and applying the divided voltage as the negative reference voltage. 3. The image reading apparatus according to claim 2, further comprising a partial pressure ratio control unit that sequentially changes the partial pressure ratio.