JPS63175576A - Signal processing circuit for picture reader - Google Patents

Abstract

PURPOSE:To decrease the level fluctuation of a signal handled by a signal processing circuit such as a correction circuit by monitoring an output level of an A/D converter so as to hold its peak level and applying an analog signal to a reference level input terminal of the A/D converter in response to the peak level. CONSTITUTION:The analog-digital (A/D) converter 310 is provided with a reference voltage input terminal Vref to apply A/D conversion of a signal fed to an analog signal input terminal Ain in response to the voltage level fed to the terminal. The peak level of a picture signal is detected by a digital peak hold circuit 320 and a signal converting the digital peak level into an analog level is used as a voltage Vr and fed to a reference voltage input terminal Vref of the A/D converter 310. An output signal SD1 of the A/D converter 310 is fed to a read/write memory 380 and a read only memory 390 of a shading correction circuit. Thus, even when a comparatively large luminous quantity change takes place in an exposure lamp, the change does not give effect onto the signal level processed by the signal correction circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to a signal processing circuit for an image reading device that reads an image using a light-receiving element such as a COD image sensor, and particularly to correction of variations in signal level.

[Background Art] An image reading device, that is, an image scanner reads an image at each scanning position while performing main scanning and sub-scanning on a document, thereby reading a two-dimensional image on the document. Generally, an image scanner includes a -dimensional image sensor and performs main scanning by solid-state scanning. Sub-scanning is performed by moving at a constant speed by a mechanical drive means any one of the document itself, a document table on which the document is placed, and an optical system that guides a light image from the document to an image sensor. Note that recent video cameras use two-dimensional image sensors to
Both main scanning and sub-scanning are performed by solid-state scanning.

In the case of an image scanner using a one-dimensional image sensor, the level of the image reading output for one main scanning line obtained from the output varies from pixel to pixel even when an image with the same density is read for all pixels. This is due to the following reason.

(,) The level of light that illuminates the original varies in the main scanning direction.

(b) Due to the characteristics of the lens that guides the reflected light from the original to the image sensor, the amount of attenuation of the light that passes through the lens varies in the main scanning direction.

(C) There are variations in sensitivity among the light receiving elements of the image sensor itself.

Therefore, in order to read the image density faithfully to the original image,
It is necessary to correct the detection sensitivity for each pixel in the main scanning direction. This type of correction is called shading correction.

Generally, when performing shading correction, a standard density pattern having a uniform density is placed on an image reading surface and the pattern is read. A correction coefficient is determined for each pixel so that the level difference between pixels in the main scanning direction of the image signal obtained by reading the image signal is eliminated.

When reading a document, the level of the signal output from the image sensor is calculated and corrected using a correction coefficient assigned to each pixel.

This type of shading correction processing is actually performed as follows.

The analog signal output from the image sensor is converted into an A/D
A converter converts it into a digital signal.

When reading the reference density pattern, the digital signal obtained at the output of the A/D converter is stored in RAM (read/write memory). In this case, the RAM address is updated for each pixel, and all image data for one main scanning line is stored in the RAM. When reading an original image, a digital signal output from an A/D converter is applied to an address terminal of a ROM (read-only memory). At the same time, information corresponding to the pixel position in the main scanning direction at that time is applied to the address terminal of the RAM, and the data output from the RAM is transferred to the ROM.
is applied to address terminals other than those mentioned above. In the ROM, a conversion table for shading correction processing, that is, correction result data using the image information level and the RAM storage level as parameters, is stored at an address associated with each parameter value.

In this type of shading correction device, the number of bits of data to be handled, that is, the memory capacity of RAM and ROM, is determined depending on the magnitude of variation in the level of input image signals.

Incidentally, the magnitude of the level variation to be subjected to shading correction corresponds to the difference between the maximum level and minimum level of the signal in one main scanning line. However, the image reading sensitivity of an image scanner varies greatly depending on the state of the device at that time, so in an actual shading correction device, the image scanner sensitivity varies from the maximum signal level when the image scanner sensitivity is maximum to the minimum signal level. In order to cover the range of level changes up to the minimum level of the signal at the time of It needs to be set much larger than the number. Increasing the number of bits requires a larger memory capacity, making the device more expensive. If the number of bits is small, sufficient shading correction cannot be performed.

In particular, when a fluorescent lamp is used as a light source for an image scanner, the amount of light from the fluorescent lamp changes greatly depending on its tube temperature, so the sensitivity of the image scanner changes significantly, that is, the signal level changes significantly. Note that in order to reduce changes in the light intensity of fluorescent lamps, a technique has also been proposed in which a heater is wrapped around the tube of the fluorescent lamp to control the temperature of the fluorescent lamp.

In general equipment, by using an amplifier equipped with an AGC (auto gain control) circuit,
Fluctuations in signal level can be reduced. However, since image scanners handle signals with extremely high frequencies, even if an AGC circuit is installed in the amplifier that amplifies the signals, the gain cannot be varied over a wide range, and it is difficult to change the gain due to changes in the light intensity of fluorescent lamps. cannot compensate for corresponding signal level fluctuations.

[Object of the Invention] An object of the present invention is to reduce level fluctuations in signals handled by a signal processing circuit such as a shading correction circuit.

[Structure of the Invention] In order to achieve the above object, in the present invention, the image reading means holds the signal level when reading the reference density pattern, and converts the signal corresponding to the level into A/D (analog/digital). Applied to the reference level input terminal of the converter.

An A/D converter having a reference level input terminal converts an analog signal into a digital signal based on the level applied to the input terminal. Therefore, the scale of conversion can be adjusted by adjusting the level Vr of the signal applied to the reference level input terminal. For example, Vr is 5v
In an A/D converter that outputs full-scale digital data for an analog level of 5V when Vr
When is changed to 1■, full scale digital data is output for an analog level of 1V. This level V
Changing r has no effect on the conversion speed. Therefore, by adjusting the level Vr according to the level of the input analog signal, that is, the image reading sensitivity of the image reading device at that time, changes in the sensitivity of the image reading device can be prevented from appearing in the output of the A/D converter. can.

Therefore, in a preferred embodiment of the present invention described below,
When the TH image reading device reads the reference density pattern, A/
The output level of the D converter is monitored and its peak level is held, and an analog signal corresponding to the peak level is sent to the A/D converter.
The configuration is such that the voltage is applied to the reference level input terminal of the D converter. In this way, the peak level of the signal output by the image reading device can always be made to match the full scale of the A/D converter.

Therefore, in the shading correction circuit connected to the output of this A/D converter, only the difference between the maximum level and the minimum level of the signal in one main scanning line is subject to level correction, so there is no need for correction processing. The number of bits of data to be stored becomes smaller, and the memory capacity becomes smaller.

Other objects and features of the present invention will become apparent from the following description of embodiments with reference to the drawings.

[Embodiment] FIG. 2 shows the configuration of a mechanical section of an image scanner of one type that implements the present invention. Referring to Figure 2, the contact glass 1 on which the original is placed is placed on the top of the image scanner.
is located. Below the surface of contact glass 1,
Equipped with an optical scanning system. This optical scanning system includes a first
A carriage 8 and a second carriage 9 are provided. ,y
In order to keep the optical path length from the X document to the image sensor 50 constant, the second carriage 9 is driven to reciprocate and scan at the same time as the first carriage 8 at a speed of 172.

The first carriage 8 includes two fluorescent lamps 7a, 7b and a first
A mirror 41 is provided. The second carriage 9 is equipped with a second mirror 42 and a third mirror 43. The light from the fluorescent lamps 7a and 7b is directed toward the document placed on the contact glass 1''2. The reflected light from the original is reflected by the first mirror 41. The light passes through the second mirror 42 and the third mirror 43, passes through the imaging lens 5, and is guided to the light receiving surface of the image sensor 50.

The image sensor 50 is a -dimensional CCD image sensor and includes a large number of light receiving elements arranged in a line in the main scanning direction, that is, in a direction perpendicular to the plane of the drawing. Therefore, the image sensor 50 can read image information for 1942 main scans. By energizing the electric motor 10, the first carriage 8 and the second carriage 9 are driven, and sub-scanning is performed in the left and right directions in FIG.

By reading the output signal of the image sensor 50 while performing sub-scanning, a two-dimensional image of the document can be read.

In this example, the left end of FIG. 2 is the scanning start position of the optical scanning system, that is, the home position. A reference density pattern 6 is arranged on the contact glass 1 near the home position. This pattern 6 is elongated in the main scanning direction, that is, in the direction perpendicular to the plane of the paper in FIG. It has a similar light reflectance. This is used when automatically adjusting image reading sensitivity and performing shading correction.

FIG. 3 shows the electrical circuit configuration of the device shown in FIG. 2.

Referring to FIG. 3, this device includes an image sensor 5.
0. Main controller 100. Timing generation circuit 150. Amplifier 200. Signal processing circuit 300° Motor drive circuit 40
0. Fluorescent lamp lighting circuit 500 and interface circuit 6
00 is provided.

Image information read by this image scanner is output to an output device, such as a plotter, connected to this device via an interface circuit 600.

SW is a start switch for instructing the start of image reading. SEI and SF3 are position sensors for detecting the scan start position and scan end position of the optical scanning system, respectively. At the output of the motor drive circuit 400,
An electric motor 10 is connected which drives the optical scanning system. Two fluorescent lamps 7a and 7b are connected to the fluorescent lamp lighting circuit 500.

The main control device 100 includes a microcomputer and controls the entire device through software processing. Various timing signals for controlling the image sensor 50 and various timing signals transmitted and received between devices connected to the interface circuit 600 require high-speed processing, so timing generation is performed based on instructions from the main controller 100. Circuit 150 controls. Image sensor 5
0 has two output terminals O8 and C8. The amplifier 200 is a differential amplifier, and amplifies and outputs the difference between two signals output from the image sensor 50.

The configuration of the signal processing circuit 300 is shown in detail in FIGS. 1 and 4. First, refer to FIG.

The analog signal SA output from the amplifier 200 is A/
It is applied to the analog signal input terminal Ain of the D (analog/digital) converter 310. The A/D converter used in this embodiment is equipped with a reference voltage input terminal Vref, and the A/D converter of the signal applied to the 5 analog signal input terminal Ain is adjusted according to the level of the voltage applied to the reference voltage input terminal Vref. Perform D conversion. The conversion result (6 bits) is output to the digital signal output terminal Dout.

A digital peak hold circuit 320 is connected to the output terminal of the A/D converter 310. This digital peak hold circuit 320 includes multiplexers 321 . Latch 322. Digital comparator 323. It includes an AND gate 324 and an OR gate 325. The multiplexer 321 selects one of the input terminal groups A and B according to the level of its control terminal S, and transfers the signal applied to the selected input terminal group to the output terminal Y.
Output to. The comparator 323 outputs a binary signal to its output terminal (A, > B) according to the magnitude relationship between the value of the signal applied to the input terminal group A and the value of the signal applied to the input terminal group B. .

In the initial state, the signal CLEAR becomes high level H, and the control terminal S of the multiplexer 321 becomes H, so the multiplexer 321 selects the input terminal group A. Therefore, the output signal of A/D converter 310 is applied to latch 322. Also, at the timing of each pixel signal, the signal C
A pulse appears on LKI and the output signal of multiplexer 321 is held in latch 322.

When peak hold operation starts, signal CL E A R
is set to L, and the signal GATE becomes high only during the period when valid main scanning data appears.

The input terminal groups A and B of the comparator 323 include
The output signal of the A/D converter 310 and the latch 3, respectively.
22 output signals are applied. When the value of the output signal of the A/D converter 310 is less than or equal to the value of the signal held in the latch 322, the output terminal A>B of the comparator 323 is at a low level, and the multiplexer 321 selects the input terminal group B. , the value of the signal output from the latch 322 is applied to the input terminal of the latch 322 and held again.

When the value of the output signal of the A/D converter 310 exceeds the value of the signal held in the latch 322, the output terminal A>B of the comparator 323 switches to H, and the multiplexer 321
selects its input terminal group A, so the new signal value (the maximum value so far) output by A/D converter 310 is applied to the input terminal of latch 322 and held.

Therefore, the value of the signal that appears at the output terminal of the latch 322 when scanning for one line of main scanning is completed is
This is the maximum level value of the image signal in the line.

-15= The signal output by the digital peak hold circuit 320 is
It is applied to input terminal group A of multiplexer 340. Input terminal group B of multiplexer 340 includes:
A predetermined fixed value output by the fixed value generator 330 is applied. The multiplexer 340 selects the input terminal group A according to the level of the signal SEL applied to the control terminal S.
and B, and outputs the value of the signal applied thereto to output terminal group Y.

The output terminal group Y of multiplexer 340 is D/A
(digital/analog) converter 350 . The analog signal output from the analog output terminal of the D/A converter 350 is sent to the amplifier 360.
The reference voltage input terminal Vr of the A/D converter 310
applied to ef.

The full scale level of the A/D converter 310 is determined by the terminal Vr.
It changes depending on the voltage applied to ef. For example, terminal V
If the full-scale voltage when the voltage Vr applied to ref is 4V is vl, then when the voltage Vr is changed to 1.2V, the full-scale voltage changes to v1/4. Conversely, A/
If the analog input level of the D converter is 25% of the full scale level, the input level at that time can be made to match the full scale by reducing Vr to 1/4. .

In this example, the peak level of one image signal in several main scanning lines when the optical scanning system reads the image of the reference density pattern 6 is determined by the digital peak hold l818 circuit 3.
20 and converts the digital peak level to an analog level, the A/D converter 3 uses the signal as the voltage Vr.
The voltage is applied to the reference voltage input terminal Vref of No. 10.

The reference density pattern 6 is colored white and has a higher light reflectance than any of the commonly used originals. Therefore, when reading the image of the reference density pattern 6, the A/
Applying the peak value of the output signal level of the D converter 310 to the reference voltage input terminal Vref of the A/D converter 310 means that the maximum value of the signal input to the A/D converter 310 This means matching the full scale level of the converter 310.

The level (voltage) of the analog signal SA applied to the input terminal of the A/D converter 310 is determined by the level of light received by the image sensor 50, the sensitivity of each light receiving element of the image sensor 50, and the output of each light receiving element. It changes depending on the amplification degree of the circuit (including the amplifier 200) that processes the signal. The level of light received by the image sensor 50 is the same as that of the fluorescent lamps 7a, 7.
The amount of light emitted by b is determined by the light reflectance of the image reading surface and the light transmission characteristics of the optical scanning system.

There are variations in the sensitivity of each light receiving element of the image sensor 50, and the light transmission characteristics of the optical scanning system change depending on the position in the main scanning direction due to differences in the amount of attenuation due to the difference in the optical path position of the lens. do. Therefore.

Even when reading an image of the reference density pattern 6 with uniform density, the level of the signal SA changes at each position in the main scanning direction, as shown in FIG. The nonlinear characteristics of this type of image reading system in the main scanning direction are corrected by shading correction, which will be described later.

However, since the amount of light emitted by the fluorescent lamps 7a and 7b changes considerably depending on the tube temperature of the fluorescent lamp, the level of the signal SA may change significantly in addition to the change in position in the main scanning direction. .

In shading correction, variations in signal levels at individual pixel positions are detected and corrected, so originally, the maximum level Lp and minimum level of the signal SA at that time in one main scan shown in Fig. 5 should be adjusted. Range L between Lm
It is sufficient if the level can be monitored only at d. However, the signal S
Since the maximum level rp and the minimum level Lm of A are not constant and change according to changes in the light intensity of the fluorescent lamps 7a and 7b, if the level changes are not corrected, the shading correction circuit SA must be monitored over a wide range of levels.

This leads to an increase in the memory capacity required for the shading correction circuit, for example.

Therefore, in this device, the level corresponding to the peak value of the level of the signal SA when reading the reference density pattern 6 is set to the reference voltage input terminal Vref of the A/D converter 310.
It is configured so that it is applied to

In this way, regardless of the magnitude of the light intensity of the fluorescent lamps 7a and 7b, the value of the digital signal output from the A/D converter 310 when reading the reference density pattern 6 will always be such that the signal SA is at the peak level Lp. Sometimes the full scale level (L
f).

Therefore, when performing shading correction by processing the level-corrected digital data output from the A/D converter 310, the A/D converter 310 must be within the range between the maximum level Lp and the minimum level Lm of the signal It is sufficient to monitor the range from the full scale value of the D converter 310 to a value equivalent to level Ld.

In other words, the number of bits of data to be monitored by the shading correction circuit can be made smaller than the number of bits of the output terminal of the A/D converter 310 in terms of level variations. Further, the A/D converter 31 may have relatively coarse resolution.

The circuit shown in FIG. 4 included in the signal processing circuit 300 is a shading correction circuit. This will be explained with reference to FIG.

The output signal SDI of the A/D converter 310 is
(Read/write memory) 380 data input terminals DI and RO
It is applied to the lower address terminal group AL of M (read-only memory) 390.

The address terminal of the RAM 380 has an address counter 3.
70 output terminals are connected. This address counter 370 is cleared by the signal CLEAR2 at the start of each main scan, and counts up by the clock pulse CLK2 which is cursed at the timing of each pixel. That is,
The value of the signal output by the address counter 370 matches the pixel position in the main scanning direction.

The operation of the shading correction circuit is based on the A/D converter 3.
This is executed after the level setting of the 10 reference voltage input terminals Vref is completed. When the optical scanning system is reading the image of the reference density pattern 6, a pulse is output to the signal WE at each pixel position in one main scanning line, and a pulse is output to the signal WE.
The value of DI is stored in each memory address (pixel address) of the RAM 380.

When this process is completed, shading correction process can be started. ROM390 lower address terminal group A
The signal SDI of the image read at that time is applied to L,
Data output from the RAM 380 is applied to the upper address terminal group AH.

Here, changes in the value of data output by the RAM 380 correspond to variations in sensitivity to be corrected for shading. In other words, at any n-th pixel in the main scanning direction, R
, AM380 outputs data is Kn, the value of Kn is maximum (full scale) when the sensitivity is maximum, and as the sensitivity decreases, Kn decreases. Therefore, K
If the maximum value of n is 1, input data Dn is 1 / K
By multiplying by n, shading correction can be performed so that the sensitivity at all pixel positions is the same.

The ROM 390 stores the calculation results of Dn/Kn for all parameters (Dn, Kn), input data Dn at the lower address (AL), and correction coefficient Kn at the upper address (A
H) is stored in advance at a memory address. Therefore, by simultaneously applying the data (Kn) stored in the RAM 380 and the input data Dn to the address terminal of the ROM 390, the shading corrected result appears on the signal line SD2.

The number of bits of the signal line SDL is six. However, in this example, the sensitivity variation in the main scanning direction, that is, the maximum level L
The difference Ld between P and the minimum level Lm is less than 50% of LP. Further, in this example, in the output of the A/D converter 310, Lp substantially matches the full-scale level Lf. Therefore, when reading the reference density pattern 6, the SDI level is always 50% or more of the full scale, that is, the MSB (most significant bit) is always H during the period when a valid signal is obtained.

Therefore, in reality, the data input terminal D of R, AM380
Only the lower 5 bits excluding the MSB of the signal line SDI are connected to I. Therefore, the signal applied to the address terminal group AH of the ROM 390 is K n −M S
It is B. Therefore, the ROM 390 is actually D n
/(K n +MSB) is configured to output the processing result. According to this configuration, address terminal AH
Compared to the case where a 6-bit signal is applied to the address terminal, the number of address terminals is reduced by 1 bit, so the memory capacity required for the ROM 390 is halved.

FIG. 6 shows an outline of the overall operation of the main controller 100,
FIG. 5 shows an example of the waveform of each signal line. The operation of main controller 100 will be described with reference to FIGS. 5 and 6.

When the power is turned on, initialization is performed. That is, the states of various output ports are set to off level, the contents of the internal memory are cleared, the electric motor 1o is driven, and the optical scanning system is positioned at the home position. Note that the home position is slightly to the left of the position indicated by the two-dot chain line in FIG. When preparations for image reading are completed, check the state of the start switch Sw.

When the SW is turned on, the signal FLON is first set to H, and the fluorescent lamps 7a and 7b are turned on. Next, H is output to MTON=24-, L is output to RVSON, and forward scanning is started. Furthermore, the signal line SEL is set to H, and the CLEA
Output a pulse to R. Then, wait for the optical scanning system to reach the start position. This start position is a position slightly advanced from the home position in the forward scanning direction, and the distance between the home position and the start position is set to a distance required for stabilizing the operation of the scanning drive system.

When the optical scanning system reaches the start position, timer T is started. Then, if the condition of T≧T1 is satisfied,
That is, the reading position of the optical scanning system is the reference density pattern 6.
Wait until you reach a position facing the When T≧T1, output of the signal GATE is permitted. In this example, the signal G
ATE is output during a period of 5 lines of main scanning.

At this time, since the signal line SEL is H, the fixed value output from the fixed value generator 330 is
0 to the digital input terminal of the D/A converter 350, and a voltage corresponding to the fixed value is applied to the reference voltage input terminal Vref of the A/D converter 310.

Further, the digital peak hold circuit 320 is connected to the signal GA
During the period when TE is H, the maximum value of the signal (SDI) input during that period is detected and held.

When T≧T2, that is, when the peak detection operation is completed, the signal line SEL is first switched to L.

Thereby, the multiplexer 340 selects the value held by the digital peak hold circuit 320, ie, the maximum value of the signal, and applies it to the digital input terminal of the D/A converter 350. Thereby, the reference voltage input terminal Vref of the A/D converter 310 is set to a voltage corresponding to the maximum level of the signal. Therefore, from then on, the full-scale level of A/D converter 310 substantially matches the maximum value of the input signal (SA).

Next, a write operation of the RAM 380 is started.

That is, address information corresponding to the pixel position in the main scanning direction at that time is applied to the address terminal of the RAM 380, a write pulse is outputted to the signal line WE at the timing of each pixel, and the data on the signal line SDI is transferred to the RAM 380.
80 to be memorized.

This write operation takes place during one line of main scanning.

When T≧T3, that is, when the writing operation is completed and the reading position of the optical scanning system reaches the starting edge position of the document, output of image data is started. In this case, the RAM 380 is
It is always in read mode and the stored data (
Kn) is output to the ROM390. ROM390 is S
The level of the image signal applied from DI is RA, Ma2
The shading is corrected according to the data outputted by O, and the corrected data is output to the signal line SD2.

The data on the signal line SD2 is sent to the interface circuit 6.
00 and is output to an external device, such as a plotter.

When the optical scanning system reaches the forward scanning end position, it stops outputting data, sets the signal line RVSON to I() to start the optical scanning system's backward scanning, and sets the signal line FLON to L to turn on the fluorescent lamp. 7a and 7b. Then, when the optical scanning system reaches the home position, the signal lines MTON and R are turned off.
Set VSON to L and stop scanning.

[Effects] As described above, according to the present invention, even when a relatively large change in light amount occurs in the exposure lamp, the change does not affect the level of the signal processed by the signal correction circuit. Therefore, the configuration of the signal correction circuit can be simplified, and, for example, the capacity of the memory used in the shading correction circuit can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a part of the signal processing circuit 300 shown in FIG. 3. As shown in FIG. FIG. 2 is a front view showing the structure of a mechanical section of an image scanner of one type that implements the present invention. FIG. 3 is a block diagram showing the configuration of the electrical equipment section of the device shown in FIG. 2. FIG. 4 is a block diagram showing the configuration of a shading correction circuit included in the signal processing circuit 300 shown in FIG. 3. FIG. 5 is a timing chart showing the signal states of each part of the electric circuit. FIG. 6 is a flowchart 1 showing a schematic operation of the main control device 100 shown in FIG. 1: Contact glass 5: Lens 6: Reference density pattern (reference density pattern means) 7a,
7b: Fluorescent lamp 10: Electric motor 50: Image sensor (image reading means) 100: Main controller 150: Timing generation circuit 310: A/D converter (analog/digital conversion means) 320: Digital peak hold circuit (reference level Generation means) 321: Multiplexer 323: Digital comparator 330: Fixed value generator 340: Multiplexer 350
: D/A converter

Claims (5)

[Claims] (1) Image reading means for outputting an analog electrical signal in accordance with the optical image on the image reading surface; Reference density pattern means disposed at least temporarily on the image reading surface; A reference level input terminal; Analog/digital conversion means for converting an analog electrical signal output by the means into a digital signal; retaining the level of the signal output when the image reading means reads the image of the reference density pattern means, and converting the signal according to the level; A signal processing circuit for an image reading device, comprising: a reference level generating means for applying a signal to a reference level input terminal of the analog/digital converting means; and a signal correcting means for processing a digital signal output from the analog/digital converting means. (2) The reference level generating means detects a peak level of a signal output when the image reading means reads the image of the reference density pattern means, and maintains the peak level. The signal processing circuit of the image reading device described in 2. (3) The reference level generation means includes digital peak detection means for detecting the peak value of the digital signal output by the analog/digital conversion means, and an output terminal connected to a reference level input terminal of the analog/digital conversion means. digital/analog conversion means; selection means for selectively applying a fixed value and a digital peak value outputted by the digital peak detection means to an input terminal of the digital/analog conversion means; A signal processing circuit for an image reading apparatus according to claim 1, further comprising: selection control means for controlling said selection means. (4) A signal processing circuit for an image reading device according to claim 1, wherein the signal correction means includes shading correction means. (5) The shading correction means includes a storage means for storing a signal corresponding to a level of a signal output by the analog/digital conversion means when the image reading means reads the reference density pattern means, and the analog/digital conversion means. signal converting means for outputting a signal corrected based on the signal output by the storage means and the signal stored in the storage means;
A signal processing circuit for an image reading device according to claim (4).