JPH0831958A - Mos semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To suppress punch-through of a gate impurity at a thin gate insulation film and to prevent the electrical characteristics of a transistor from scattering by forming two types of gate insulation films, namely thin and thick gate insula tion films, on the same semiconductor substrate. CONSTITUTION:Sources/drains 4, 6, 12, and 14 are formed on a semiconductor substrate 2 due to impurity diffusion. Namely, two types of gate insulation films 8 and 16 with different film thicknesses are formed on the same substrate 2. The gate insulation film 8 with a thick film thickness is a lamination film of silicon oxide film and film thickness silicone film, and the thin gate insulation film 16 is a silicon nitride film or ONO lamination film of silicon oxide film, silicon nitride film, and silicon oxide film. The gate insulation films 8 and 16 with different film thicknesses constitute each element-separated MOS transistor, thus preventing or suppressing punch-through of the gate impurity by the thin gate insulation film 16.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a MOS semiconductor integrated circuit device and its manufacturing method.

[0002]

2. Description of the Related Art A MOS semiconductor integrated circuit device has a power supply voltage V
5V is generally used as cc, but the overall amount of heat generated increases as integration progresses, so a drive voltage of 3.3V, 3V or lower is required to reduce power consumption. Is high. Therefore, in general, a method is adopted in which the input / output circuit section (I / O section) is driven by the conventional 5V and the step-down 3.3V or 3V is used for the internal integrated circuit section. In this case, the gate size of the MOS transistor and the film thickness of the gate insulating film are generally different between the input / output circuit section and the internal integrated circuit section, and the input / output circuit section to which a high voltage is applied The gate size and the film thickness of the gate insulating film are set large.

Considering the gate insulating film, it is not necessary to reduce the film thickness of the gate insulating film in proportion to the decrease in the driving voltage. However, as the driving voltage increases, the film thickness of the gate insulating film must increase. I can say that I have to do. Generally, an acceptable applied electric field is the initial breakdown (TZ
It may be limited due to reliability such as TB) or dielectric breakdown over time (TDDB). It is known that when the thickness of the insulating film becomes thick, problems such as defects in the film increase and the permissible electric field thereof is slightly lowered. Therefore, the insulating film thickness cannot be increased in proportion to the driving voltage. . Actually, the setting of the threshold voltage (including the correspondence of the well concentration and the substrate channel concentration) and the balance with the circuit speed also contribute to the film thickness determination of the gate insulating film.

In VLSI, an insulating film such as an ONO structure (oxide film / nitride film / oxide film) which is a combination of an oxide film and a nitride film is attracting attention as a gate insulating film. Since the nitride film has a higher dielectric constant than the oxide film, there is an advantage that the film thickness can be increased and the allowable applied voltage can be increased when the same gate capacitance is provided. Ammonia (NH ₃ ) and hydrazine (N ₂ H ₄ ) are used for nitriding, but the state and interface characteristics of the nitriding interface are generally not so good. Since the nitride film has a high dielectric constant, the film thickness can be increased, but the reliability is not improved so much because the interface is rough. However, it is known that if oxidation is applied after nitriding, the roughness of the interface is improved and the reliability is improved. Further, the ONO structure film has a different electric conduction mechanism from that of a normal oxide film, and electrons are less likely to have high energy. Therefore, it is said that the dielectric breakdown resistance and the reliability are improved, and thus it has recently attracted attention.

Further, it has been recently known that nitrogen in a nitride film or an insulating film has an effect of preventing or suppressing diffusion of impurities in a gate electrode into a substrate (penetration of a gate impurity through a gate insulating film). It was When the gate impurity penetrates through the gate insulating film, the substrate channel concentration changes, which causes problems such as a change in threshold voltage and an increase in leak current. This is one of the important problems because it becomes a serious problem as the integration progresses, that is, the gate insulating film becomes thinner.

[0006]

SUMMARY OF THE INVENTION A first object of the present invention is to provide a semiconductor device having a thick gate insulating film and a thin gate insulating film on the same semiconductor substrate in a thin gate insulating film. It is to prevent the penetration of impurities, prevent variations in various electrical characteristics of the transistor, and improve reliability. A second object of the present invention is to provide a method for forming such a thin gate insulating film with good controllability.

[0007]

In the MOS semiconductor device of the present invention, two types of gate insulating films having different film thicknesses are formed on the same semiconductor substrate, and the gate insulating film having the larger film thickness is a silicon oxide film. The thin gate insulating film is a laminated film of a silicon oxide film and a silicon nitride film or an ONO laminated film of a silicon oxide film, a silicon nitride film and a silicon oxide film.

According to one aspect of the second aspect, as shown in FIG. 1, the gate insulating films having different film thicknesses form MOS transistors each having an element isolation. The MOS transistor (right side) group having a thick gate insulating film constitutes a peripheral circuit section, and the MOS transistor (left side) group having a thin gate insulating film constitutes an internal circuit section.

In the MOS transistor of the peripheral circuit portion shown in FIG. 1, source / drains 4 and 6 are formed in a silicon substrate 2 by impurity diffusion, and a gate insulating film of a silicon oxide film 8 is formed on a channel region between them. A polysilicon gate electrode 10 is formed. In the MOS transistor of the internal circuit portion, the source / drain 12 and 14 are formed in the silicon substrate 2 by impurity diffusion, and the gate insulating film 16 having a film thickness smaller than that of the gate insulating film 16 is formed on the channel region between the source / drain 12 and 14. A silicon gate electrode 18 is formed. The two MOS transistors are isolated from each other by the field oxide film 20 or another element isolation region.

The MOS transistor on the left side of the drawing is a gate insulating film having an ONO structure as the gate insulating film 16, and a thin gate insulating film 16 which is generally considered to have low reliability is provided with an insulating film having a highly reliable ONO structure. Since it is used, it is highly reliable as a whole. The thin gate insulating film 16 may have a two-layer structure of an oxide film and a nitride film instead of the ONO structure of FIG.

Between the thickness of the thick gate insulating film 8 and the thickness of the thin gate insulating film 16, as shown in claim 3, the thick gate insulating film 8 is formed. The peripheral circuit section in which the MOS transistor is used is driven by the power supply voltage V ₁ , and the internal circuit section in which the MOS transistor of the thin gate insulating film 16 is used is lower than the power supply voltage V 1.
_When driven at ₂ , assuming that the thickness of the thick gate insulating film 8 is T ₁ and the thickness of the thin gate insulating film 16 is T ₂ , 1 <T ₁ / T ₂ <V ₁ It is preferable that the film thicknesses T ₁ and T ₂ of the gate insulating film are set so as to satisfy the relationship of / V ₂ .

In this way, the relationship between the film thicknesses of the gate insulating films 8 and 16 is set by using an insulating film having a highly reliable film structure as the gate insulating film of the highly integrated internal circuit part and insulating the insulating film. Considering that the film contains a nitride layer having a high dielectric constant, the film thickness that satisfies the desired gate capacitance required for setting the threshold voltage can be made larger than that of the oxide film. is there. That is, the thickness T ₂ of the thin gate insulating film 16 can be made larger than the value obtained from the driving voltage ratio, and as a result, the reliability can be further improved.

Here, the desired gate capacitance is determined from the set value of the threshold voltage and the like. For example, in a highly integrated transistor, the off current becomes large due to the short channel effect, etc., so the well concentration is increased, but in order to prevent the increase in the threshold voltage at this time, a larger gate capacitance, that is, a thinner gate capacitance is used. Gate insulation film thickness is required. However, when the gate insulating film contains a nitride layer, the film thickness of the gate insulating film can be increased as much as the dielectric constant is higher than that of the gate insulating film including only the oxide film, so that the reliability can be improved. .

In another example of the MOS semiconductor device to which the present invention is applied, as described in claim 4, a thick gate insulating film and a thin gate insulating film are continuously formed. It has a semiconductor element. An example thereof is an EEPROM, which is an electrically erasable semiconductor memory element, as described in claim 5, in which a thin gate insulating film is a tunnel insulating film and a thick gate insulating film is It is the gate insulating film of the MOS transistor.

FIG. 2 shows E corresponding to such claim 5.
It is an example of an EPROM. A gate insulating film 26 is formed on the channel regions of the source / drain 24, 30 formed in the P-type well 22 formed on the silicon substrate, and is continuous with the gate insulating film 26 and has a thinner film thickness than that. A film 28 is formed on the source region. The gate insulating film 28 is a tunnel insulating film, and is an ONO film as an example. 36 is a control gate electrode made of polysilicon, 34 is an insulating film between the floating gate electrode 32 and the control gate electrode 36, and 38 is a field oxide film. In general, injection and emission of electrons to the floating gate electrode 32 are performed from the tunnel insulating film 28. Since the tunnel insulating film 28 includes a nitride layer, it can have high impurity diffusion blocking capability comparable to the thick gate oxide film 26, high reliability, and good tunnel current characteristics.

In FIG. 3, a gate insulating film 51 (film thickness T ₂ ) and a gate insulating film 48 (film thickness T ₁ ) (T ₂ <T ₁ ) having different film thicknesses are formed on the same substrate in accordance with claim 6. The present invention relates to a method for forming a gate insulating film that is well formed. This will be described with reference to FIG. (A) First, in the region where the thin gate insulating film 51 is formed,
A film 44 that has been appropriately nitrided is formed. here,
40 is a well formed on a silicon substrate, 42 is a field oxide film, and 46 is a substrate surface. To form the nitrided film 44, the entire surface of the substrate is lightly nitrided, a resist is applied, and the nitrided film 44 is formed in a region where a thin gate insulating film is to be formed by a photolithography process and etching. Known techniques of removing the resist after patterning to leave can be used. Wet etching with less damage and surface roughness is preferable for etching.

(B) Next, the gate oxide film 48 has a film thickness T ₁
Gate oxidation is performed under the following conditions. At this time, the oxidation rate becomes slow in the portion where the surface is nitrided. Therefore, if an appropriate nitriding condition is obtained in advance, the oxide film 48 can be formed by one oxidation.
Has a thickness of T ₁ and the nitride film 4 in the region where the nitride film 44 exists
4 and the oxide film 50 can form a gate insulating film 51 having T ₂ (T ₂ <T ₁ ). Since the oxidation rate of the oxide film 50 is lower than that of the oxide film 48, the thickness of the oxide film 50 can be easily controlled. In the region where the nitride film 44 exists, the oxidation proceeds at the interface between the nitride film 44 and the substrate 40.

For the above nitriding and oxidation, a furnace (quartz oxidation furnace) method, an RTO (Rapid Thermal Oxidation; rapid thermal oxidation by lamp heating) method, an RTN (Rapid Thermal) method are used.
Nitridation; rapid thermal nitriding by lamp heating) and other known techniques may be used. In addition to pure oxygen, a gas obtained by diluting oxygen with nitrogen or argon can be used as an oxidizing material, and ammonia NH ₃ as a nitriding material,
Hydrazine N ₂ H ₄ or the like can be used.

In general, when the gate insulating film is thin, diffusion of gate impurities into the substrate channel portion occurs in a heat treatment step that is repeatedly performed in subsequent steps, which causes fluctuations in threshold voltage and increase in off current. Although the device design becomes difficult, according to the manufacturing method of the present invention, the nitride film used in the step of forming the gate insulating film is left as it is as a part of the gate insulating film. It can have the ability to prevent diffusion.

Further, since the thicker insulating film is formed in the above-described etched portion, the insulating film can be compared with the conventional method in which the thick insulating film and the thin insulating film are oxidized twice. The step between them becomes smaller. This is because when the oxidation is performed twice to form a step, the step where the thin insulating film is formed is etched, and the step becomes large. In FIG. 3, element isolation is not limited to the field oxide film 42, and other means may be used.

FIG. 4 is for explaining claim 7, which will be described next. (A) Similar to (A) of FIG. 3, a film 44 subjected to appropriate nitriding treatment is formed in a region where the thin gate insulating film 63 is to be formed. (B) Next, an appropriate light nitriding is applied to the entire surface once again. 5
Reference numerals 2 and 58 are nitride films, but the film thickness is nitride film 52.
Is thicker

(C) Gate oxidation is performed so that the gate insulating films 61 and 63 have predetermined film thicknesses T ₁ and T ₂ , respectively.
In this case, the portion where the surface has been nitrided has a slower oxidation rate. Therefore, if suitable nitriding conditions are obtained in advance, the desired film thicknesses T ₁ and T ₂ (T ₂ <T ₁ ) can be obtained by one-time oxidation. The gate insulating films 61 and 63 which it has are formed.

Here, by performing nitriding twice, not only the gate insulating film 63 but also the gate insulating film 61 can have a high gate impurity diffusion blocking ability. The process of FIG. 4 has one more process than the process of FIG. 3, but the nitriding and the oxidation can be performed in one batch only by switching the reaction gas, so that there is almost no decrease in throughput.

Corresponding to the eighth aspect, when the nitriding treatment is performed by oxynitriding treatment with N ₂ O gas, NH ₃ and N in the case of N ₂ O
Since nitride is slow compared to the ₂ H _4, to increase the formation temperature,
Although it has disadvantages such as strong oxynitriding process such as longer time, it does not contain hydrogen, so the charge trapping property of the gate insulating film formed is improved, and there is little change in electrical properties and reliability is high. There is an advantage such as improvement of the property.

The reason why the nitriding rate using N ₂ O is slow is that the diffusion coefficient when the oxynitriding key radical diffuses in the nitride film or the oxide film is the key radical when using NH ₃ or N ₂ H _4. This is because it is smaller than the above and oxidation proceeds at the same time. It is considered that the reason why the charge trapping characteristics and the like are improved as compared with the case of nitriding with NH ₃ or N ₂ H ₄ is that there are few N—H bonds (become charge trap sites) in the film. Further, in the case of oxynitriding with N ₂ O, the oxidation progresses first and the nitrided portion is slightly closer to the substrate interface. Therefore, the gate insulating film obtained by this method is close to a highly reliable ONO structure. Become.

Corresponding to the ninth aspect, by performing an appropriate oxidation treatment before the first nitriding treatment, it becomes possible to form a more reliable gate insulating film. FIG. 5 shows this method. (A) Before the first nitriding, an appropriate oxidation treatment is performed, and then the first nitriding treatment is performed. Thin gate insulating film 76
This film is left only in the formation region of. This may be performed by oxidizing the entire surface, subsequently lightly nitriding, and then patterning using a known technique (resist coating, photoengraving process, etching, resist removal, etc.). For etching, it is better to use wet etching with less damage and surface roughness. Reference numeral 66 is an oxide film formed previously, 68 is a nitride film formed by the first nitriding, and 70 is a substrate surface.

(B) Next, the thickness of the thick gate insulating film is T
Gate oxidation is performed so that the value becomes ₁ . 72 is a thick silicon oxide film of the gate insulating film, and 76 is a thin gate insulating film. The gate insulating film 76 is an oxide film 66 from the upper layer, a nitride film 68 in the middle, and an oxide formed by gate oxidation at the interface with the substrate. It is composed of a film 74. In this method, by performing an appropriate oxidation treatment before the first nitriding, it becomes possible to form a highly reliable gate insulating film having an ONO structure with good electrical characteristics. Also in this case, although the number of steps is one more than that of the method of FIG. 3, since the oxidation and the nitridation can be performed in one batch, there is almost no decrease in throughput.

[0028]

EXAMPLE An example of the method shown in FIG. 5 will be described. 1 × 10 ¹⁷ to 2 × on a P-type silicon substrate having a specific resistance of 20 Ωcm
A P well and an N well having a concentration of about 10 ¹⁷ / cm ³ are formed, and a field oxide film for element isolation is formed. Next, 1150 is applied to the entire surface of the wafer by using a lamp annealing device.
Oxidation at 10 ° C for 10 seconds, followed by 5-9 at 950 ° C.
Perform NH ₃ nitriding for 0 seconds. The result is shown in FIG. The horizontal axis represents the nitriding time, and the vertical axis represents the film thickness of the insulating film (the total film thickness of the oxide film 66 and the nitride film 68). In the figure, the data marked with □ is the measured film thickness (absolute film thickness) obtained by Auger analysis, and the data marked with ◯ is the film thickness calculated as the oxide film by the capacitance method. .

From FIG. 6 (A), it is 75Å in the first oxidation.
An oxide film (measurement result by ellipsometry) was formed, and in the next nitriding, a film thickness increase of 1 to 6Å (film thickness 76 to 81Å) was observed in 5 to 90 seconds of nitriding treatment (Ta). . Further, according to the Auger analysis and the SIMS analysis, the nitrogen atom showed a peak value at the interface with the substrate (well), and was several atomic% or less. However, when the capacitance film thickness (Tb) was examined, it was converted into an oxide film thickness (converted into a reference oxide film and calculated with a relative dielectric constant of 3.7) and the film thickness equivalently decreased by about 2 to 13Å (oxide film). It can be seen that the converted film thickness is 74 to 68Å). This may be because the nitriding treatment increased the dielectric constant of the insulating film.

Next, a resist is applied, a photoengraving process,
After the wet etching step and the resist removing step, the oxide film and the nitride film other than the region where the thin insulating film is formed are removed, and the thickness T of the thick insulating film 72 is set by the lamp annealing apparatus.
₁ is 160Å (film thickness measured by ellipsometry)
Oxidation is carried out again under the conditions (1150 ° C. for 50 seconds). The result is shown in FIG. From FIG. 6B, it is clear that the film thickness of the ONO insulating film becomes thinner as the nitriding treatment time becomes longer.

Next, a MOS capacitor was formed using the ONO film formed by the above method, and the punch-through property (impurity diffusion blocking ability) of the gate impurity was examined by the CV method and SIMS analysis. The thickness of the polysilicon gate electrode is 20
00 Å, the gate impurity was BF ₂ , the implantation conditions into the gate polysilicon were 20 KeV and 5 × 10 ¹⁵ / cm ² , and the activation heat treatment conditions were 900 ° C. and 30 minutes. For comparison, an oxide film sample having the same film thickness was also prepared. The difference in punch-through was particularly noticeable at 100 Å or less. The penetration density was 1 × 10 ¹⁷ / cm ³ or less in the case of the ONO film, and 1 × 10 ¹⁸ / cm ³ or more in the case of the oxide film.
The same sample as above was subjected to relative evaluation of TDDB (dielectric breakdown over time) reliability. It was also confirmed that the reliability of the film subjected to the nitriding treatment was obviously improved as compared with the film having the same film thickness but having only the oxide film.

[0032]

The insulating film formed by the method of the present invention has a small step between the thick insulating film and the thin insulating film, and is advantageous in the subsequent process of forming a fine pattern. A thick insulating film and a thin insulating film can be easily formed on the same substrate,
At the same time, the obtained film can have a high gate impurity diffusion blocking capability (such as boron penetration resistance). Therefore, it is possible to suppress variations in the threshold voltage of the obtained MOS transistor, an increase in off-leakage current, and characteristic variations. A thick insulating film and a thin insulating film can be easily formed on the same substrate, and in the process, the thinner gate insulating film has electrical characteristics (interface characteristics, tunnel characteristics, high dielectric constant, etc.) and reliability (dielectric breakdown over time). Resistance,
An ONO structure or the like having excellent hot carrier deterioration resistance) can be obtained. That is, a highly reliable transistor can be formed by a more rational process, and the process is simplified.

[Brief description of drawings]

FIG. 1 is a main-portion cross-sectional view showing one embodiment of the present invention.

FIG. 2 is a sectional view of an essential part showing another embodiment of the present invention.

FIG. 3 is a process sectional view showing an example of the method of the present invention.

FIG. 4 is a process sectional view showing another example of the method of the present invention.

FIG. 5 is a process sectional view showing still another example of the method of the present invention.

6A and 6B are diagrams showing changes in film thickness when the nitriding time is changed in Examples, where FIG. 6A shows a state after oxidation and subsequent nitriding, and FIG. 6B shows a state after further oxidation. Represents the state.

[Explanation of reference signs] 2,22 Silicon substrate 4,6,12,14,24,30 Source / drain 8,26 Gate oxide film 16,28,76 ONO structure insulating film 10,18 Polysilicon gate electrode 32 Floating gate Electrode 36 Control gate electrode 51, 63 Insulating film composed of oxide film and nitride film

Claims (9)

[Claims] 1. Two kinds of gate insulating films having different film thicknesses are formed on the same semiconductor substrate, the gate insulating film having the larger film thickness is a silicon oxide film, and the gate insulating film having a smaller film thickness is silicon. ON of laminated film of oxide film and silicon nitride film or silicon oxide film, silicon nitride film and silicon oxide film
A MOS semiconductor device comprising an O-stacked film. 2. A gate insulating film having a different film thickness constitutes a MOS transistor in which each element is separated, and a MOS transistor group having a gate insulating film having a large film thickness constitutes a peripheral circuit portion and a thin film thickness is formed. MOS with gate insulating film
2. The MOS semiconductor device according to claim 1, wherein the transistor group constitutes an internal circuit section. 3. The peripheral circuit section is driven by a power supply voltage V ₁ ,
When the internal circuit portion is driven by a power supply voltage V ₂ lower than that, when the thickness of the thick gate insulating film is T ₁ and the thickness of the thin gate insulating film is T ₂ , 1 The MOS semiconductor device according to claim ₂ , wherein the film thicknesses T ₁ and T ₂ of the gate insulating film are set so that <T ₁ / T ₂ <V ₁ / V ₂ . 4. The MOS semiconductor device according to claim 1, further comprising a semiconductor element in which a thick gate insulating film and a thin gate insulating film are continuously formed. 5. A thin semiconductor device including an electrically erasable semiconductor element, wherein a thick gate insulating film and a thin gate insulating film are continuously formed, and an electrically erasable EEPROM. The MOS semiconductor device according to claim 4, wherein the insulating film is a tunnel insulating film, and the thick gate insulating film is a gate insulating film of a MOS transistor. 6. A method of manufacturing a semiconductor device having two kinds of gate insulating films having different film thicknesses on the same semiconductor substrate, wherein a first gate insulating film is formed in a region where a thin gate insulating film is formed before gate oxidation. A thin film that has been subjected to the nitriding treatment is formed, and the gate insulating film is formed by simultaneously performing gate oxidation on a region where a thin gate insulating film is formed and a region where a thick gate insulating film is formed. M characterized by forming
A method for manufacturing an OS semiconductor device. 7. A method of manufacturing a semiconductor device having two types of gate insulating films having different film thicknesses on the same semiconductor substrate, wherein a first gate insulating film is formed in a region where a thin gate insulating film is formed before gate oxidation. Area where a thin gate insulating film is formed and an area where a thick gate insulating film is formed after forming a thin film which has been subjected to A method of manufacturing a MOS semiconductor device, wherein a gate insulating film is formed by simultaneously performing gate oxidation on and. 8. The method for manufacturing a MOS semiconductor device according to claim 6, wherein the nitriding treatment is an oxynitriding treatment with N ₂ O gas. 9. The method for manufacturing a MOS semiconductor device according to claim 6, 7 or 8, wherein an oxidation treatment is performed before the first nitriding treatment.