JPH08313872A - Liquid crystal device - Google Patents

Abstract

PURPOSE: To make it possible to relieve or suppress a 'burn' by providing the device with a driving means for setting the display state of pixels by impressing the voltage exceeding the other threshold of chiral smectic liquid crystals on the selected pixels. CONSTITUTION: Scanning selection signals Ss , constituted of the voltages of crest values varying with at least a first phase (1/2.ΔT period) and second phase (ΔT period) are successively impressed on a liquid crystal panel formed by subjecting a pair of substrates to orientation treatments varied from each other and scanning electrodes and the scanning electrodes are selected. The information signals Is . constituted of three kinds of the crest values are impressed on the signal electrodes in synchronization with the signals Ss . As a result, the voltage exceeding the one threshold voltage of the chiral smectic liquid crystals is impressed on the pixels on the scanning electrodes selected by the first phase, by which the display state of the pixels is non-selectively erased. The voltage exceeding the other threshold voltage of the chiral smectic liquid crystals is impressed on the selected pixels among the pixels erased by the second phase, by which the display state of the pixels is set.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal panel using a chiral smectic liquid crystal exhibiting a ferroelectric state or both a ferroelectric state and an antiferroelectric state, and a liquid crystal device provided with a matrix driving device.

[0002]

2. Description of the Related Art In a chevron smectic liquid crystal device having a chevron structure described in US Pat. No. 4,900,132 and US Pat. No. 4,997,264, a tilt angle could not be set to a large value, so that it was applied to a display device. At times, a high-brightness light source was required to generate sufficient display brightness. U.S. Pat. No. 5,377,033 discloses a chiral smectic liquid crystal having a bookshelf structure capable of setting the tilt angle to a large value. In the bookshelf structure of the chiral smectic liquid crystal, the cholesteric phase is not developed from the isotropic phase and the smectic A phase is immediately generated from the isotropic phase when the temperature is lowered.
There is a problem that uniform alignment cannot be obtained depending on the alignment control method used when forming the chevron structure. In European Published Specification No. 637622, only one substrate of a pair of substrates forming a chiral smectic liquid crystal panel is subjected to uniaxial alignment treatment such as rubbing treatment or oblique vapor deposition treatment, and the other substrate is treated. It has been clarified that a chiral smectic liquid crystal panel that realizes a bookshelf structure in a uniform alignment state is obtained by using a pair of substrates that have been subjected to a random alignment treatment that does not have uniaxial alignment characteristics.

Also, Keizo Ito, "Journal of Television Society", Vol. 44, No. 5, pp. 536-543
(1990) "Switching between three stable states in antiferroelectric stabilized (AFS) ferroelectric liquid crystal (FLC)".
Applied an alignment control method of imparting polyimide rubbing only to a pair of substrates to a chiral smectic liquid crystal exhibiting an antiferroelectric state and having a temperature range in which a smectic A phase is immediately generated from an isotropic phase under cooling. At that time, it is described that uniform alignment was realized. In addition, this document
It is revealed that the chevron structure is developed when no voltage is applied, and the bookshelf structure is developed when voltage is applied.

[0004]

A liquid crystal panel using a chiral smectic liquid crystal that enables such a high-luminance display has an asymmetric alignment control structure applied to a pair of substrates and a spontaneous polarization of 10 nC. Since it is a chiral smectic liquid crystal of / cm ² or more, a chiral smectic liquid crystal which should generate a plurality of stable alignment states during a display operation by matrix drive has only a single alignment state as a stable alignment state over time. It was found that a phenomenon of changing the orientation state as described above, a so-called "burn-in" phenomenon occurs. The object of the present invention is the above-mentioned "burn-in".
An object of the present invention is to provide a liquid crystal device that can alleviate or suppress the phenomenon.

[0005]

The present invention provides a pair of substrates,
A liquid crystal having a matrix electrode which constitutes a pixel by intersecting a scanning electrode provided on one substrate of the pair of substrates and a signal electrode provided on the other substrate, and a chiral smectic liquid crystal arranged between the pair of substrates. A panel, a liquid crystal panel in which the pair of substrates have been subjected to different alignment treatments, and a scanning electrode, in which a scanning selection signal is sequentially configured with a voltage having a peak value different in at least a first phase and a second phase. Is applied to select at least one scan electrode, and in synchronization with the scan selection signal, at least 3 is applied to the signal electrode.
An information signal composed of a peak value of a seed is applied, thereby applying a voltage exceeding one threshold voltage of the chiral smectic liquid crystal to the pixel on the selected scan electrode in the first phase. The display state of the pixel is displayed by non-selectively erasing the display state and applying a voltage exceeding the other threshold voltage of the chiral smectic liquid crystal to the selected pixel among the erased pixels in the second phase. The liquid crystal device is characterized by the driving means for determining the state.

In the present invention, the information signal has a voltage waveform composed of different peak values in the first phase, the second phase and the third phase, and the second phase of the scan selection signal and the first phase of the information signal. The two phases are synchronized.

In the present invention, an AC voltage is generated by the information signal received by the pixel on the scan electrode when the scan is not selected, and the time average value of the AC voltage is the voltage applied to the scan electrode when the scan is not selected. And it is zero.

In the present invention, the information signal applied in synchronization with the scan selection signal has different peak value voltages for each of the first phase, the second phase and the third phase, and the second signal Is a voltage value equal to the average value of the first phase voltage and the third phase voltage.

In the present invention, the information signal applied in synchronization with the scan selection signal has different peak voltage for each of the first phase, the second phase and the third phase. Is the same as the average value of the first phase voltage and the third phase voltage, and the combined voltage of the second phase voltage and the scan selection signal voltage is the threshold voltage of the chiral smectic liquid crystal. Generates a voltage exceeding.

In the present invention, the information signal applied in synchronism with the scanning selection signal has different peak value voltages for each of the first phase, the second phase and the third phase, and the second signal Is the same as the average value of the first phase voltage and the third phase voltage, and the combined voltage of the second phase voltage and the scan selection signal voltage is the threshold voltage of the chiral smectic liquid crystal. Is generated and the second phase period is Δ
When T is set, the sum of the first and third phase periods is ΔT.

In the present invention, the information signal applied in synchronism with the scanning selection signal has different peak value voltages for each of the first phase, the second phase and the third phase, and the second Is the same as the average value of the first phase voltage and the third phase voltage, and the combined voltage of the second phase voltage and the scan selection signal voltage is the threshold voltage of the chiral smectic liquid crystal. Is generated and the second phase period is Δ
When T, the first and third phase periods are 1/2
・ It is ΔT.

In the present invention, the time average value of the information signal applied in synchronization with the scan selection signal is the difference (zero voltage) between the time average value of the AC voltage and the voltage applied to the scan electrode when scanning is not selected. Or a DC component voltage), and the information signal has a peak value voltage different from each other in each of the first phase, the second phase and the third phase, and the second phase voltage Is the same voltage value as the average value of the first phase voltage and the third phase voltage, and the combined voltage of the second phase voltage and the scan selection signal voltage exceeds the threshold voltage of the chiral smectic liquid crystal. When voltage is generated and the second phase period is ΔT, the sum of the first and third phase periods is ΔT.

In the present invention, the time average value of the information signal applied in synchronization with the scan selection signal is the difference between the time average value of the AC voltage and the voltage applied to the scan electrode when the scan is not selected (zero voltage). Or a DC component voltage), and the information signal has a peak value voltage different from each other in each of the first phase, the second phase and the third phase, and the second phase voltage Is the same voltage value as the average value of the first phase voltage and the third phase voltage, and the combined voltage of the second phase voltage and the scan selection signal voltage exceeds the threshold voltage of the chiral smectic liquid crystal. When a voltage is generated and the second phase period is ΔT, the first and third phase periods are 1/2 · ΔT, respectively.
Is.

In the present invention, the liquid crystal device is such that only one of the pair of substrates is subjected to uniaxial alignment treatment and the other substrate is subjected to non-uniaxial alignment treatment (for example, random alignment treatment). In the present invention, the pair of substrates have uniaxial alignment characteristics, and have an alignment control film formed of different films, for example, one of the films is an organic film and the other is an inorganic film. LCD device.

In the present invention, the chiral smectic liquid crystal is a liquid exhibiting a ferroelectric state or both a ferroelectric state and an antiferroelectric state. In the present invention, among the liquid crystal components constituting the chiral smectic liquid crystal, at least one liquid crystal component has a fluorinated carbon (eg, fluorinated carbon has 2 to 15 carbon atoms) terminal group, and the fluorinated A chiral smectic liquid crystal in which at least one of the carbons is completely fluorinated is used.

In the present invention, the driving means has means for causing at least two consecutive scanning selection signals to partially overlap and output to different scanning electrodes.

The present invention will be described below with reference to the drawings.

[0018]

EXAMPLES As a chiral smectic liquid crystal exhibiting a ferroelectric state that can be used in the present invention, at least one liquid crystal component has a fluorinated carbon (eg, fluorinated carbon has 2 to 15 carbon atoms) terminal group. However, a chiral smectic liquid crystal in which at least one carbon of the fluorinated carbon is completely fluorinated is used. Specific examples of such a liquid crystal include the following compositions 1 to 4 described in US Pat. No. 5,377,033.

Composition 1 76.5% 5-octyl-2- (4- (1,1-dihydroperfluoro-2- (2-butoxyethoxy) ethoxy) phenyl) -pyrimidine 4.5% 5-octyl-2 -(4- (1,1-Dihydroperfluorooctyloxy) phenyl) pyrimidine 4.5% 5-nonyl-2- (4- (1,1-dihydroperfluorooctyloxy) phenyl) pyrimidine 4.5% 5-decyl -2- (4- (1,1-dihydroperfluorooctyloxy) phenyl) pyrimidine 10.0% (S) -4- (2-chloro-4-methylpentanonyloxy) phenyl-4- (1,1- Dihydroperfluorobutoxy) benzoate. The transition temperature from the isotropic state (I) to the crystalline state (K) by cooling is I-
73 ° C for SmA, 30 ° C for SmA-SmC ^* and Sm
C ^* -K was -10 degreeC or less.

Hereinafter, SmA represents a smectic A phase, and SmC ^* represents a chiral smectic C phase.

Composition 2 12.44% 5-hexyl-2- (4- (1,1-dihydroperfluoro-2- (2-butoxyethoxy) ethoxy) phenyl) -pyrimidine 20.74% 5-octyl-2 -(4- (1,1-Dihydroperfluorohexyloxy) phenyl) pyrimidine 20.74% 5-nonyl-2- (4- (1,1-dihydroperfluorohexyloxy) phenyl) pyrimidine 20.74% 5-decyl -2- (4- (1,1-dihydroperfluorohexyl) phenyl) pyrimidine 8.30% 5-decyl-2- (4- (1,1-dihydroperfluorobutoxy) phenyl) pyrimidine 7.21% (S) -4- (2-chloro-4-methylpentanoyloxy) phenyl-4- (1,1-dihydroperfluoroptoxy) be Zoate 3.25% 2,3-dicyano-4-octyloxyphenyl-4- (1,1-dihydroperfluorohexyloxy) benzoate 6.58% 2,3-difluoro-4-octyloxyphenyl-4- (1 , 1-Dihydroperfluorohexyloxy) benzoate The transition temperature from the isotropic state (I) to the crystalline state (K) by cooling is 78 ° C for I-SmA and 5 for SmA-SmC ^*.
9 ° C and SmC ^* -K was 12 ° C.

Composition 3 13.08% 5-hexyl-2- (4- (1,1-dihydroperfluoro-2- (2-butoxyethoxy) ethoxy) phenyl) pyrimidine 23.00% 5-octyl-2- (4- (1,1-Dihydroperfluorohexyloxy) phenyl) pyrimidine 23.00% 5-nonyl-2- (4- (1,1-dihydroperfluorohexyloxy) phenyl) pyrimidine 23.00% 5-decyl- 2- (4- (1,1-dihydroperfluorohexyloxy) phenyl) pyrimidine 9.20% 5-decyl-2- (4- (1,1-dihydroperfluorobutoxy) phenyl) pyrimidine 8.00% (S) -4- (2-chloro-4-methylpentanoyloxy) phenyl-4- (1,1-dihydroperfluoroptoxy Benzoate transition temperature of the cooling from the isotropic state by (I) to the crystalline state (K) is I-SmA is 81 ° C., the SmA-SmC ^* 5
4 ° C and SmC ^* -K was 10 ° C.

Composition 4 90% 5-octyl-2- (4- (1,1-dihydroperfluoro-2- (2-butoxyethoxy) ethoxy) phenyl) pyrimidine 23.00% 5-octyl-2- (4 -(S)-(2
-Chloro-4-methylpentanoyloxy) phenyl)
Pyrimidine The transition temperature from the isotropic state (I) to the crystalline state (K) by cooling is 76 ° C. for I-SmA and 3 for SmA-SmC ^*.
0 ° C and SmC ^* -K <-10 ° C.

Examples of the chiral smectic liquid crystal exhibiting both the ferroelectric state and the antiferroelectric state that can be used in the present invention include the following compounds.

[0025]

[Outside 1]

[0026]

[Outside 2]

In the above table, Cry is a crystalline phase and SmX is
Unknown phase, is, SmC _A ^*, SmCr ^* and SmC ^*
Is a state of the chiral smectic C phase, is unique spiral array structure expressed in the suppression in chiral smectic C phase, when produced non-helical arrangement state, SmC _A ^* is strongly under-voltage applied state SmC ^* represents a phase in which a dielectric state and an antiferroelectric state under no voltage are applied, and SmC ^* represents a phase in which a ferroelectric state is generated under no voltage is applied. In addition, SmCr ^* represents an unknown phase.

Specific examples of the liquid crystal element exhibiting the antiferroelectric property used in the present invention include US Pat. No. 5,046,823, JP-A-6-95624, and JP-A-6-202078.
Examples thereof include those described in Japanese Patent Publication No. 6-202082 and the like.

FIG. 1 is a sectional view of a liquid crystal panel used in the present invention. 11a and 11b are a pair of crossed Nicols polarizers. Reference numerals 12a and 12b are transparent substrates such as glass substrates, and the distance between the pair of substrates is set to be thin enough (for example, 1 μm to 5 μm) to suppress the formation of a spiral structure unique to chiral smectic liquid crystals. It

Reference numerals 13a and 13b are a pair of transparent electrodes, one of which is a scanning electrode (scanning line) to which a scanning signal consisting of a scanning selection signal and a scanning non-selection signal is serially applied.
The other is set as a signal electrode (information line) to which an information signal corresponding to information is applied in parallel. The scan electrodes and the signal electrodes intersect each other to form matrix electrodes.

Numerals 14a and 14b are alignment control films forming mutually asymmetric alignment structures. In the first specific example, only the alignment control film 14a is subjected to a uniaxial alignment process such as a rubbing process or an oblique vapor deposition process. Then, the alignment control film 14b is subjected to the alignment treatment in a state where the uniaxial alignment treatment is not performed. The alignment control film 14a includes, for example, a rubbing-treated aliphatic polyimide film described in European Patent Publication No. 450459 or a rubbing-treated polyimide film described in US Pat. No. 4,690,089, a polyamide film, A polyamide-imide film, a polyvinyl alcohol film or the like is used, and for the orientation control film 14b, for example, a laminated film of a SiO ₂ sputtered film described in US Pat. No. 4,662,721 and a baked film of the following organic silane compound or a US patent The non-uniaxially oriented inorganic insulating film described in Japanese Patent No. 4763995 (for example, silicon nitride, silicon carbide, boron nitride, cesium oxide, silicon oxide, magnesium fluoride) can be used. Further, in the present invention, both the orientation control films 14a and 14b can be formed of the same film (for example, the same polyimide film or the same polyamide film).

Specific examples of organic silane compounds

[0033]

[Outside 3]

In the second example of the asymmetric alignment structure, the films forming the alignment control films 14a and 14b are different from each other. The different orientation control films 14a and 14b are both subjected to a uniaxial orientation process such as a rubbing process or an oblique vapor deposition process. A rubbing-processed organic film (for example, a polyimide film or a polyamide film) is used for the alignment control film 14a, and a rubbing-treated inorganic film (for example, a baked film of the above-mentioned organic silane compound) is used for the alignment control film 1b. .

Reference numeral 15 is the above-mentioned chiral smectic liquid crystal. In this chiral smectic liquid crystal, the inherent helical structure is suppressed by the interface effect between the pair of substrates 12a and 12b, and as a result, a non-helical structure is formed. In the case where the chiral smectic liquid crystal having the non-helical structure does not exhibit the antiferroelectric state but exhibits the ferroelectric state, it preferably exhibits two stable alignment states, or the chiral smectic liquid crystal exhibits the ferroelectricity. When expressing both the state and the antiferroelectric state, preferably three stable orientation states are expressed. In addition, in the liquid crystal panel in which the above two stable alignment states are generated, the extinction position due to the crossed Nicols of the pair of polarizers 11a and 11b is made to coincide with the molecular axis direction of either one of the stable alignment states. In the liquid crystal panel that produces the above-mentioned three stable alignment states, a pair of polarizers 11 is used.
The extinction positions due to crossed Nicols of a and 11b are made to coincide with the average molecular axis direction in the antiferroelectric state, the antiferroelectric state is the dark state, and the ferroelectric state is the bright state.

FIG. 2 is a plan view of the matrix electrode structure. The matrix electrode structure is composed of the scanning electrodes 13a (scanning lines S
₁ , S ₂ , S ₃ , S ₄ , S ₅ ...) and the signal electrode 13b
(Information lines I ₁ , I ₂ , I ₃ , I ₄ , I ₅ ...).

FIG. 3 shows a graphics controller 1 provided on the main body side of the ferroelectric liquid crystal display device 101 and a personal computer as a source of display information.
It is a block diagram of 02. Further, FIG. 4 is a communication timing chart of image information. The liquid crystal panel 103 is
1120 scanning electrodes and 1280 information electrodes are arranged in a matrix, and a ferroelectric liquid crystal is enclosed in two glass plates that have been subjected to orientation processing. The scanning lines are the scanning line driving circuit 104, the information lines. The lines are connected to the information line drive circuit 105, respectively.

The operation will be described below with reference to the drawings. The graphics controller 102 displays the scanning line address information designating the scanning electrodes and the image information (PD0 to PD3) on the scanning lines designated by the address information on the display drive circuit (scanning line drive circuit 104 and information line) of the liquid crystal display device 101. It is configured by the driving circuit 105) and transferred to 104/105. In the present embodiment, the image information having the scanning line address information and the display information is transferred through the same transmission line, so that the two types of information must be distinguished. The signal for this identification is AH / DL, and this AH / DL signal is H
The i level indicates that the information is a scanning line address, and the Lo level indicates that the information is display information.

The scanning line address information is used for the liquid crystal display device 10.
In the drive control circuit side 111 in 1, the image information PD0 to PD0
After being extracted from the image information transferred as 3,
While the designated scan electrode is driven by the scan signal generation circuit 107, the display information is guided to the shift register 108 in the information line drive circuit 105 and is shifted in units of 4 pixels by the transfer clock. When the shift register 108 completes the shift of one scanning line in the horizontal direction, the display information for 1280 pixels is transferred to the line memory 109 provided side by side and stored for one horizontal scanning period, and the information signal is generated. It is output from the circuit 110 to each information electrode as a display information signal.

Further, in this embodiment, the driving of the liquid crystal panel 103 in the liquid crystal display device 101 and the generation of the scanning line address information and the display information in the graphics controller 102 are performed asynchronously. It is necessary to synchronize (101/102).
The signal that controls this synchronization is SYNC, which is generated in the drive control circuit 111 in the liquid crystal display device 101 every horizontal scanning period. The graphics controller 102 side is always S
The YNC signal is monitored, and if the SYNC signal is at the Lo level, the image information is transferred. On the contrary, when it is at the Hi level, the transfer is not performed after the transfer of the image information for one horizontal scanning line is completed. That is, in FIG. 2, when the graphics controller 102 detects that the SYNC signal has become Lo level, it immediately sets the AH / DL signal to Hi level and starts the transfer of image information for one horizontal scanning line. The drive control circuit 111 in the liquid crystal display device 101 sets the SYNC signal to the Hi level during the image information transfer period. After the writing to the liquid crystal panel 103 is completed after a predetermined horizontal scanning time, the drive control circuit (FLCD controller) 11
1 can return the SYNC signal to the Lo level again and receive the image information of the next scanning line.

FIG. 5 shows a scanning selection signal (Ss) output from the scanning line driving circuit 104 and the information line driving circuit 105.
Scan non-selection signal (Sn), information signal 1 (Is) and 2
The voltage waveform of (In) is shown. The voltage of the scanning selection signal is 2V ₀ and − with reference to the voltage of the scanning non-selection signal.
It has a bipolar voltage of 2V ₀ . The first half 3/2 · ΔT period (voltage 2V ₀ period) of the scan selection signal is used for the erasing period, and the second half ΔT period (−2V ₀ period).
Is used as a writing period. Then, a period of 1 / 2ΔT between the erase period and the write period (voltage 2V
The period of ₀ ) and the last period of 1 / 2ΔT (the period of 0) are the periods set on the scanning side in order to set the voltage average value of the information signals 1 and 2 to zero. The first half of the information signal 1 has a voltage of −3 / 2 · V during the 1/2 · ΔT period (first phase).
_{At 0,} during the latter half ½ΔT period (third phase), the voltage −
1 / 2.V ₀ , and the voltage V ₀ during the ΔT period (second phase).
Therefore, the average voltage value is zero. The information signal 2 is
It has an antiphase relationship with the information signal 1.

(Is-Ss) and (In-Sn) in FIG.
Are composite waveforms of the scan selection signal and the information signals 1 and 2 of FIG. 5, respectively (Is-Ss) and (In-Sn).
Are the scanning non-selection signal and the information signals 1 and 2 of FIG. 5, respectively.
Is a composite waveform of.

The scanning selection signal may be sequentially output to the scanning electrodes 13a for each scanning electrode (non-interlaced scanning), or may be output for one or more interlaced scanning (interlaced scanning). Particularly, in the case of repetitive scanning operation, the operation by interlaced scanning output is used. Further, when the display screen is rewritten by the information input from the keyboard, only the scan lines of the rewritable area of the display screen are non-interlaced and the scan lines of the non-rewritable area are interlaced. Is good.

Composite waveforms (Is-Ss) and (In-S)
The voltage applied in the period 3/2 · ΔT in s) exceeds one threshold voltage of the chiral smectic liquid crystal, and the pixel on the scan line has one alignment state (for example,
(Corresponding to the dark state), and the written state at the time of pre-scan is erased in this period. In the present invention, the erase period is, for example, 2ΔT, 2.5ΔT or 3ΔT.
Or it may be more. The period 1 / 2ΔT following the erase period corresponds to the auxiliary signal application period, and is −7 / 2 ·
V ₀ and −1 / 2 · V ₀ are applied. This auxiliary signal application period is provided so that the voltage waveform applied to the pixel on the scanning line at the time of non-selection is an AC voltage waveform together with the auxiliary signal application period provided in the last period 1 / 2ΔT. There is.
The period ΔT set between the two auxiliary signal application periods corresponds to the writing period, and the voltage 3 applied selectively is applied.
V ₀ is a voltage that exceeds the other threshold voltage of the chiral smectic liquid crystal, causes the other alignment state (for example, corresponds to a bright state), and the voltage V ₀ selectively applied to another pixel is , The threshold voltage of the chiral smectic liquid crystal is not exceeded, and the alignment state during the erasing period is maintained as it is.

FIG. 7 shows another specific example, which is the same as the drive waveform of FIG. 5 except that the voltage waveform of the information signal 2 of FIG. 5 is changed. FIG. 8 is a composite waveform when the drive waveform of FIG. 7 is used.

FIG. 9 shows another specific example, except that the erase period of the scan selection signal in FIG. 5 is changed to 3ΔT.
It is the same as the drive waveform of FIG. FIG. 10 is a composite waveform when the drive waveform of FIG. 9 is used.

11 and 12 are time-series waveform charts when the scan selection signal of FIG. 9 is output to the scan electrodes. FIG.
In the second specific example, even if the number of scanning lines is 1000 or more,
It can be driven at a high frame frequency (for example, 15 Hz or higher). Further, in the specific example of FIG. 12, the period when the voltage of the information signal is zero is omitted. Further, in the time-series waveforms of FIGS. 11 and 12, an AC voltage having a time average voltage of zero is applied to the pixels on the scanning line when scanning is not selected.

Further, when both the ferroelectric state and the antiferroelectric state of the chiral smectic liquid crystal are used, as shown in FIG.
Driving is performed by setting the voltages of the erase period of the scanning selection signal and the auxiliary signal application period of the first half shown in FIGS. 7 and 9 to zero and applying a DC (direct current) component to the scanning non-selection signal. be able to. At this time, it is preferable to invert the polarity of the DC component and the polarity of the voltage during the writing period of the scan selection signal for each frame. Such a specific example is shown in FIG.
It illustrates in. The time-series waveform illustrated in FIG. 13 uses the drive waveform of FIG. 9.

11, 12, and 13, the time average value of the information signal applied in synchronization with the scan selection period is the time average value of the AC voltage applied to the pixels on the scan line when the scan is not selected, and the scan. A voltage having a crest value that is zero based on the difference from the voltage applied to the scan electrode when it is not selected and whose information signal is different for each of the first phase, the second phase, and the third phase. And the second phase voltage has the same voltage value as the average value of the first phase voltage and the third phase voltage, and the combined voltage of the second phase voltage and the scan selection signal voltage is chiral. When a voltage exceeding the threshold voltage of the smectic liquid crystal is generated and the second phase period is ΔT, the sum of the first and third phase periods is ΔT. Further, in FIGS. 11 and 12, the difference is zero. In FIG. 13, the difference is a DC component (± 2V ₀ ).

Further, in the present invention, the drive waveforms shown in FIGS. 5 and 7 can be similarly used in place of the drive waveform shown in FIG. 9 used in the time-series waveform diagrams of FIGS. 11 to 13.

FIGS. 14 and 15 are modified examples in which the crest values of the drive waveform information signals shown in FIGS. 5 and 7 are three types, and are used in the time-series waveform diagrams of FIGS. 11 to 13. It can be applied by changing to the drive waveform of FIG. 14
And the information signal 1 of FIG. 15, ± V _0, 3 kinds of peak value of -1 / 2 · V ₀ and -3/2 · V ₀ is used, the information signal 2, ± V _0, 1/2 Three types of peak values, V ₀ and 3/2 · V ₀ , are used. The information signals 1 and 2 are divided by the applied voltage peak value during the auxiliary signal application period of 1/4 · ΔT.

[0052]

According to the present invention, even if the spontaneous polarization of the chiral smectic liquid crystal is 10 nC / cm ² or more, a "burn-in" with time occurs when a display operation by matrix driving is performed for a long time. The occurrence of the phenomenon could be alleviated or suppressed.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a chiral smectic liquid crystal panel used in the present invention.

FIG. 2 is a plan view of a matrix electrode structure used in the present invention.

FIG. 3 is a block diagram of the device of the present invention.

FIG. 4 is a timing chart of image information communication used in the present invention.

FIG. 5 is a diagram of drive waveforms used in the present invention.

6 is a combined waveform diagram based on the drive waveforms of FIG.

FIG. 7 is a diagram of another drive waveform used in the present invention.

8 is a composite waveform diagram based on the drive waveforms of FIG.

FIG. 9 is a diagram of another drive waveform used in the present invention.

FIG. 10 is a combined waveform diagram based on FIG. 9.

11 is a time-series waveform chart when the drive waveform of FIG. 5 is used.

FIG. 12 is another time-series waveform diagram when the drive waveform of FIG. 5 is used.

13 is another time-series waveform diagram when the drive waveform of FIG. 5 is used.

FIG. 14 is a diagram of another drive waveform used in the present invention.

FIG. 15 is a diagram of another drive waveform used in the present invention.

Front page continued (72) Inventor Hidetoshi Tsuzuki, 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor, Kazunori Katakura 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. Within

Claims (24)

[Claims] 1. A pair of substrates, a matrix electrode which constitutes a pixel by intersecting a scanning electrode provided on one substrate of the pair of substrates and a signal electrode provided on the other substrate, and between the pair of substrates. A liquid crystal panel having a chiral smectic liquid crystal arranged in a pair, wherein the pair of substrates are subjected to different alignment treatments, and the scanning electrodes are sequentially provided with different waves in at least a first phase and a second phase. A scan selection signal composed of a high value voltage is applied to select at least one scan electrode, and in synchronization with the scan selection signal, an information signal composed of at least three peak values is applied to the signal electrode. , Thereby applying a voltage exceeding one threshold voltage of the chiral smectic liquid crystal to the pixel on the selected scan electrode in the first phase, thereby non-selecting the display state of the pixel. And driving means for determining the display state of the pixel by applying a voltage exceeding the other threshold voltage of the chiral smectic liquid crystal to the selected pixel among the erased pixels in the second phase. Liquid crystal device. 2. The information signal has a voltage waveform composed of different peak values in the first phase, the second phase and the third phase, and the second phase of the scan selection signal and the second phase of the information signal.
The liquid crystal device according to claim 1, wherein the liquid crystal device is synchronized with the phase. 3. An AC voltage is generated by the information signal received by a pixel on a scan electrode when scanning is not selected, and a time average value of the AC voltage is based on a voltage applied to the scanning electrode when scanning is not selected. The liquid crystal device according to claim 1, which is zero. 4. The information signal applied in synchronization with the scan selection signal has different peak value voltages for each of the first phase, the second phase and the third phase, and the second phase The liquid crystal device according to claim 1, wherein the voltage has a voltage value equal to an average value of the first phase voltage and the third phase voltage. 5. The information signal applied in synchronism with the scan selection signal has a peak value voltage which is in phase with each of the first phase, the second phase and the third phase, and the second phase The voltage has the same voltage value as the average value of the first phase voltage and the third phase voltage, and the combined voltage of the second phase voltage and the scan selection signal voltage exceeds the threshold voltage of the chiral smectic liquid crystal. The liquid crystal device according to claim 1, which generates a different voltage. 6. The information signal applied in synchronism with the scan selection signal has different peak value voltages for each of the first phase, the second phase and the third phase, and the second phase The voltage has the same voltage value as the average value of the first phase voltage and the third phase voltage, and the combined voltage of the second phase voltage and the scan selection signal voltage exceeds the threshold voltage of the chiral smectic liquid crystal. 2. The liquid crystal device according to claim 1, wherein the sum of the first and third phase periods is ΔT, when a voltage is generated and the second phase period is ΔT. 7. The information signal applied in synchronization with the scan selection signal has different peak value voltages for each of the first phase, the second phase and the third phase, and the second phase The voltage has the same voltage value as the average value of the first phase voltage and the third phase voltage, and the combined voltage of the second phase voltage and the scan selection signal voltage exceeds the threshold voltage of the chiral smectic liquid crystal. 2. The liquid crystal device according to claim 1, wherein when the second phase period is ΔT, the first and third phase periods are 1/2 · ΔT, respectively. 8. The time average value of the information signal applied in synchronization with the scan selection signal is zero based on the difference between the time average value of the AC voltage and the voltage applied to the scan electrode when scanning is not selected. And the information signal has different peak values of voltage for each of the first phase, the second phase and the third phase,
The second phase voltage has the same voltage value as the average value of the first phase voltage and the third phase voltage, and the combined voltage of the second phase voltage and the scan selection signal voltage is the chiral smectic liquid crystal. The liquid crystal device according to claim 1, wherein a sum of the first and third phase periods is ΔT when a voltage exceeding a threshold voltage is generated and the second phase period is ΔT. 9. The liquid crystal device according to claim 8, wherein the difference is zero. 10. The liquid crystal device according to claim 8, wherein the difference is a DC component. 11. The time average value of the information signal applied in synchronization with the scan selection signal is zero based on the difference between the time average value of the AC voltage and the voltage applied to the scan electrode when scanning is not selected. Where the information signal has a voltage having a peak value different from each other for each of the first phase, the second phase and the third phase, and the second phase voltage is the first phase voltage and the third phase voltage. A voltage value that is the same as the average value of the phase voltage, and the combined voltage of the second phase voltage and the scan selection signal voltage exceeds the threshold voltage of the chiral smectic liquid crystal, and the second phase period 2. The liquid crystal device according to claim 1, wherein the first and third phase periods are 1/2 · ΔT, respectively, where ΔT is ΔT. 12. The liquid crystal device according to claim 11, wherein the difference is zero. 13. The difference is a DC component.
The liquid crystal device described. 14. The liquid crystal device according to claim 1, wherein only one of the pair of substrates is subjected to uniaxial alignment treatment, and the other substrate is subjected to non-uniaxial alignment treatment. 15. The liquid crystal device according to claim 13, wherein the non-uniaxial alignment process is a random alignment process. 16. The liquid crystal device according to claim 1, wherein the pair of substrates have uniaxial alignment characteristics and have alignment control films formed of different films. 17. The liquid crystal device according to claim 15, wherein one of the films is an organic film and the other is an inorganic film. 18. The liquid crystal device according to claim 1, wherein the chiral smectic liquid crystal is a liquid crystal exhibiting a ferroelectric state. 19. The chiral smectic liquid crystal is a liquid crystal exhibiting a ferroelectric state and an antiferroelectric state.
The liquid crystal device described. 20. Among the liquid crystal components constituting the chiral smectic liquid crystal, at least one liquid crystal component has a fluorinated carbon terminal group, and at least one carbon of the fluorinated carbon is completely fluorinated. The liquid crystal device according to claim 1. 21. The number of carbon atoms of the fluorinated carbon is 2 to
20. The liquid crystal device according to claim 19, which is 15. 22. The chiral smectic liquid crystal has a temperature range in which an isotropic phase to a smectic A phase is generated at a lowered temperature, and at least one liquid crystal component of the liquid crystal components constituting the chiral smectic liquid crystal is fluorinated carbon. The liquid crystal device according to claim 1, wherein the liquid crystal device has an end group, and at least one carbon in the fluorinated carbon is completely fluorinated. 23. The number of carbon atoms of the fluorinated carbon is 2 to
23. The liquid crystal device according to claim 22, which is 15. 24. The driving means comprises means for causing at least two continuous scan selection signals to partially overlap and output to different scan electrodes. Liquid crystal device.