JP3184739B2 - Liquid crystal device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal panel using a chiral smectic liquid crystal exhibiting a ferroelectric state or both a ferroelectric state and an antiferroelectric state, and a liquid crystal device having a matrix driving device.

[0002]

2. Description of the Related Art In a chiral smectic liquid crystal device having a chevron structure described in U.S. Pat. Nos. 4,900,132 and 4,997,264, the tilt angle could not be set to a large value, so that it was applied to a display device. Occasionally, a high brightness light source was required to generate sufficient display brightness. U.S. Pat. No. 5,377,033 discloses a chiral smectic liquid crystal having a bookshelf structure in which the tilt angle can be set to a large value. In the chiral smectic liquid crystal of this bookshelf structure, a cholesteric phase is not expressed from an isotropic phase at a temperature decrease, and a smectic A phase is immediately generated from an isotropic phase.
There is a problem that uniform orientation cannot be obtained depending on the orientation control method used when forming the chevron structure. In European Patent Specification No. 637622, etc., only one of a pair of substrates constituting a chiral smectic liquid crystal panel is subjected to a uniaxial alignment process such as a rubbing process or an oblique deposition process, and the other substrate is processed. It has been clarified that a chiral smectic liquid crystal panel having a bookshelf structure in a uniform alignment state was obtained by using a pair of substrates subjected to a random alignment treatment without giving a uniaxial alignment characteristic.

Also, Keizo Ito, "Television Society Journal", Vol. 44, no. 5, pp. 536-543
(1990) "Switching between three stable states in antiferroelectric stabilized (AFS) ferroelectric liquid crystal (FLC)"
Developed an antiferroelectric state and applied an alignment control method of applying polyimide rubbing to only a pair of substrates to a chiral smectic liquid crystal having a temperature range in which a smectic A phase is immediately generated from an isotropic phase at a reduced temperature. At that time, it was stated that uniform orientation was realized. This document also
It is clarified that a chevron structure appears when no voltage is applied, and a bookshelf structure appears when a voltage is applied.

[0004]

A liquid crystal panel using a chiral smectic liquid crystal capable of achieving such a high luminance display has an asymmetric alignment control structure provided to a pair of substrates and has a spontaneous polarization of 10 nC. / Cm ² or more, the chiral smectic liquid crystal that should produce a plurality of stable alignment states during the display operation by the matrix drive, and only a single alignment state becomes a stable alignment state over time. It has been found that a phenomenon in which the orientation state is changed in such a manner, that is, a so-called "burn-in" phenomenon occurs. The object of the present invention is the above-mentioned "seizure".
It is an object of the present invention to provide a liquid crystal device capable of alleviating or suppressing the phenomenon.

[0005]

The present invention comprises a pair of substrates,
A matrix electrode having pixels formed by intersecting a scanning electrode provided on one of the substrates and a signal electrode provided on the other substrate, and a liquid crystal having a chiral smectic liquid crystal disposed between the pair of substrates. A liquid crystal panel having a pair of substrates subjected to different alignment treatments, and a scanning selection signal sequentially formed on scanning electrodes at different peak values in at least a first phase and a second phase. the so applied, selecting at least one of the scan electrodes, in synchronization with the scanning selection signal, to the signal electrodes, and a voltage zero reference, first is constituted by a first voltage of at least three different peak values 1 information signal and the first signal having the opposite phase to the first voltage.
A second information signal composed of a second voltage which is a voltage.
Information signal is selectively applied, thereby applying a voltage exceeding one threshold voltage of the chiral smectic liquid crystal to the pixel on the selected scanning electrode in the first phase, thereby displaying the display state of the pixel. Is non-selectively erased, and in the second phase, a display state of the pixel is determined by applying a voltage exceeding the other threshold voltage of the chiral smectic liquid crystal to a selected pixel among the erased pixels. A liquid crystal device having a driving unit is characterized.

In the present invention, the information signal has a voltage waveform composed of different peak values in a first phase, a second phase, and a third phase, respectively, and a second phase of the scanning selection signal and a second phase of the information signal. The two phases are synchronized.

In the present invention, an AC voltage is generated by the information signal received by the pixel on the scan electrode when scanning is not selected, and a time average value of the AC voltage is based on a voltage applied to the scanning electrode when scanning is not selected. Is zero.

[0008]

In the present invention, the information signal applied in synchronization with the scanning selection signal has different peak values from each other for each of a first phase, a second phase, and a third phase. The peak value based on zero voltage in the first phase is the peak value based on zero voltage in the first phase and the third phase
And a composite voltage of the second phase voltage and the scanning selection signal voltage that exceeds the threshold value of the chiral smectic liquid crystal is the same peak value as the average value of the peak values with reference to zero voltage at I do.

In the present invention, the information signal applied in synchronization with the scanning selection signal has different peak values for each of the first phase, the second phase, and the third phase. The peak value based on zero voltage in the first phase is the peak value based on zero voltage in the first phase and the third phase
And a composite voltage of the second phase voltage and the scanning selection signal voltage that exceeds the threshold value of the chiral smectic liquid crystal is the same peak value as the average value of the peak values with reference to zero voltage at Then, when the second phase period is ΔT, the sum of the first and third phase periods is ΔT.

In the present invention, the information signal applied in synchronization with the scanning selection signal has different peak values from each other for each of a first phase, a second phase, and a third phase. The peak value based on zero voltage in the first phase is the peak value based on zero voltage in the first phase and the third phase
And a composite voltage of the second phase voltage and the scanning selection signal voltage that exceeds the threshold value of the chiral smectic liquid crystal is the same peak value as the average value of the peak values with reference to zero voltage at When the second phase period is ΔT, the first and third phase periods are each ・ ΔT.

In the present invention, the time average value of the information signal applied in synchronization with the scan selection signal is the difference between the time average value of the AC voltage and the voltage applied to the scan electrode when scanning is not selected (voltage zero). Or a DC component voltage), and the information signal has peak-to-peak voltages different from each other for each of the first phase, the second phase, and the third phase . the peak value relative to the voltage zero first phase
Put in a reference definitive zero voltage was a pulse height third phase
The same peak value as the average value with the peak value based on zero voltage
When the combined voltage of the second phase voltage and the scan selection signal voltage generates a voltage exceeding the threshold voltage of the chiral smectic liquid crystal and the second phase period is ΔT, the first
And the sum of the third phase period is ΔT.

In the present invention, the time average value of the information signal applied in synchronization with the scan selection signal is the difference between the time average value of the AC voltage and the voltage applied to the scan electrode when scanning is not selected (voltage zero). Or a DC component voltage), and the information signal has peak-to-peak voltages different from each other for each of the first phase, the second phase, and the third phase . the peak value relative to the voltage zero first phase
Put in a reference definitive zero voltage was a pulse height third phase
The same peak value as the average value with the peak value based on zero voltage
When the combined voltage of the second phase voltage and the scan selection signal voltage generates a voltage exceeding the threshold voltage of the chiral smectic liquid crystal and the second phase period is ΔT, the first
And the third phase period is そ れ ぞ れ ΔT, respectively.

In the present invention, there is provided a liquid crystal device in which only one of the pair of substrates is subjected to a uniaxial alignment treatment and the other substrate is subjected to a non-uniaxial alignment treatment (for example, a random alignment treatment). In the present invention, the pair of substrates has uniaxial alignment characteristics, and has an alignment control film formed of films different from each other.For example, one of the films is an organic film and the other is formed of an inorganic film. Liquid crystal device.

In the present invention, the chiral smectic liquid crystal is a liquid exhibiting a ferroelectric state or both a ferroelectric state and an antiferroelectric state. In the present invention, among the liquid crystal components constituting the chiral smectic liquid crystal, at least one liquid crystal component has a terminal group of fluorinated carbon (for example, the fluorinated carbon has 2 to 15 carbon atoms), and A chiral smectic liquid crystal in which at least one of the carbons is completely fluorinated is used.

In the present invention, the driving means has means for causing at least two continuous scan selection signals to partially overlap and output to different scan electrodes.

The present invention will be described below with reference to the drawings.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS As a chiral smectic liquid crystal exhibiting a ferroelectric state which can be used in the present invention, at least one type of liquid crystal component has a fluorinated carbon (for example, a fluorinated carbon having 2 to 15 carbon atoms) terminal group. Then, a chiral smectic liquid crystal in which at least one of the fluorinated carbons is completely fluorinated is used. Specific examples of such a liquid crystal include the following compositions 1 to 4 described in U.S. Pat. No. 5,377,033.

Composition 1 76.5% 5-octyl-2- (4- (1,1-dihydroperfluoro-2- (2-butoxyethoxy) ethoxy) phenyl) -pyrimidine 4.5% 5-octyl-2 -(4- (1,1-dihydroperfluorooctyloxy) phenyl) pyrimidine 4.5% 5-nonyl-2- (4- (1,1-dihydroperfluorooctyloxy) phenyl) pyrimidine 4.5% 5-decyl -2- (4- (1,1-dihydroperfluorooctyloxy) phenyl) pyrimidine 10.0% (S) -4- (2-chloro-4-methylpentanonyloxy) phenyl-4- (1,1- Dihydroperfluorobutoxy) benzoate. The transition temperature from the isotropic state (I) to the crystalline state (K) by cooling is I-
73 ° C. for SmA, 30 ° C. for SmA-SmC ^* and Sm
C ^* -K was −10 ° C. or less.

Hereinafter, SmA indicates a smectic A phase, and SmC ^* indicates a chiral smectic C phase.

Composition 2 12.44% 5-hexyl-2- (4- (1,1-dihydroperfluoro-2- (2-butoxyethoxy) ethoxy) phenyl) -pyrimidine 20.74% 5-octyl-2 -(4- (1,1-dihydroperfluorohexyloxy) phenyl) pyrimidine 20.74% 5-nonyl-2- (4- (1,1-dihydroperfluorohexyloxy) phenyl) pyrimidine 20.74% 5-decyl -2- (4- (1,1-dihydroperfluorohexyl) phenyl) pyrimidine 8.30% 5-decyl-2- (4- (1,1-dihydroperfluorobutoxy) phenyl) pyrimidine 7.21% (S) -4- (2-chloro-4-methylpentanoyloxy) phenyl-4- (1,1-dihydroperfluoroptoxy) Zoate 3.25% 2,3-dicyano-4-octyloxyphenyl-4- (1,1-dihydroperfluorohexyloxy) benzoate 6.58% 2,3-difluoro-4-octyloxyphenyl-4- (1 1,1-dihydroperfluorohexyloxy) benzoate The transition temperature from the isotropic state (I) to the crystalline state (K) by cooling is 78 ° C. for I-SmA and 5 ° C. for SmA-SmC ^*.
9 ° C and SmC ^* -K was 12 ° C.

Composition 3 13.08% 5-hexyl-2- (4- (1,1-dihydroperfluoro-2- (2-butoxyethoxy) ethoxy) phenyl) pyrimidine 23.00% 5-octyl-2- (4- (1,1-dihydroperfluorohexyloxy) phenyl) pyrimidine 23.00% 5-nonyl-2- (4- (1,1-dihydroperfluorohexyloxy) phenyl) pyrimidine 23.00% 5-decyl- 2- (4- (1,1-dihydroperfluorohexyloxy) phenyl) pyrimidine 9.20% 5-decyl-2- (4- (1,1-dihydroperfluorobutoxy) phenyl) pyrimidine 8.00% (S) -4- (2-chloro-4-methylpentanoyloxy) phenyl-4- (1,1-dihydroperfluoroptoxy Benzoate transition temperature of the cooling from the isotropic state by (I) to the crystalline state (K) is I-SmA is 81 ° C., the SmA-SmC ^* 5
The temperature was 4 ° C and the SmC ^* -K was 10 ° C.

Composition 4 90% 5-octyl-2- (4- (1,1-dihydroperfluoro-2- (2-butoxyethoxy) ethoxy) phenyl) pyrimidine 10 % 5-octyl-2- (4- ( S)-(2-Chloro-4-methylpentanoyloxy) phenyl) pyrimidine The cooling transition temperature from the isotropic state (I) to the crystalline state (K) is 76 ° C. for I-SmA and SmA-SmC *. Is 3
0 ° C and SmC * -K were <-10 ° C.

The chiral smectic liquid crystal which exhibits both the ferroelectric state and the antiferroelectric state which can be used in the present invention includes the following compounds.

[0025]

[Outside 1]

[0026]

[Outside 2]

In the above table, Cry is a crystal phase, and SmX is
Unknown phase, SmC _A ^* , SmCr ^* and SmC ^*
Is a state of a chiral smectic C phase, and when a helical arrangement structure inherently expressed in the chiral smectic C phase is suppressed to generate a non-helical arrangement state, SmC _A ^* becomes strong under a voltage applied state. SmC ^* indicates a phase that generates a ferroelectric state under no voltage application state, and a phase that generates a dielectric state and an antiferroelectric state under no voltage application state. SmCr ^* represents an unknown phase.

As specific examples of the liquid crystal device exhibiting antiferroelectricity used in the present invention, US Pat. No. 5,046,823, JP-A-6-95624, and JP-A-6-202078.
And Japanese Unexamined Patent Publication No. 6-202082.

FIG. 1 is a sectional view of a liquid crystal panel used in the present invention. 11a and 11b are a pair of crossed Nicol polarizers. Reference numerals 12a and 12b denote transparent substrates such as glass substrates, and the interval between the pair of substrates is set to be thin enough (for example, 1 μm to 5 μm) to suppress the formation of a spiral structure unique to chiral smectic liquid crystal. You.

13a and 13b are a pair of transparent electrodes, one of which is connected to a scanning electrode (scanning line) to which a scanning signal composed of a scanning selection signal and a scanning non-selection signal is applied serially.
The other is set to a signal electrode (information line) to which an information signal corresponding to information is applied in parallel. The scanning electrode and the signal electrode cross each other to form a matrix electrode.

Reference numerals 14a and 14b denote alignment control films that form an asymmetric alignment structure with each other. In the first specific example, only the alignment control film 14a is subjected to a uniaxial alignment process such as a rubbing process or an oblique deposition process. Then, an alignment process is performed on the alignment control film 14b without performing the uniaxial alignment process. The alignment control film 14a includes, for example, a European published specification
It has been rubbed aliphatic polyimide film or US patented rubbed polyimide film described in No. 4639089 Publication described in 450549 JP, polyamide film, polyamide-imide film or polyvinyl alcohol film or the like is used, orientation As the control film 14b, for example, a laminated film of a SiO2 sputtered film described in U.S. Pat. No. 4,662,721 and a fired film of the following organic silane compound or an inorganic insulating film subjected to a non-uniaxial orientation treatment described in U.S. Pat. (For example, silicon nitride, silicon carbide, boron nitride, cesium oxide, silicon oxide, magnesium fluoride) can be used. In the present invention, both of the orientation control films 14a and 14b can be formed of the same film (for example, the same polyimide film and the same polyamide film).

Specific examples of organic silane compounds

[0033]

[Outside 3]

In the second specific example of the asymmetric alignment structure, the films constituting the alignment control films 14a and 14b are different from each other. The different orientation control films 14a and 14b are both subjected to a uniaxial orientation process such as a rubbing process or an oblique deposition process. A rubbed organic film (for example, a polyimide film or a polyamide film) is used as the alignment control film 14a, and a rubbed inorganic film (for example, a baked film of the above-mentioned organic silane compound) is used as the alignment control film 1b. .

Reference numeral 15 denotes the above-described chiral smectic liquid crystal. In the chiral smectic liquid crystal, a unique helical structure is suppressed by an interface effect between the pair of substrates 12a and 12b, and as a result, a non-helical structure is formed. In the case where the chiral smectic liquid crystal having a non-helical structure does not exhibit an antiferroelectric state but exhibits a ferroelectric state, it preferably exhibits two stable alignment states, or the chiral smectic liquid crystal exhibits a ferroelectric state. When both the state and the antiferroelectric state are expressed, preferably, three stable orientation states are expressed. Further, in a liquid crystal panel that produces the two stable alignment states described above, the extinction position of the pair of polarizers 11a and 11b due to crossed Nicols is aligned with the molecular axis direction of one of the stable alignment states. In the liquid crystal panel that produces the three stable alignment states described above, the pair of polarizers 11
The extinction positions of the crossed Nicols a and 11b are made to coincide with the average molecular axis direction in the antiferroelectric state, the dark state in the antiferroelectric state, and the bright state in the ferroelectric state.

FIG. 2 is a plan view of the matrix electrode structure. The matrix electrode structure includes a scan electrode 13a (scan line S
₁ , S ₂ , S ₃ , S ₄ , S ₅ ...) And the signal electrode 13b
(Information lines I ₁ , I ₂ , I ₃ , I ₄ , I ₅ ...).

FIG. 3 shows a ferroelectric liquid crystal display device 101 and a graphics controller 1 provided on a main unit such as a personal computer as a supply source of display information.
FIG. 2 is a block diagram showing the configuration of a second embodiment. FIG. 4 is a communication timing chart of image information. The liquid crystal panel 103
1120 scanning electrodes and 1280 information electrodes are arranged in a matrix, and ferroelectric liquid crystals are sealed in two glass plates that have been subjected to an alignment process. The lines are connected to the information line driving circuit 105, respectively.

The operation will be described below with reference to the drawings. The graphics controller 102 transmits the scanning line address information for specifying the scanning electrodes and the image information (PD0 to PD3) on the scanning line specified by the address information to the display driving circuit (the scanning line driving circuit 104 and the information line (Composed by the drive circuit 105). In this embodiment, since the image information having the scanning line address information and the display information is transferred through the same transmission line, the two types of information must be distinguished. The signal for this identification is AH / DL, and this AH / DL signal is H
When the level is i level, it is information of the scanning line address, and when the level is Lo, it is display information.

The scanning line address information is stored in the liquid crystal display device 10.
1, the image information PD0 to PD
After being extracted from the image information transferred as 3,
While the designated scanning electrode is driven by the scanning signal generating circuit 107, the display information is guided to the shift register 108 in the information line driving circuit 105, and is shifted in units of four pixels by the transfer clock. When the shift register 108 completes the shift for one scanning line in the horizontal direction, the display information for 1280 pixels is transferred to the line memory 109 provided therewith and stored for one horizontal scanning period to generate an information signal. The information is output from the circuit 110 to each information electrode as a display information signal.

In this embodiment, the driving of the liquid crystal panel 103 in the liquid crystal display device 101 and the generation of the scanning line address information and the display information in the graphics controller 102 are performed asynchronously. It is necessary to synchronize (101/102).
The signal that governs this synchronization is SYNC, which is generated by the drive control circuit 111 in the liquid crystal display device 101 every horizontal scanning period. The graphics controller 102 always has S
The YNC signal is monitored. When the SYNC signal is at the Lo level, the image information is transferred. When the SYNC signal is at the Hi level, the transfer is not performed after the transfer of the image information for one horizontal scanning line is completed. That is, in FIG. 2, upon detecting that the SYNC signal has become Lo level, the graphics controller 102 immediately sets the AH / DL signal to Hi level and starts transferring image information for one horizontal scanning line. The drive control circuit 111 in the liquid crystal display device 101 sets the SYNC signal to the Hi level during the image information transfer period. A drive control circuit (FLCD controller) 11 after the writing to the liquid crystal panel 103 is completed after a predetermined one horizontal scanning time
1 returns the SYNC signal to the Lo level again, and can receive the image information of the next scanning line.

FIG. 5 shows a scanning selection signal (Ss) output from the scanning line driving circuit 104 and the information line driving circuit 105,
Scanning non-selection signal (Sn), information signals 1 (Is) and 2
(In) represents a voltage waveform. The voltage of the scan selection signal is 2V ₀ and-with respect to the voltage of the scan non-selection signal.
It has a bipolar voltage of 2V ₀ . The first half period of 3/2 · ΔT (period of voltage 2V ₀ ) of the scanning selection signal is used for the erasing period, and the second half of ΔT period (period of −2V ₀ )
Are used as a writing period. Then, a period of 1 / 2ΔT between the erase period and the write period (voltage 2V
The period of ₀ ) and the last period of 1 / 2ΔT (period of 0) are periods set on the scanning side in order to set the voltage average values of the information signals 1 and 2 to zero. During the first half ΔΔT period (first phase) of the information signal 1, the voltage is −3 ・ V
₀ , the second half ΔΔT period (third phase)
ＶV ₀ and the ΔT period (second phase) is the voltage V ₀
Therefore, the voltage average value is zero. The information signal 2 is
The information signal 1 has an opposite phase relationship.

(Is-Ss) and (In-Sn) in FIG.
Are the combined waveforms of the scanning selection signal and the information signals 1 and 2 in FIG. 5, respectively, (Is-Ss) and (In-Sn).
Are respectively the scanning non-selection signal and the information signals 1 and 2 of FIG.
This is a composite waveform of

The scanning selection signal may be sequentially output to the scanning electrode 13a for each scanning electrode (non-interlaced scanning) or one or more interlaced scanning outputs (interlaced scanning). In particular, in the case of a repetitive scanning operation, an operation based on an interlaced scanning output is used. Further, when the display screen is rewritten by the information from the keyboard input, only the non-interlaced scanning is performed on the scanning lines of the area to be rewritten on the display screen, and the interlaced scanning is performed on the scanning lines of the unrewritten area on the display screen. Is good.

The composite waveforms (Is-Ss) and (In-S
The voltage applied in the period 3 / 2ΔT in s) exceeds one threshold voltage of the chiral smectic liquid crystal, and the pixels on the scanning line are in one alignment state (for example,
(Corresponding to a dark state), and the written state in the pre-scan is erased in this period. In the present invention, the erasing period is, for example, 2ΔT, 2.5ΔT, or 3ΔT
Or it may be more. The period 1 / 2ΔT following the erasing period corresponds to the auxiliary signal application period, and is −7 / 2 ·
V ₀ and − ／ · V ₀ are applied. The auxiliary signal application period is provided so that the voltage waveform applied to the pixel on the scanning line at the time of non-selection becomes an AC voltage waveform together with the auxiliary signal application period provided in the last period 1 / 2ΔT. I have.
The period ΔT set between the two auxiliary signal application periods corresponds to the write period, and the selectively applied voltage 3
V ₀ is a voltage exceeding the other threshold voltage of the chiral smectic liquid crystal, causing the other alignment state (for example, corresponding to a bright state), and selectively applying a voltage V ₀ to another pixel. Since the threshold voltage of the chiral smectic liquid crystal is not exceeded, the alignment state during the erasing period is maintained.

FIG. 7 shows another specific example, which is the same as the drive waveform of FIG. 5 except that the voltage waveform of the information signal 2 of FIG. 5 is changed. FIG. 8 is a composite waveform when the drive waveform of FIG. 7 is used.

FIG. 9 shows another specific example, except that the erasing period of the scan selection signal of FIG. 5 is changed to 3ΔT.
The driving waveform is the same as that of FIG. FIG. 10 is a composite waveform when the drive waveform of FIG. 9 is used.

FIGS. 11 and 12 are time series waveform charts when the scan selection signal of FIG. 9 is output to the scan electrodes. FIG.
In the specific example 2, even if the number of scanning lines is 1000 or more,
It can be driven at a high frame frequency (for example, 15 Hz or more). Further, in the specific example of FIG. 12, the period during which the voltage of the information signal is zero is omitted. In the time-series waveforms of FIGS. 11 and 12, an AC voltage having a time average of zero voltage is applied to pixels on a scanning line when scanning is not selected.

When utilizing both the ferroelectric state and the antiferroelectric state of the chiral smectic liquid crystal, FIG.
The drive is performed by setting the voltages of the scan selection signal erasing period and the first half auxiliary signal application period shown in FIGS. 7 and 9 to zero, respectively, and applying a DC (direct current) component to the scanning non-selection signal. be able to. At this time, it is preferable to invert the polarity of the DC component and the polarity of the voltage during the writing period of the scan selection signal for each frame. FIG. 13 shows such a specific example.
Illustrated in FIG. The time series waveform shown in FIG. 13 uses the drive waveform of FIG.

In FIG. 11, FIG. 12, and FIG. 13, the time average value of the information signal applied in synchronization with the scan selection period is equal to the time average value of the AC voltage applied to the pixels on the scan line when scanning is not selected. When the information signal is zero based on the difference from the voltage applied to the scanning electrode at the time of non-selection, and the information signal has a peak value voltage different from each other for each of the first phase, the second phase, and the third phase. And the second phase voltage has the same voltage value as the average value of the first phase voltage and the third phase voltage, and the composite voltage of the second phase voltage and the scan selection signal voltage is chiral. When a voltage exceeding the threshold voltage of the smectic liquid crystal is generated and the second phase period is defined as ΔT, the sum of the first and third phase periods is ΔT. In FIGS. 11 and 12, the difference is zero.

In the present invention, the driving waveforms shown in FIGS. 5 and 7 can be similarly used instead of the driving waveform shown in FIG. 9 used in the time-series waveform diagrams shown in FIGS.

FIGS. 14 and 15 show modifications in which the peak values of the information signals of the drive waveforms shown in FIGS. 5 and 7 are four types, respectively, and are used in the time-series waveform diagrams of FIGS. The present invention can be applied in place of the driving waveform shown in FIG. FIG.
And the information signal 1 of FIG. 15, ± V0, 4 kinds of peak value of -1 / 2 · V ₀ and -3/2 · V ₀ is used, the information signal 2, ± V0, 1/2 · V Four types of peak values of ₀ and 3/2 · V ₀ are used. In the information signals 1 and 2, the applied voltage peak value during the auxiliary signal application period is divided by ４ · ΔT.

[0052]

According to the present invention, even if the spontaneous polarization of the chiral smectic liquid crystal is 10 nC / cm ² or more, when the display operation by the matrix drive is performed for a long period of time, “burn-in” over time occurs. The occurrence of the phenomenon could be sufficiently alleviated or suppressed.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a chiral smectic liquid crystal panel used in the present invention.

FIG. 2 is a plan view of a matrix electrode structure used in the present invention.

FIG. 3 is a block diagram of the device of the present invention.

FIG. 4 is a timing chart of image information communication used in the present invention.

FIG. 5 is a diagram of a driving waveform used in the present invention.

FIG. 6 is a composite waveform diagram based on the drive waveform of FIG.

FIG. 7 is a diagram of another drive waveform used in the present invention.

8 is a composite waveform diagram based on the drive waveform of FIG.

FIG. 9 is a diagram of another drive waveform used in the present invention.

FIG. 10 is a composite waveform diagram based on FIG. 9;

FIG. 11 is a time-series waveform diagram when the drive waveform of FIG. 5 is used.

FIG. 12 is another time-series waveform diagram when the drive waveform of FIG. 5 is used.

FIG. 13 is another time-series waveform chart when the drive waveform of FIG. 5 is used.

FIG. 14 is a diagram of another drive waveform used in the present invention.

FIG. 15 is a diagram of another drive waveform used in the present invention.

Continued on the front page (72) Inventor Hidetoshi Tsuzuki 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Kazunori Katakura 3- 30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (56) References JP-A-5-323282 (JP, A) JP-A-2-281233 (JP, A) JP-A-4-3111919 (JP, A) JP-A-4-323615 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) G02F 1/133

Claims (18)

(57) [Claims] 1. A pair of substrates, a matrix electrode in which pixels are formed by intersecting a scanning electrode provided on one of the pair of substrates and a signal electrode provided on the other of the pair of substrates, and between the pair of substrates. A liquid crystal panel having a chiral smectic liquid crystal disposed on a pair of substrates, the liquid crystal panels having different alignment treatments applied to the pair of substrates, and the scanning electrodes sequentially having different waves in at least a first phase and a second phase. A scan selection signal composed of a high voltage is applied to select at least one scan electrode, and in synchronization with the scan selection signal, a signal electrode is supplied with at least 3
A first information signal composed of first voltages having different peak values and a second voltage which is a voltage having an opposite phase to the first voltage.
An information signal composed of the second information signal thus configured is selectively applied, whereby one threshold voltage of the chiral smectic liquid crystal is applied to the pixel on the selected scanning electrode in the first phase. The display state of the pixel is non-selectively erased by applying a voltage exceeding the threshold voltage, and in the second phase, the other of the erased pixels exceeds the other threshold voltage of the chiral smectic liquid crystal. A liquid crystal device having driving means for determining a display state of the pixel by applying a voltage. 2. The information signal has a voltage waveform having different peak values in a first phase, a second phase, and a third phase, respectively, and a second phase of the scanning selection signal and a second phase of the information signal.
2. The liquid crystal device according to claim 1, wherein the phase is synchronized. 3. An AC voltage is generated by the information signal received by a pixel on a scan electrode when scanning is not selected, and a time average value of the AC voltage is based on a voltage applied to the scanning electrode when scanning is not selected. 2. The liquid crystal device according to claim 1, wherein the value is zero. 4. An information signal applied in synchronization with the scan selection signal has a peak value voltage different from each other for each of a first phase, a second phase, and a third phase. 2. The peak value based on zero voltage in the first phase is a peak value equal to the average value of the peak value based on zero voltage in the first phase and the peak value based on zero voltage in the third phase. The liquid crystal device according to the above. 5. An information signal applied in synchronization with the scanning selection signal has a peak value voltage mutually phase-shifted for each of a first phase, a second phase, and a third phase, and A peak value based on zero voltage in the first phase is the same as the average value of the peak value based on zero voltage in the first phase and the peak value based on zero voltage in the third phase, 2. The liquid crystal device according to claim 1, wherein a combined voltage of the second phase voltage and the scanning selection signal voltage generates a voltage exceeding a threshold voltage of the chiral smectic liquid crystal. 6. An information signal applied in synchronization with the scan selection signal has a peak value voltage different from each other for each of a first phase, a second phase, and a third phase. A peak value based on zero voltage in the first phase is the same as the average value of the peak value based on zero voltage in the first phase and the peak value based on zero voltage in the third phase, When the combined voltage of the second phase voltage and the scan selection signal voltage generates a voltage exceeding the threshold voltage of the chiral smectic liquid crystal and the second phase period is ΔT, the first and third voltages are set.
2. The liquid crystal device according to claim 1, wherein the sum of the phase periods is ΔT. 7. An information signal applied in synchronization with the scanning selection signal has a peak value voltage different from each other for each of a first phase, a second phase, and a third phase. A peak value based on zero voltage in the first phase is the same as the average value of the peak value based on zero voltage in the first phase and the peak value based on zero voltage in the third phase, When the combined voltage of the second phase voltage and the scan selection signal voltage generates a voltage exceeding the threshold voltage of the chiral smectic liquid crystal and the second phase period is ΔT, the first and third voltages are set.
2. The liquid crystal device according to claim 1, wherein each of the phase periods is 1 / 2.DELTA.T. 8. The liquid crystal device according to claim 1, wherein only one of the pair of substrates is subjected to a uniaxial alignment treatment, and the other substrate is subjected to a non-uniaxial alignment treatment. 9. The liquid crystal device according to claim 8, wherein the non-uniaxial alignment processing is a random alignment processing. 10. The liquid crystal device according to claim 1, wherein the pair of substrates have uniaxial alignment characteristics and have alignment control films formed of different films. 11. The liquid crystal device according to claim 10, wherein one of the films is an organic film and the other is an inorganic film. 12. The liquid crystal device according to claim 1, wherein the chiral smectic liquid crystal is a liquid crystal exhibiting a ferroelectric state. 13. The liquid crystal according to claim 1, wherein the chiral smectic liquid crystal exhibits a ferroelectric state and an antiferroelectric state.
The liquid crystal device according to the above. 14. At least one of the liquid crystal components constituting the chiral smectic liquid crystal has a fluorinated carbon terminal group, and at least one carbon in the fluorinated carbon is completely fluorinated. The liquid crystal device according to claim 1. 15. The fluorinated carbon having 2 to 2 carbon atoms.
15. The liquid crystal device according to claim 14. 16. The chiral smectic liquid crystal has a temperature range in which a smectic A phase changes from an isotropic phase to a temperature decrease, and at least one of the liquid crystal components constituting the chiral smectic liquid crystal is a fluorinated carbon. The liquid crystal device according to claim 1, having a terminal group, wherein at least one carbon in the fluorinated carbon is completely fluorinated. 17. The fluorinated carbon having 2 to 2 carbon atoms.
The liquid crystal device according to claim 16, which is 15. 18. The driving device according to claim 1, wherein the driving unit includes a unit configured to output at least two consecutive scan selection signals to different scan electrodes while partially overlapping each other. Liquid crystal device.