JPH08307898A - Sampling clock generation device - Google Patents

Abstract

PURPOSE: To change a tracking characteristic of a sampling clock in response to a state of a color burst of a video signal. CONSTITUTION: When a color burst of a video signal 100 is stable, a selector 16 selects a 1st clock 102 with a high tracking characteristic. When the color burst is unstable or a video image is switched, the selector 16 selects a 2nd clock 104 whose tracking characteristic slows down. The clock selected by the selector 16 is multiplied by a sampling clock generator 18 to generate a required sampling clock 108.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sampling clock generator for generating a sampling clock of a video signal, and more specifically, a linear PCM coding and coding of an analog baseband video signal by analog-digital conversion. The present invention relates to a sampling clock generation device suitable for generating a sampling clock when transmitting data via a digital line.

[0002]

2. Description of the Related Art FIG. 2 shows a system configuration of a conventional digital video transmission device. The digital video transmission device has an analog-digital converter (A /
D) 50, a sampling clock generation circuit 52, a multiplexer 54 and a modulator 56, and the receiving unit includes a demodulator 58, a demultiplexer 60, a sampling clock recovery circuit 62 and a digital-analog converter. (D / A)
It is configured with 64. As shown in FIG. 3, the sampling clock generation circuit 52 includes a burst lock oscillator 70 for generating a signal 202 having a frequency synchronized with the color burst of the video signal 200, and a sampling clock required by multiplying the signal 202. A phase-locked oscillator 72 for generating 204 is provided.

In the transmitter, the sampling clock generation circuit 52 generates the sampling clock 204 according to the video signal 200, and the analog-digital converter 50 outputs the sampling clock 2 to the sampling clock 2.
The video signal 200 is sampled according to 04, and the sampled signals are sequentially output to the multiplexer 54. Then, the signal multiplexed by the multiplexer 54 is modulated by the modulator 56 and sent as digital data to the transmission path.

On the other hand, in the receiver, the demodulator 58 demodulates the digital data sent from the transmitter, the demultiplexer 60 separates the demodulated video digital data, and the digital-analog converter 64 then separates the analog video signal. Output as. When the digital-analog converter 64 converts digital data into an analog signal, data conversion is performed in accordance with the sampling clock reproduced by the sampling clock reproduction circuit 62 so as to have the same frequency as the sampling clock of the transmitter. It

[0005]

In the prior art, it is not considered enough to judge the state of the color burst of the video signal and to dynamically change the followability of the sampling clock 204 according to the judgment result. It was

That is, in a system for linearly PCM (Pulse Coded Modulation) encoding the composite video signal 200, when a beat occurs between the frequency of the color burst and the sampling clock, beat noise is mixed in the reproduced video. To prevent this beat noise,
It is necessary to synchronize the sampling clock with the color burst of the video signal. Therefore, the sampling clock and the transmission clock are independent (asynchronous).

When the sampling clock and the transmission clock are asynchronous, the reproduction of the sampling clock 204 in the receiving section is restored according to the information from the transmitting section. Therefore, the frequency difference between the transmitting and receiving units is absorbed by the buffer memory, but it is necessary to reduce the frequency difference and avoid the flow of the buffer memory. Even if such control is performed, the sampling clock generation circuit 52 is required to have characteristics having both fast tracking characteristics and slow tracking characteristics.

One of the two follow-up characteristics required for the sampling clock generation circuit 52 is that the input follow-up characteristics are fast when the color burst is in a stable state. That is, by increasing the tracking characteristic, the sampling clock that is faithful to the input signal can be reproduced, and the phase component, which is an important factor in digitizing the composite video signal, can be faithfully transmitted.

Another problem is that the input follow-up characteristic is slow when the color burst is unstable or when the video is switched. That is, when the color burst is unstable, a stable sampling clock can be generated by slowing the tracking characteristic and smoothing the clock. Further, when switching the image, even if the frequency of the color burst changes, the frequency of the sampling clock must be changed slowly.

Therefore, an object of the present invention is to provide a sampling clock generation device capable of changing the tracking characteristic of the sampling clock in accordance with the state of the color burst of the video signal.

[0011]

According to a first aspect of the invention, (a) a burst lock oscillator for generating a burst lock signal having a frequency synchronized with a color burst of a video signal in response to the video signal; A phase-locked oscillator that generates a phase-locked signal that responds to the burst-locked signal and is slower than a burst-locked signal than the burst-locked signal. A comparator for comparing signals, (d) a selector for selecting one of the burst lock signal and the phase lock signal according to the comparison result of the comparator, and (e) sampling according to the signal selected by the selector. A sampling clock generator for generating a sampling clock and a sampling clock generator.

That is, according to the first aspect of the invention, in response to the video signal, a burst lock signal having a frequency synchronized with the color burst of the video signal and a phase lock signal whose followability to the color burst is slower than the burst lock signal are generated. , Compare the burst lock signal and the phase lock signal based on the setting value for the stability of color bust,
One of the signals is selected according to the comparison result, and a sampling clock according to the selected signal is generated.

In a second aspect of the present invention, (a) a burst lock oscillator for generating a burst lock signal having a frequency synchronized with a color burst of the video signal in response to the video signal, and (b) responding to the burst lock signal. Phase lock oscillator that generates a phase lock signal whose color burst followability is slower than the burst lock signal, and (c) a comparison that compares the burst lock signal and the phase lock signal based on the setting value related to the stability of the color bust. , (D) a selector that selects one of the burst lock signal and the phase lock signal according to the comparison result of the comparator, and (e) the signal selected by the selector is multiplied to obtain the sampling clock. A sampling clock generator for generating and a sampling clock generator are provided.

That is, according to the second aspect of the invention, in response to the video signal, a burst lock signal having a frequency synchronized with the color burst of the video signal and a phase lock signal whose followability to the color burst is slower than the burst lock signal are generated. , Compare the burst lock signal and the phase lock signal based on the setting value for the stability of color bust,
One of the signals is selected according to the comparison result, and the selected signal is multiplied to generate a sampling clock.

In a third aspect of the present invention, (a) a burst lock oscillator for generating a first clock having a frequency synchronized with a color burst of the video signal in response to the video signal, and (b) responding to the first clock. The phase-locked oscillator that generates the second clock whose tracking capability with respect to the color burst is slower than the first clock, and (c) the number of clocks within a fixed period of the first clock and the A comparator for comparing the number of clocks within a fixed period of two clocks, (d) a selector for selecting one of the first clock and the second clock according to the comparison result of the comparator, and (e) A sampling clock generator for multiplying a signal selected by a selector to generate a sampling clock is provided in a sampling clock generation device.

That is, according to the third aspect of the invention, in response to the video signal, the first clock of the frequency synchronized with the color burst of the video signal and the second clock whose followability to the color burst is slower than the first clock are generated. , The number of clocks within a fixed period of the first clock and the number of clocks within a fixed period of the second clock are compared based on the setting value regarding the stability of the color bust, and one of the clocks is selected according to the comparison result. , The selected clock is multiplied to generate a sampling clock.

In a fourth aspect of the invention, (a) a burst lock oscillator for generating a first clock having a frequency synchronized with a color burst of the video signal in response to the video signal, and (b) responding to the first clock. A phase-locked oscillator that generates a second clock whose followability to a color burst is slower than that of the first clock; and (c) the number of clocks within a fixed period of the first clock and the number of clocks within a fixed period of the second clock. By comparison, when the deviation between the two is less than or equal to the set value for color burst stability, it is determined that the color burst is in a stable state, and when the deviation exceeds the set value, the color burst is in an unstable state. (D) When the comparison result that the color burst is in a stable state is received from the comparator, the first clock is selected and the color burst is output from the comparator. A selector for selecting the second clock when the received result of comparison to be in an unstable state,
(E) A sampling clock generator for multiplying the signal selected by the selector to generate a sampling clock is provided in the sampling clock generation device.

That is, according to the fourth aspect of the invention, in response to the video signal, the first clock of the frequency synchronized with the color burst of the video signal and the second clock whose followability to the color burst is slower than the first clock are generated. , The number of clocks within a certain period of the first clock and the number of clocks within a certain period of the second clock are compared, and the color burst is in a stable state when the deviation between them is less than or equal to a set value relating to the stability of the color burst. Is selected, and when the deviation exceeds the set value, it is determined that the color burst is in an unstable state, the second clock is selected, and the selected clock is multiplied to generate a sampling clock. .

In a fifth aspect of the invention, (a) a burst lock oscillator for generating a first clock having a frequency synchronized with a color burst of the video signal in response to the video signal, and (b) responding to the first clock. A phase-locked oscillator that generates a second clock whose followability to a color burst is slower than that of the first clock; and (c) the number of clocks within a fixed period of the first clock and the number of clocks within a fixed period of the second clock. By comparison, when the deviation between the two is smaller than the set value for stability of color burst several times in succession, it is determined that the color burst is in a stable state, and when the deviation exceeds the set value, the color burst becomes unstable. When the comparison result that the color burst is in the stable state is received from the comparator that determines that there is (1) comparator,
When the clock is selected and the comparison result that the color burst is in an unstable state is received from the comparator, the selector that selects the second clock and the signal selected by the (e) selector are multiplied to obtain the sampling clock. A sampling clock generator for generating and a sampling clock generator are provided.

That is, according to the fifth aspect of the invention, in response to the video signal, the first clock of the frequency synchronized with the color burst of the video signal and the second clock whose followability to the color burst is slower than the first clock are generated. , The number of clocks within a fixed period of the first clock and the number of clocks within a fixed period of the second clock are compared, and when the deviation between the two is smaller than the set value relating to the stability of the color burst, the The first clock is selected as the burst is in the stable state, and the second clock is selected as the color burst is in the unstable state when the deviation exceeds the set value, and the selected clock is multiplied to generate the sampling clock. It is characterized by doing.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to embodiments.

FIG. 1 is an overall configuration diagram of a sampling clock generation device in one embodiment of the present invention. In FIG. 1, the sampling clock generator is a burst lock oscillator 1
0, a phase-locked oscillator 12, a comparator 14, a selector 16, and a sampling clock generator 18.

The burst lock oscillator 10 generates a first clock (burst lock signal) 102 having a frequency synchronized with the color burst (fsc) of the video signal 100,
The first clock 102 is the phase-locked oscillator 12,
The data is output to the comparator 14 and the selector 16.
Then, the burst lock oscillator 10 receives the video signal 10
In order to faithfully reproduce the color burst of 0, the tracking characteristic is generally adjusted quickly. In response to the first clock 102, the phase-locked oscillator 12 generates a second clock (phase-locked signal) 104 having a tracking characteristic slower than that of the first clock, and sends the second clock 104 to the comparator 14 and the selector 16. It is designed to output. The comparator 14 counts the number of clocks within a certain period of the first clock 102 and the number of clocks within a certain period of the second clock 104, and determines whether the color burst is in a stable state based on the difference in the number of clocks. It is determined whether or not it is in a stable state, and the selection command signal 106 according to the determination result is obtained.
Is output to the selector 16.

Here, when the color burst is in a stable state, the clocks of the burst lock oscillator 10 and the phase lock oscillator 12 each have a phase difference, but the number of clocks within a fixed time is the same, and the difference in the number of clocks is It becomes almost 0. Further, when the frequency of the color burst changes at the time of switching the image, the burst lock oscillator 10 has a fast follow-up property, and therefore changes immediately after switching the image. There is a difference in the number of clocks within a fixed time between the oscillators 12. Further, when the color burst is unstable and contains jitter, the jitter input to the burst lock oscillator 10 is output as it is, but the phase lock oscillator 12 generates a clock in which the jitter is smoothed. The difference in the number of clocks itself fluctuates.

In consideration of the above, in this embodiment, when the difference in the number of clocks within a fixed time is within the set value (threshold value) ε, it is determined that the color burst is in a stable state, and the comparator 14 determines A selection command signal 106 for selecting one clock 102 is output, and when the difference in the number of clocks within a fixed time is larger than a set value ε, it is determined that the color burst is in an unstable state and the second clock 104 is selected. Is output to the selector 16.

The selector 16 selects the first clock 102 or the second clock 104 in response to the selection command signal 106 from the comparator 14 and outputs the selected clock to the sampling clock generator 18. ing. The sampling clock generator 18 is adapted to multiply the clock selected by the selector 16 to generate the required sampling clock 108.

In the above configuration, when the video signal 100 is input to the burst lock oscillator 10, the video signal 1
The first clock 102 having a frequency synchronized with the color burst of 00 is generated, and the first clock 102 is output to the phase-locked oscillator 12, the comparator 14, and the selector 16. When the first clock 102 is input to the phase-locked oscillator 12, a second clock 104 having a tracking characteristic slower than that of the first clock 102 is generated, and the first clock 102 and the second clock 104 are input to the comparator 14, respectively. . The comparator 14 counts the number of clocks in the constant cycle of the first clock 102 and the number of clocks in the constant cycle of the second clock 104, and when the difference between the two is less than or equal to a set value ε, it is considered that the color burst is in a stable state. , First
A selection command signal 106 for selecting the clock 102 is output, and when the difference in the number of clocks exceeds the set value ε, it is considered that the color burst is in an unstable state, and the selection command signal 106 for selecting the second clock 104 is output. Is output to the selector 16. That is, in the selector 16, when the color burst is in a stable state,
The clock 102 is selected, and conversely, when the color burst is in an unstable state or when the video is switched, the second clock 104 for slowing the tracking characteristic is selected. When the clock selected by the selector 16 is input to the sampling clock generator 18, the sampling clock 108 is generated by multiplying the selected clock.

As described above, according to the present embodiment, it is possible to determine the state of the color burst of the video signal 100 and dynamically change the followability of the sampling clock 108 according to the determination result. That is, the tracking characteristic can be made faster when the color burst 100 is stable, and can be made slower when the color burst is in an unstable state or when the image is switched.

Further, in the embodiment, when the color burst includes jitter, the difference in the number of clocks of the comparator 14 may fluctuate, and the difference in the number of clocks may become smaller than the set value ε. And set value ε multiple times
If it is not judged to be stable when it does not become smaller, it is possible to suppress the error due to the fluctuation of the clock number difference.

Further, in the embodiment, if the characteristics of the phase-locked oscillator 12, the comparator 14 and the selector 16 are changed, and a plurality of these are provided,
Finer control is possible.

[0031]

As described above, according to the first aspect of the present invention, the burst lock signal having the frequency synchronized with the color burst of the video signal in response to the video signal and the followability to the color burst are better than those of the burst lock signal. Also generates a slow phase lock signal, compares the burst lock signal with the phase lock signal based on the setting value related to color bust stability, and determines the color burst state. Since the phase-locked signal is selected and the sampling clock is generated from the selected signal, the followability of the sampling clock can be dynamically changed according to the state of the color burst.

According to the second aspect of the invention, a burst lock signal having a frequency synchronized with the color burst of the video signal in response to the video signal and a phase lock signal having a followability with respect to the color burst slower than the burst lock signal are generated. Generate and determine the color burst state by comparing the burst lock signal and the phase lock signal based on the setting value related to color bust stability, and select the burst lock signal or phase lock signal according to the result of this determination. Since the sampling clock is generated by multiplying the selected signal, it is possible to dynamically change the followability of the sampling clock according to the state of the color burst.

According to the third aspect of the invention, in response to the video signal, the first clock having a frequency synchronized with the color burst of the video signal and the second clock having a followability to the color burst which is slower than the first clock are generated. Then, the number of clocks in the constant cycle of the first clock and the number of clocks in the constant cycle of the second clock are compared based on the setting value regarding the stability of the color bust, and one of the clocks is selected according to the comparison result. However, since the sampling clock is generated by multiplying the selected clock, the tracking characteristic can be increased to generate a sampling clock that is faithful to the video signal when the color burst of the video signal is stable. When the burst is unstable or when the video is switched, the tracking characteristic is delayed to smooth the sampling clock and reduce the sampling frequency difference. It is possible.

According to the fourth aspect of the invention, in response to the video signal, the first clock of the frequency synchronized with the color burst of the video signal and the second clock whose followability to the color burst is slower than the first clock are generated. Then, the number of clocks within the fixed period of the first clock and the number of clocks within the fixed period of the second clock are compared, and when the deviation between the two is less than or equal to the set value for the stability of the color burst, the color burst becomes stable. Since the first clock is selected as a certain value, the second clock is selected as the color burst is in an unstable state when the deviation exceeds the set value, and the selected clock is multiplied to generate the sampling clock. When the color burst of the video signal is stable, the tracking characteristic can be increased to generate a sampling clock that is faithful to the video signal. The time of switching or video when the burst is unstable and slow tracking performance, it is possible to reduce the sampling frequency difference as well as smooth the sampling clock.

According to the fifth aspect of the invention, in response to the video signal, the first clock of the frequency synchronized with the color burst of the video signal and the second clock whose followability to the color burst is slower than the first clock are generated. Then, the number of clocks within the fixed period of the first clock and the number of clocks within the fixed period of the second clock are compared, and when the deviation between the two is smaller than the set value for the stability of the color burst consecutively a plurality of times. The first clock is selected as the color burst is in the stable state, and the second clock is selected as the color burst is in the unstable state when the deviation exceeds the set value.
Since the sampling clock is generated by multiplying the selected clock, when the color burst of the video signal is stable, the tracking characteristic can be increased to generate a sampling clock that is faithful to the video signal and The tracking characteristic can be delayed when the image is unstable or when the video is switched to smooth the sampling clock and reduce the sampling frequency difference. Further, it is possible to suppress an error caused by the variation of the clock number difference.

[Brief description of drawings]

FIG. 1 is a block configuration diagram of a sampling clock generation device according to an embodiment of the present invention.

FIG. 2 is a system configuration diagram of a conventional digital video transmission device.

FIG. 3 is a block configuration diagram of a conventional sampling clock generation circuit.

[Explanation of symbols]

 10 Burst Lock Oscillator 12 Phase Lock Oscillator 14 Comparator 16 Selector 18 Sampling Clock Generator

Claims (5)

[Claims] 1. A burst lock oscillator for generating a burst lock signal having a frequency synchronized with a color burst of the video signal in response to the video signal, and the burst lock signal having a followability for the color burst in response to the burst lock signal. A phase lock oscillator that generates a slower phase lock signal, a comparator that compares the burst lock signal and the phase lock signal based on a setting value related to the stability of the color bust, the burst lock signal and the phase A selector for selecting one of the lock signals according to a comparison result of the comparator; and a sampling clock generator for generating a sampling clock according to the signal selected by the selector. Sampling clock generator. 2. A burst lock oscillator for generating a burst lock signal having a frequency synchronized with a color burst of the video signal in response to the video signal, and the burst lock signal having followability for the color burst in response to the burst lock signal. A phase lock oscillator that generates a slower phase lock signal, a comparator that compares the burst lock signal and the phase lock signal based on a setting value related to the stability of the color bust, the burst lock signal and the phase A selector for selecting one of the lock signals according to a comparison result of the comparator; and a sampling clock generator for multiplying the signal selected by the selector to generate a sampling clock. A sampling clock generator characterized in that. 3. A burst lock oscillator for generating a first clock having a frequency in synchronization with a color burst of a video signal in response to the video signal, and tracking the color burst in response to the first clock. A phase-locked oscillator that generates a slower second clock, and a number of clocks in the constant cycle of the first clock and a number of clocks in the constant cycle of the second clock based on the setting value relating to the stability of the color burst. A selector for selecting one of the first clock and the second clock according to the comparison result of the comparator, and a signal obtained by multiplying the signal selected by the selector for sampling. And a sampling clock generator that generates a clock. 4. A burst lock oscillator for generating a first clock having a frequency in synchronization with a color burst of a video signal in response to the video signal, and the followability to the color burst in response to the first clock is the first clock. A phase-locked oscillator that generates a second clock that is slower than the second clock, the number of clocks within a fixed period of the first clock, and the second clock
When the deviation between the two is less than or equal to a set value related to the stability of the color burst, it is determined that the color burst is in a stable state, and the deviation exceeds the set value. Sometimes the comparator determines that the color burst is in an unstable state, and selects the first clock when receiving the comparison result that the color burst is in the stable state, and selects the first clock from the comparator. A selector for selecting the second clock when receiving a comparison result indicating that the color burst is in an unstable state; and a sampling clock generator for multiplying a signal selected by the selector to generate a sampling clock. A sampling clock generation device comprising: 5. A burst lock oscillator for generating a first clock having a frequency synchronized with a color burst of a video signal in response to the video signal, and a followability for the color burst in response to the first clock, the first clock. A phase-locked oscillator that generates a second clock that is slower than the second clock, the number of clocks within a fixed period of the first clock, and the second clock
By comparing the number of clocks within a certain period of the clock, when the deviation between the two is smaller than the set value relating to the stability of the color burst a plurality of times consecutively, it is determined that the color burst is in a stable state, and the deviation is A comparator that determines that the color burst is in an unstable state when the set value is exceeded, and selects the first clock when the comparison result that the color burst is in the stable state is received from the comparator. Then, when a comparison result indicating that the color burst is in an unstable state is received from the comparator, a selector that selects the second clock and a signal that is selected by the selector are multiplied to generate a sampling clock. A sampling clock generator, comprising: a sampling clock generator.