JPH08295533A - Dielectric material, multilayer printed circuit board using the material and semiconductor device housing package - Google Patents

Abstract

PURPOSE: To produce a high-permittivity glass ceramic, a multilayer printed circuit board provided with a capacitor part formed by holding the ceramic between electrode layers and a semiconductor package by incorporating TiO2 and filler into borosilicate glass. CONSTITUTION: This dielectric material consists of 30-70vol.% borosilicate glass, 10-70vol.% TiO2 and 0-60vol.% filler and has >=9 dilectric constant. A capacitor part holding the high dielectric constant material layer between a couple of electodes is laminated in or on the surface of an insulating board consisting of glass ceramic to obtain a semiconductor device housing package. A filler of alumina, etc., is added to the mixture to form a sheet, and the sheet is laminated to obtain an insulating layer forming body. A sheet having 0.02-0.07mm thickness is formed from a mixed powder of TiO2 and borosilicate by the well- known method, a circuit pattern is formed on the sheets with a Cu paste, and the sheets are pressed, adhered together and calcined to produce the package including the high permittivity layer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dielectric material, a multilayer wiring board, and a package for accommodating a semiconductor element, and in particular, a dielectric material made of glass ceramics,
The present invention also relates to a multilayer wiring board having a high-dielectric layer made of this dielectric material, and a package for housing a semiconductor element.

[0002]

2. Description of the Related Art Conventionally, an insulating substrate such as a multilayer wiring board on which a semiconductor element, particularly a semiconductor integrated circuit element made of silicon is mounted, is generally made of alumina ceramics or the like which is excellent in electric insulation and heat resistance and has high strength. An electrically insulating material is used, and a metallized metal layer made of a refractory metal such as molybdenum (Mo) or tungsten (W) is thickly printed on a substrate made of alumina ceramics or the like to form an electric wiring circuit. Was multilayered and integrally fired to obtain a multilayer ceramic wiring board.

However, such a wiring board made of alumina has a relative dielectric constant of 9 to 10 (room temperature, 1 MH).
z), and since the delay time of high frequency propagation is proportional to the square root of the dielectric constant, the propagation speed of the signal transmitted through the metallized metal layer provided on the insulating substrate is slow, and the dielectric constant is higher for high speed propagation of the signal. There has been a demand for low insulating substrates.

In response to such a demand, an insulating substrate made of glass ceramics has been used in recent years. Since this glass ceramics has a low dielectric constant of about 4 to 5, the propagation speed of signals can be increased.

On the other hand, in the package for housing the semiconductor element,
Since a semiconductor IC (integrated circuit) is apt to malfunction due to external noise or unnecessary radiation, in recent years, a ceramic capacitor having a capacity of about 30 to 100 μF is inserted between the power supply side and the ground side to reduce noise. To prevent malfunctions. In the past, this capacitor was connected externally in addition to the package.

[0006]

However, conventionally, as described above, the ceramic capacitor for preventing the malfunction of the semiconductor IC due to the external noise and the unnecessary radiation is externally mounted separately from the substrate and the package. Therefore, it has not been possible to improve the mounting density of the substrate and the package.

Although it is possible to form a capacitor layer in a substrate or a package made of glass ceramics, since glass ceramics generally have a low dielectric constant of about 4 to 5, if the glass ceramic itself constitutes the dielectric. In order to obtain a large capacitance, it is necessary to increase the area of the dielectric and to form a plurality of dielectric layers sandwiched by the electrodes. Therefore, there have been problems that the package and the board are increased in size and the cost is increased.

Up to now, Japanese Unexamined Patent Publication (Kokai) No. 4-83737 discloses a dielectric ceramic composition obtained by adding TiO ₂ to cordierite glass, but a dense sintered body is obtained at 1000 ° C. or lower. Therefore, the amount of TiO ₂ added is 30% by weight.
However, there is a problem that only a dielectric ceramic composition having a dielectric constant of 9 or less can be obtained.

[0009]

DISCLOSURE OF THE INVENTION The inventors of the present invention have made investigations on such problems, and as a result, by incorporating a certain amount of TiO ₂ into borosilicate glass, glass ceramics having a high dielectric constant can be obtained. In addition, the capacitor portion in which the high-dielectric layer made of glass ceramics is sandwiched between the electrodes is laminated on the surface of a multilayer wiring board or a package for storing semiconductor elements using glass ceramics as an insulating substrate. Alternatively, it has been found out that malfunction can be prevented in the semiconductor IC due to external noise or unnecessary radiation by incorporating it, and the present invention has been completed.

That is, the dielectric material of the present invention is 30-70.
Borosilicate glass of 10% by volume and T of 10% to 70% by volume
It is a dielectric material having a dielectric constant of 9 or more obtained by sintering a mixture of iO ₂ and 0 to 60% by volume of a filler.

Further, the multilayer wiring board of the present invention is a multilayer wiring board in which a capacitor portion having a high dielectric layer sandwiched by a pair of electrode layers is provided inside or on the surface of an insulating substrate made of glass ceramics. , The high dielectric layer,
30-70% by volume borosilicate glass and 10% by volume-70
It is characterized in that it is made of a dielectric material having a dielectric constant of 9 or more obtained by sintering a mixture of TiO ₂ of volume% and filler of 0 to 60 volume%.

Further, in the package for accommodating a semiconductor element of the present invention, a capacitor portion having a high dielectric layer sandwiched by a pair of electrode layers is disposed inside or on the surface of an insulating substrate made of glass ceramics, and a semiconductor element is provided. A package for storing a semiconductor device having a housing part of, wherein the high dielectric layer comprises 30 to 70% by volume of borosilicate glass, 10% to 70% by volume of TiO ₂ , and 0 to 60% by volume. It is characterized by being made of a dielectric material having a dielectric constant of 9 or more obtained by sintering a mixture of fillers.

[0013]

In the dielectric material of the present invention, borosilicate glass and T
By including iO ₂ or a filler component therein, the dielectric constant of the glass-ceramic sintered body can be significantly improved, and this can be used as the dielectric body of the capacitor. This is a high dielectric constant T
It is considered that this is because iO ₂ is dispersed in the material without reacting with glass.

In particular, since this dielectric material is composed of a glass-ceramic material, it can be laminated on the surface or inside of an insulating substrate made of glass ceramics. Thus, in the production of a multilayer wiring board and a package for housing a semiconductor element using glass ceramics as an insulating substrate, the dielectric material sandwiched by a pair of electrodes is laminated on the surface or inside of the glass-ceramic insulating substrate. By the simultaneous firing, it is possible to manufacture a multilayer wiring board having a capacitor portion and a package for housing a semiconductor element.

As a result, it becomes possible to provide such a capacitor portion in a multilayer wiring board and a package for storing semiconductor elements, which use glass ceramics as an insulating substrate, and the semiconductor IC (integrated circuit) is affected by external noise and unnecessary radiation. It is possible to prevent a malfunction.

The present invention will be described below with reference to the following examples.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be specifically described below with reference to the drawings. (Structure of Multilayer Wiring Board) FIG. 1 is a diagram showing an example of the multilayer wiring board according to the present invention. According to FIG. 1, in the insulating layer 2 in the wiring board 1, the capacitor portion 6 including the high dielectric layer 3 and the pair of electrode layers 4 and 5 is internally laminated. A wiring layer 7 is provided on the surface or inside of the insulating layer 2. Further, in the configuration of FIG. 1, the electrode layer 4
And 5 are led out to the substrate surface through through holes 8 and 9.

Further, in the multilayer wiring board of the present invention, in addition to the capacitor section 6 being sandwiched between the insulating layers 2 as in the embodiment of FIG. 1, for example, as shown in FIG. The electrode layer 5, the high dielectric layer 3 and the electrode layer 4 can be laminated on the outermost surface of the formed insulating layer 2. in this case,
The capacitor portion 6 may have a protective film formed of resin or the like on its surface so as not to come into contact with the outside air.

(Structure of Package for Housing Semiconductor Element) FIG. 2 is a diagram showing an example of a package for housing a semiconductor element according to the present invention. According to FIG. 2, a plurality of insulating layers 11 are laminated on the substrate of the semiconductor element housing package 10, and a wiring layer 12 is provided inside or on the surface of the insulating layer 11. Further, inside the insulating substrate, a capacitor section 16 is formed by the high dielectric layer 13 and a pair of electrode layers 14 and 15 sandwiching the high dielectric layer 13. Further, a concave portion (accommodation portion) 18 for accommodating the semiconductor element 17 is formed on the upper surface of the insulating substrate, and the accommodating portion 18 is sealed by a lid 19. In addition, the electrode layer 15 of the capacitor section 16 is
It is connected to the wiring layer through the through hole 20.
Further, in the configuration of FIG. 2, the electrode layer 1 of the capacitor section 16 is
4 is exposed to the storage portion 18 to form a bottom surface of the storage portion, and the semiconductor element 17 is mounted on the bottom surface. The wiring layer 12 is electrically connected to the external terminal 21 through a through hole or the like.

There are various types of semiconductor device housing packages as shown in FIGS. FIG.
In the package, the high dielectric layer 13 and the electrode layers 14 and 15 are alternately laminated in multiple layers below the semiconductor element 17, and these electrode layers 14 and 15 are connected to the semiconductor element 17 through the through holes 20. It is a thing.

The package shown in FIG. 5 has a structure in which the capacitor portion 6 in which the electrode layers 14 and 15 are formed above and below the high dielectric layer 13 is sandwiched by the insulating layers 11, and the electrode layers 14 and 1 are formed.
Reference numeral 5 is connected to the semiconductor element 17 through a through hole 20.

In the package of FIG. 6, electrode layers 14 and 15 are formed below the semiconductor element 17 and above and below the high dielectric layer 13, and these electrode layers 14 and 15 are formed by through holes 20 to form the semiconductor element. 17 and the pins 21 are fixed to the lower surface, and these pins 21 are connected to the electrode layer 1
It is connected to the semiconductor element 17 through a through hole 22 formed by passing through Nos. 4 and 15 and the high dielectric layer 13.

In the package shown in FIG. 7, the high dielectric layer 13 and the electrode layers 14 and 15 are alternately laminated to form the capacitor section 6, and the electrode layers 14 and 15 are connected to the semiconductor element 17 through the through holes 20. Further, the semiconductor element 17 is fixed to the heat sink 23.

The package of FIG. 8 is a flat package in which high dielectric layers 13 and electrode layers 14 and 15 are alternately laminated in multiple layers, and these electrode layers 13 and 14 are connected to semiconductor element 17 by through holes 20. It is connected.

(High Dielectric Layer) In the wiring board and the semiconductor element accommodating package of the present invention, the high dielectric layer (number 3 in FIG. 1 and number 13 in FIG. 2) forming the capacitor portion is 30 to 70. 10% by volume borosilicate glass
It is formed by sintering a mixture of TiO _{2 in an} amount of 70% by volume and a filler in an amount of 0 to 60% by volume. Here, or TiO ₂ amount is less than 10 vol%, or when the borosilicate glass content exceeds 70% by volume is because the relative effect of the dielectric constant improvement of small dielectric constant of 9 or more is not achieved, TiO ₂ amount Is more than 70% by volume or the amount of borosilicate glass is less than 30% by volume, a dense sintered body cannot be obtained at 1100 ° C. or less. In addition to borosilicate glass and TiO ₂ , a filler made of another metal oxide may be added at a ratio of 60% by volume or less. When the content of this filler exceeds 60% by volume, the relative dielectric constant is 9
This is because the above is difficult to achieve. Borosilicate glass is 40 to 70% by volume, and TiO ₂
Is preferably 30 to 60% by volume.

As the borosilicate glass, SiO ₂ is 72 to 77% by weight, B ₂ O ₃ is 15 to 18% by weight, and Al is
₂ to 5% by weight of O ₃ , 1.5% by weight or less of MgO, N
at least one of a ₂ O, K ₂ O, and Li ₂ O is 2 to
It is desirable to contain 3% by weight. Borosilicate glass having such a composition has a softening point of 780 to 820 ° C.,
The binder removal property during firing can be improved.

(Electrode Layer) On the other hand, a pair of electrode layers for sandwiching the dielectric layer to form the capacitor section can be composed of a publicly known metallized layer, and a material that can be co-fired with the dielectric layer and the insulating layer. It is desirable that
Gold, silver, copper, copper-tungsten, and Ni are mentioned, and of these, copper is the best. Such an electrode layer is approximately 3 to
It is formed with a thickness of 15 μm. In the package for storing a semiconductor, one pair of the electrode layers may be used as a decoupling capacitor by electrically connecting one side to a semiconductor element by using one side as a power supply layer and the other side as a ground layer.

(Insulating Layer) As the insulating layer constituting the insulating substrate, for example, borosilicate glass as described above,
A filler made of at least one of Al ₂ O ₃ , quartz, cordierite and mullite is used,
For example, it is optimal that the borosilicate glass is 30 to 70% by volume and the filler is 30 to 70% by volume. According to the constitution of the present invention, it is desirable that borosilicate glass constituting the insulating layer contains TiO ₂ . This is TiO
_This is to prevent the diffusion of ₂ . The borosilicate glass of the insulating layer in that case is 72 to 76 wt% SiO ₂ , 15 to 17 wt% B ₂ O ₃ , 2 to 4 wt% Al ₂ O ₃ , and 1.5 wt% or less MgO. 1.1-1.4 wt% TiO ₂ ,
The total amount of Na ₂ O, K ₂ O and Li ₂ O is 2.0 to 3.
It is preferably a borosilicate glass consisting of 0% by weight.

(Wiring layer) Since the wiring layer disposed in the insulating layer can be fired at the same time as the glass-ceramics constituting the insulating layer, gold, silver, copper, copper-tungsten, Ni. It is preferable to be composed of one kind of metal selected from the above, and among these, copper is particularly preferable. This wiring layer is generally formed with a thickness of about 3 to 50 μm between the insulating layers or on the surface thereof, but when high output is required, the thickness thereof may reach several mm.

(Manufacturing Method) The multilayer wiring board and the semiconductor element housing package according to the present invention are manufactured, for example, as follows. First, in producing an insulating layer molded body, for example, the composition of the raw material powder is 72 to 76 in weight ratio.
Wt% SiO ₂ , 15-17 wt% B ₂ O ₃ , 2
4% by weight of Al ₂ O ₃ , 1.5% by weight or less of MgO,
1.1-1.4 wt% of TiO _2, Na ₂ O, the total amount of K ₂ O and Li ₂ O is a borosilicate glass powder 10-90% by volume consisting of 2.0 to 3.0 wt%, Alumina (Al ₂
O ₃ ), quartz (SiO ₂ ), cordierite (2MgO)
.2Al ₂ O ₃ .5SiO ₂ ) and at least one filler component of mullite are added and mixed in a proportion of 10 to 90% by volume, and the mixed powder is wet mixed using a ball mill using methanol and toluene as solvents. Then, a known sheet forming binder is added to form a sheet. A plurality of such green sheets are laminated to produce an insulating layer molded body.

Next, in forming the high dielectric layer, 10% by volume to 70% by volume of TiO ₂ powder having a particle diameter of 5 μm or less is formed.
And SiO ₂ is 72 to 77% by weight and B ₂ O ₃ is 15 to 1
8% by weight, ₂ to 5% by weight of Al ₂ O ₃ , 1.5% of MgO
Borosilicate glass containing 1% by weight or less, and at least one of Na ₂ O, K ₂ O, and Li ₂ O in a proportion of 2 to 3% by weight.
A mixed powder consisting of 0 to 70% by volume is prepared. To this mixed powder, for example, a binder such as butyral or acrylic is added, and a solvent such as toluene is further added and mixed,
A thickness of 0.02 by a known method such as a doctor blade method
A sheet is formed into 0.07 mm to prepare a high dielectric layer molded body.

Then, a wiring pattern is printed on this insulating layer molded body by a screen printing method using Cu paste composed of Cu powder, an acrylic resin and a solvent, and further, a high dielectric layer molded body and an insulating layer molded body. A through hole is formed in the substrate and the same Cu paste as described above is filled.

Further, on the upper and lower surfaces of the high dielectric layer molded body,
90-100 for gold, silver, copper, copper-tungsten, Ni, etc.
% By weight, and optionally 0 to 10% by weight of Al ₂ O ₃ , SiO ₂ , mullite, cordierite and its compounds.
The electrode layer paste containing the additive is applied.

Then, the high dielectric layer molded body coated with the electrode layer paste is interposed between the insulating layer molded bodies, or the high dielectric material molded body in which the electrode paste is coated on the surface of the insulating layer molded body. The bodies are arranged in a stack and pressed at a predetermined pressure to be pressure bonded.

After that, in a humidified nitrogen gas,
By normally firing at 1100 ° C. for 1 to 2 hours, it is possible to obtain a multilayer wiring board and a package for housing a semiconductor element in which a capacitor portion in which a high dielectric layer is sandwiched between a pair of electrode layers is arranged between insulating layers. At this time, it is desirable that the high dielectric layer has a thickness of 15 to 55 μm and the electrode layer has a thickness of 2 to 15 μm.

The high dielectric layer molded body may be constructed by preparing a plurality of the above-mentioned sheets and alternately laminating these sheets and electrode layers. In such a case, the capacitance can be improved.

The capacitor portion may be formed by alternately stacking high dielectric layers and electrode layers, and a high capacitance can be obtained by such a laminated structure.

In the case of manufacturing a semiconductor housing package, an insulating layer is formed to form a recess 18 for housing the semiconductor element in FIG. 2 based on a well-known method in addition to the above-mentioned method for manufacturing a multilayer wiring board. After laminating and pressure bonding, the wiring board is manufactured by co-firing, and then a separately manufactured lid body is sealed with Au-Sn solder, solder, low melting point glass, welding (seam weld) so as to seal the concave portion of the wiring board. ) Etc., it can be obtained by adhering to the insulating substrate.

The present invention will be specifically described below with reference to the following examples. Example As raw material powders, borosilicate glass having a particle size of 3 μm and TiO ₂
Powder, filler (eg, alumina, silica, mullite, etc.) are mixed in the proportions shown in Table 1, sufficiently dispersed and mixed, a known binder is added thereto, and toluene and alcohol are further added and mixed, followed by doctor blade method. To obtain a high dielectric layer molded body. Borosilicate glass contains 75% by weight of SiO ₂ , 16% by weight of B ₂ O ₃ , and A
5% by weight of 1 ₂ O ₃ , 1% by weight of MgO, 1% of Na ₂ O
A glass composed of 1% by weight of K ₂ O and 1% by weight of Li ₂ O was used.

On the other hand, borosilicate glass powder (SiO ₂ 75 wt%, B ₂ O ₃ 16 wt%, Al ₂ O ₃ 4 wt%, MgO
1% by weight, TiO ₂ 1% by weight, Na ₂ O 1% by weight, K ₂
O1 wt%, was added a 60 vol% Li ₂ O1% by weight), and the alumina 40% by volume as a filler, a binder, was further added and mixed toluene and alcohol, a sheet by a doctor blade method, an insulating layer formed Make a body.

Then, through holes are formed in the insulating layer molded body and the high dielectric layer molded body, and Cu paste is filled therein. After that, metal Cu is formed on the upper and lower surfaces of the high dielectric layer molded body.
Then, an electrode layer paste containing 2% by weight of alumina and 3% by weight of borosilicate glass with respect to this metal was screen-printed to form an electrode layer having a thickness of about 8 μm.

Then, the high dielectric layer molded body coated with the electrode layer paste is interposed between the insulating layer molded bodies. Then, it was normally fired at 850 to 1100 ° C. for 2 hours in a mixed gas of nitrogen and hydrogen (reducing atmosphere) to obtain a multilayer wiring board of the present invention.

The amount of TiO _{2 and the} amount of borosilicate glass and filler of the high dielectric layer molded body were changed, and the capacitance of the substrate obtained as described above was measured. The results are shown in Table 1. Indicated. The dielectric constant of the high dielectric layer was also measured.

In this experiment, the electrode shape was 25 mm × 2.
The thickness of the high dielectric layer is 5 to 6 μm and the thickness of the high dielectric layer is 25 to 50 μm.
m. In addition, the capacitance is measured by the LCR meter (Y.H.P.
4284A), 100 KHz, 1.0 Vr
It was measured at 25 ° C. under the condition of m.

[0045]

[Table 1]

From Table 1, borosilicate glass is 30 to 70% by volume, TiO ₂ is 30 to 70% by volume, and other fillers are 0 to 70% by volume.
A dielectric constant of 9 or more could be achieved by controlling in the range of 60% by volume. However, the samples Nos. 1, 2, and 3 having a glass amount of more than 70% by weight had a low dielectric constant, and the samples No. 20, 21, and 22 containing no TiO ₂ could not achieve a dielectric constant of 9 or more. In Table 1, samples No. 1, 2, 3,
FIG. 9 shows the relationship between the amount of TiO ₂ and the dielectric constant for 4, 6, 7, 11, and 14.

[0047]

As described in detail above, in the multilayer wiring board and the package for accommodating semiconductor elements of the present invention, the dielectric constant as glass ceramics is improved by adding TiO ₂ to the borosilicate glass at a predetermined ratio. Can be increased. Moreover, when this dielectric material is used as a dielectric for a multilayer wiring board using glass ceramics as an insulating substrate or a capacitor portion in a semiconductor element housing package, it can be co-fired together with the insulating layer and the wiring layer. As a result, in a multilayer wiring board and a package for housing a semiconductor element in which glass ceramics is used as an insulating substrate,
It becomes possible to have such a capacitor section,
It is possible to prevent the semiconductor IC (integrated circuit) from malfunctioning due to external noise or unnecessary radiation.

[Brief description of drawings]

FIG. 1 is a vertical sectional view showing an embodiment of a multilayer wiring board of the present invention.

FIG. 2 is a vertical cross-sectional view showing an example of a semiconductor element housing package of the present invention.

FIG. 3 is a vertical sectional view showing another embodiment of the multilayer wiring board of the present invention.

FIG. 4 is a vertical cross-sectional view showing another example of the semiconductor element storage package of the present invention.

FIG. 5 is a vertical cross-sectional view showing still another embodiment of the semiconductor element housing package of the present invention.

FIG. 6 is a vertical sectional view showing still another embodiment of the package for housing a semiconductor element of the present invention.

FIG. 7 is a vertical sectional view showing still another embodiment of the semiconductor element storage package of the present invention.

FIG. 8 is a vertical cross-sectional view showing still another embodiment of the semiconductor element housing package of the present invention.

FIG. 9 is a diagram showing the relationship between the amount of TiO ₂ and the dielectric constant of the dielectric material in the present invention.

[Explanation of symbols]

 1 Multilayer Wiring Board 2, 11 Insulating Layer 3, 13 High Dielectric Layer 4, 5, 14, 15 Electrode Layer 6, 16 Capacitor Section 7, 12 Wiring Layer 8, 9, 20, 22 Through Hole 10 Semiconductor Device Storage Package 18 recessed part (storage part) 19 lid 21 external terminal 23 heat sink

Claims (3)

[Claims] 1. A borosilicate glass of 30 to 70% by volume and 10
A dielectric material having a dielectric constant of 9 or more, which comprises TiO _{2 in a} volume of 70 vol% and a filler in a volume of 0 to 60 vol. 2. A pair of high dielectric layers are provided inside or on the surface of an insulating layer made of glass-ceramic containing a glass component and a filler component or on a ceramic insulating substrate having a metallized wiring layer disposed between the insulating layers. In a multilayer wiring board in which a capacitor portion sandwiched by electrodes is laminated and arranged, the high dielectric layer comprises 30 to 70% by volume of borosilicate glass, 10% to 70% by volume of TiO ₂ , and 0 to 6
A multilayer wiring board comprising a dielectric material having a dielectric constant of 9 or more, which is composed of 0% by volume of a filler. 3. A ceramic insulating substrate in which a metallized wiring layer is provided on the surface of an insulating layer made of glass-ceramics containing a glass component and a filler component or between insulating layers, and which has an accommodating portion for accommodating a semiconductor element, or In a package for storing a semiconductor element, in which a capacitor part formed by sandwiching a high dielectric layer between a pair of electrodes is laminated on the surface, the high dielectric layer comprises 30 to 70% by volume of borosilicate glass and 10 Volume% to 70 volume% TiO ₂ ,
A package for housing a semiconductor element, which is made of a dielectric material having a dielectric constant of 9 or more and made of a filler of 0 to 60% by volume.