JPH08288507A - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof

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Publication number
JPH08288507A
JPH08288507A JP9530195A JP9530195A JPH08288507A JP H08288507 A JPH08288507 A JP H08288507A JP 9530195 A JP9530195 A JP 9530195A JP 9530195 A JP9530195 A JP 9530195A JP H08288507 A JPH08288507 A JP H08288507A
Authority
JP
Japan
Prior art keywords
oxide film
film
thin film
silicon
aluminum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9530195A
Other languages
Japanese (ja)
Other versions
JP2792461B2 (en
Inventor
Mikio Tsuji
幹生 辻
Yoshitoku Muramatsu
良徳 村松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP7095301A priority Critical patent/JP2792461B2/en
Publication of JPH08288507A publication Critical patent/JPH08288507A/en
Application granted granted Critical
Publication of JP2792461B2 publication Critical patent/JP2792461B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE: To suppress the deterioration in the withstand voltage characteristics of a thin gate oxide film by forming an Al oxide thin film on the surface of a silicon oxide film by wet processing step after the formation of the silicon oxide film. CONSTITUTION: A field oxide film as an element separating region 12 is selectively formed by selective oxidizing step on a silicon substrate 10 so as to form a gate silicon oxide film 13 on the main surface of the element separating region 12 sectioned by this region 12. Next, this silicon substrate 10 is immersed in alkalic solution containing Al of 0.1-10000ppb. Thus, an Al side thin film 14 is formed on the surface of the silicon oxide film 13. Next, an electrode 15 is formed on this Al oxide thin film 14. Through these procedures, the stabilization and the reliability upon the device characteristics can be enhanced by making the gate oxide film dual structured of the silicon oxide film 13 and the oxide thin film 14.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体装置の製造方法お
よび半導体装置に係わり、特に信頼性の高いゲート酸化
膜を形成する半導体装置を製造方法およびこのゲート酸
化膜を有する半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device and a semiconductor device, and more particularly to a method of manufacturing a semiconductor device having a highly reliable gate oxide film and a semiconductor device having the gate oxide film.

【0002】[0002]

【従来の技術】従来のゲート酸化膜を有する半導体装置
は図5に示すように、シリコン基板20に素子分離領域
22が選択酸化法により選択的に形成され、この素子分
離領域22により区画された素子領域21の主面上に、
熱酸化法、急速熱酸化法あるいは化学的気相成長法等に
よりゲート酸化膜23を形成し(図5(A))、ウエハ
洗浄(例えばRCA洗浄;SC1→SC2)工程を経た
後に、ゲート酸化膜23上に、スパッタ法、蒸着法ある
いは化学的気相成長法等によりアルミニウム、多結晶シ
リコンもしくは金属シリサイドにより電極25の形成を
行っていた(図5(B))。
2. Description of the Related Art In a conventional semiconductor device having a gate oxide film, as shown in FIG. 5, an element isolation region 22 is selectively formed on a silicon substrate 20 by a selective oxidation method and partitioned by the element isolation region 22. On the main surface of the element region 21,
The gate oxide film 23 is formed by a thermal oxidation method, a rapid thermal oxidation method, a chemical vapor deposition method, or the like (FIG. 5A), and after the wafer cleaning (for example, RCA cleaning; SC1 → SC2) step, the gate oxidation is performed. The electrode 25 was formed on the film 23 by aluminum, polycrystalline silicon, or metal silicide by a sputtering method, a vapor deposition method, a chemical vapor deposition method, or the like (FIG. 5B).

【0003】[0003]

【発明が解決しようとする課題】上述した従来の構造の
ゲート酸化膜においてはゲート酸化膜の薄膜化に伴い信
頼性が劣化するという問題があった。すなわち半導体デ
バイスの集積度の向上に伴い、要求されるゲート酸化膜
の膜厚はますます薄くなりその物理的限界に近づきつつ
ある。特に酸化膜厚が10nm以下の領域になるとトン
ネル電流の影響が大きくなり、酸化膜本来の特性が得ら
れなくなる。また、従来の酸化膜単層構造では酸化膜中
のウィークスポットの存在により、酸化膜の特性が著し
く劣化するという問題があった。即ち、耐圧特性が著し
く劣化し、初期不良が多発したり、長期信頼性が著しく
損なわれるという問題があった。
The gate oxide film having the above-mentioned conventional structure has a problem that reliability is deteriorated as the gate oxide film is made thinner. That is, as the degree of integration of semiconductor devices is improved, the required film thickness of the gate oxide film is becoming thinner and closer to its physical limit. In particular, when the oxide film thickness is in the region of 10 nm or less, the influence of the tunnel current becomes large, and the original characteristics of the oxide film cannot be obtained. Further, the conventional oxide film single layer structure has a problem that the presence of weak spots in the oxide film significantly deteriorates the characteristics of the oxide film. That is, there is a problem that the withstand voltage characteristic is significantly deteriorated, initial defects frequently occur, and long-term reliability is significantly impaired.

【0004】したがって本発明の目的は、シリコン酸化
膜、特に薄いゲート酸化膜の耐圧特性の劣化を抑制した
半導体装置の製造方法およびそれによる半導体装置を提
供することである。
Therefore, an object of the present invention is to provide a method of manufacturing a semiconductor device in which the breakdown voltage characteristics of a silicon oxide film, especially a thin gate oxide film, are suppressed, and a semiconductor device therefor.

【0005】[0005]

【課題を解決するための手段】本発明の特徴は、シリコ
ン酸化膜、特にゲート絶縁膜となるシリコン酸化膜を形
成した後、ウエット処理、好ましくは0.1〜1000
0ppbのアルミニウムを含有したアルカリ性溶液に浸
漬する処理により前記シリコン酸化膜の表面上にアルミ
酸化物の薄膜を形成する半導体装置の製造方法にある。
A feature of the present invention is that after forming a silicon oxide film, particularly a silicon oxide film to be a gate insulating film, a wet treatment is performed, preferably 0.1 to 1000.
It is a method of manufacturing a semiconductor device in which a thin film of aluminum oxide is formed on the surface of the silicon oxide film by a treatment of immersing in an alkaline solution containing 0 ppb of aluminum.

【0006】本発明の他の特徴は、シリコン基板の主面
に形成されたシリコン酸化膜と、前記シリコン酸化膜の
表面上に被着形成された該シリコン酸化膜より薄いアル
ミ酸化物の薄膜と、前記アルミ酸化物の薄膜の上面に被
着形成された電極とを有する半導体装置にある。
Another feature of the present invention is a silicon oxide film formed on the main surface of a silicon substrate, and an aluminum oxide thin film deposited on the surface of the silicon oxide film and thinner than the silicon oxide film. A semiconductor device having an electrode deposited on the upper surface of the aluminum oxide thin film.

【0007】[0007]

【作用】このように本発明ではゲートシリコン酸化膜の
表面上にウエット処理によるアルミ酸化物の薄膜を形成
したからその耐圧特性の劣化が抑制されて信頼性が向上
した半導体装置となる。
As described above, according to the present invention, since the thin film of aluminum oxide is formed on the surface of the gate silicon oxide film by the wet treatment, the deterioration of the withstand voltage characteristic is suppressed and the semiconductor device has improved reliability.

【0008】[0008]

【実施例】以下、図面を参照して本発明を説明する。図
1は本発明の実施例の半導体装置の製造方法を工程順に
示した断面図である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. 1A to 1D are sectional views showing a method of manufacturing a semiconductor device according to an embodiment of the present invention in the order of steps.

【0009】シリコン基板10に選択酸化法により選択
的にフィールド酸化膜を素子分離領域12として形成
し、この素子分離領域12により区画された素子領域1
1の主面に膜厚10nmのゲートシリコン酸化膜13を
熱酸化法、急速熱酸化法あるいは化学的気相成長法等に
より形成する(図1(A))。
A field oxide film is selectively formed as an element isolation region 12 on a silicon substrate 10 by a selective oxidation method, and the element region 1 partitioned by the element isolation region 12 is formed.
A gate silicon oxide film 13 having a film thickness of 10 nm is formed on the main surface of No. 1 by a thermal oxidation method, a rapid thermal oxidation method, a chemical vapor deposition method or the like (FIG. 1A).

【0010】次に、このシリコン基板を、例えば100
ppbのアルミニウムを含有するアルカリ溶液(例え
ば、水酸化アンモニウム、TMAH等)中に浸漬しおよ
そ10分間処理する。これによりシリコン酸化膜13の
表面上に膜厚1nmのアルミ酸化物の薄膜14が形成さ
れる(図1(B))。
Next, this silicon substrate is treated, for example, with 100
It is immersed in an alkaline solution containing ppb of aluminum (for example, ammonium hydroxide, TMAH, etc.) and treated for about 10 minutes. As a result, a thin film 14 of aluminum oxide having a film thickness of 1 nm is formed on the surface of the silicon oxide film 13 (FIG. 1 (B)).

【0011】次に、このアルミ酸化物の薄膜14上に、
スパッタ法、蒸着法あるいは化学的気相成長法等により
アルミニウム、多結晶シリコンもしくは金属シリサイド
による電極15を形成する(図1(C))。
Next, on the aluminum oxide thin film 14,
An electrode 15 made of aluminum, polycrystalline silicon, or metal silicide is formed by a sputtering method, a vapor deposition method, a chemical vapor deposition method, or the like (FIG. 1C).

【0012】図1(B)の工程において、アルミニウム
はアルカリ性溶液中においては水酸化物あるいは酸化物
となりシリコンウェハ表面に吸着する。このとき、アル
カリ溶液中に過酸化水素等の酸化剤が含有されていれ
ば、より酸化物が形成されやすくなる。また、アルミニ
ウムの水酸化物は加熱分解によって容易に酸化物に変化
しうるので、ウェハ表面はアルミ酸化物の薄膜で覆われ
ることになる。さらに、シリコンウェハをアルカリ溶液
中で浸漬処理することで、より均一なアルミ酸化物の薄
膜形成が達成できる。
In the step of FIG. 1B, aluminum becomes hydroxide or oxide in the alkaline solution and is adsorbed on the surface of the silicon wafer. At this time, if the alkaline solution contains an oxidizing agent such as hydrogen peroxide, an oxide is more likely to be formed. Further, since aluminum hydroxide can be easily converted into oxide by thermal decomposition, the wafer surface is covered with a thin film of aluminum oxide. Further, by dipping the silicon wafer in an alkaline solution, a more uniform thin film formation of aluminum oxide can be achieved.

【0013】本発明でアルカリ溶液中のアルミニウム濃
度を0.1〜10000ppbと規定しているのは以下
の理由による。
In the present invention, the aluminum concentration in the alkaline solution is defined as 0.1 to 10000 ppb for the following reason.

【0014】図3に、アルカリ溶液中のアルミニウム濃
度とアルミ酸化物としてシリコンウェハ表面へ吸着する
アルミニウムの吸着量との関係を示す。溶液中のアルミ
ニウム濃度が0.1〜1000ppbの範囲では溶液中
の濃度とウェハ表面への吸着量は比例関係にあり、溶液
中濃度が10000ppbを越えるとウェハへの吸着量
はほぼ飽和する。また、溶液中濃度が0.1ppb未満
になると、溶液中のアルミニウム濃度の制御が困難にな
ると同時にウェハ表面への吸着量も不安定になる。従っ
て、ウェハ表面へのアルミニウムの吸着量を制御し、ア
ルミ酸化物薄膜の膜厚を厳密に制御するためには、アル
カリ溶液中のアルミニウム濃度を0.1〜10000p
pbにする必要があり、また、比例範囲内の0.1〜1
000ppbにするのがさらに好ましい。
FIG. 3 shows the relationship between the aluminum concentration in the alkaline solution and the amount of aluminum adsorbed on the surface of the silicon wafer as aluminum oxide. When the aluminum concentration in the solution is in the range of 0.1 to 1000 ppb, the concentration in the solution and the adsorption amount on the wafer surface are in a proportional relationship, and when the concentration in the solution exceeds 10,000 ppb, the adsorption amount on the wafer is almost saturated. Further, when the concentration in the solution is less than 0.1 ppb, it becomes difficult to control the aluminum concentration in the solution, and at the same time, the adsorption amount on the wafer surface becomes unstable. Therefore, in order to control the adsorption amount of aluminum on the wafer surface and strictly control the film thickness of the aluminum oxide thin film, the aluminum concentration in the alkaline solution should be 0.1 to 10000 p.
must be pb, and within the proportional range 0.1-1
More preferably, it is 000 ppb.

【0015】図2に本発明の実施例のMOSダイオード
の断面構造を示す。シリコン基板10に選択的にフィー
ルド酸化膜12が形成されて素子分離領域12を構成し
ている。素子分離領域に囲まれたシリコン基板の素子領
域11上に熱酸化法により膜厚10nmのゲートシリコ
ン酸化膜13が形成されている。そしてゲートシリコン
酸化膜13上面上からフィールド酸化膜12上面上にか
けて、図1(B)の工程による膜厚1nmのアルミ酸化
物の薄膜14が被着形成され、素子領域11上において
シリコン酸化膜13とその上のアルミ酸化物の薄膜14
とにより多層構造のゲート酸化膜となっている。そして
アルミ酸化物の薄膜14の上面上に電極15が被着形成
されて、電極15およびシリコン基板の素子領域11を
両電極とするMOSダイオードを構成している。
FIG. 2 shows a sectional structure of a MOS diode according to an embodiment of the present invention. A field oxide film 12 is selectively formed on the silicon substrate 10 to form an element isolation region 12. A gate silicon oxide film 13 having a film thickness of 10 nm is formed on the element region 11 of the silicon substrate surrounded by the element isolation region by a thermal oxidation method. Then, from the upper surface of the gate silicon oxide film 13 to the upper surface of the field oxide film 12, a thin film 14 of aluminum oxide having a film thickness of 1 nm is deposited by the process of FIG. 1B, and the silicon oxide film 13 is formed on the element region 11. And aluminum oxide thin film 14 on it
Is a multi-layered gate oxide film. An electrode 15 is deposited on the upper surface of the aluminum oxide thin film 14 to form a MOS diode having the electrode 15 and the element region 11 of the silicon substrate as both electrodes.

【0016】アルミニウムの酸化物は熱的にまた化学的
に安定であり、しかも、比誘電率も約10と高い。した
がって、本発明のようにシリコン酸化膜とアルミニウム
酸化物の薄膜とを積層してゲート酸化膜を構成すること
により、従来のシリコン酸化膜単層のゲート酸化膜と比
較して、ゲート絶縁膜を薄膜化した場合の安定性、信頼
性を増すことができる。
Aluminum oxide is thermally and chemically stable and has a high relative dielectric constant of about 10. Therefore, by forming a gate oxide film by laminating a silicon oxide film and a thin film of aluminum oxide as in the present invention, a gate insulating film is formed as compared with a conventional gate oxide film of a single silicon oxide film. The stability and reliability of the thin film can be increased.

【0017】以上の図2では実施例としてMOSダイオ
ードについて説明したが、シリコン酸化膜13およびア
ルミ酸化物の薄膜14からなる多層酸化膜を誘電体膜と
したMOS容量素子とすることもできる。また、MOS
トランジスタのゲート絶縁膜の形成に本発明を用いて、
実施例のMOSダイオードと全く同様にMOSトランジ
スタの製造ができる。MOSトランジスタの場合は、電
極15がゲート電極となり、その下の素子領域11の箇
所がチャネル領域となり、チャネル領域の両側(紙面に
垂直方向の両側)にソースおよびドレイン領域が形成さ
れる。
Although the MOS diode has been described as an embodiment with reference to FIG. 2 above, it is also possible to use a MOS capacitor element having a dielectric film of a multi-layer oxide film composed of a silicon oxide film 13 and a thin film 14 of aluminum oxide. Also, MOS
By using the present invention for forming a gate insulating film of a transistor,
A MOS transistor can be manufactured in exactly the same manner as the MOS diode of the embodiment. In the case of a MOS transistor, the electrode 15 serves as a gate electrode, the element region 11 below the electrode 15 serves as a channel region, and source and drain regions are formed on both sides of the channel region (both sides in the direction perpendicular to the plane of the drawing).

【0018】図4に従来技術による方法と本発明による
方法を用いて作製したMOSダイオードにおけるそれぞ
れのゲート酸化膜耐圧特性について示す。なお、ゲート
酸化膜の膜厚は約10nmであり、電極としては多結晶
シリコンを用いた。
FIG. 4 shows the breakdown voltage characteristics of each gate oxide film in the MOS diode manufactured by the method according to the prior art and the method according to the present invention. The gate oxide film had a thickness of about 10 nm, and polycrystalline silicon was used for the electrodes.

【0019】従来技術による方法の図1(A)の場合
は、2MV/cm以下のいわゆるAモード不良と呼ばれ
る不良が多発しているのに対し、本発明による方法の図
1(B)の場合は、耐圧特性は大幅に改善され、ほとん
ど8MV/cm以上の真性耐圧(本来の耐圧)を示して
いる。
In the case of the method according to the prior art shown in FIG. 1 (A), a so-called A-mode defect of 2 MV / cm or less frequently occurs, whereas in the case of the method according to the present invention shown in FIG. 1 (B). Shows that the withstand voltage characteristic is significantly improved and almost shows an intrinsic withstand voltage (original withstand voltage) of 8 MV / cm or more.

【0020】[0020]

【発明の効果】以上説明したように本発明によれば、ゲ
ート酸化膜をシリコン酸化膜とアルミ酸化物の薄膜との
2層構造にすることによって、デバイス特性の安定性、
信頼性を飛躍的に高めることができ、半導体装置を信頼
性良くかつ高歩留りで製造することが可能となる。
As described above, according to the present invention, since the gate oxide film has a two-layer structure of a silicon oxide film and a thin film of aluminum oxide, stability of device characteristics,
The reliability can be dramatically improved, and the semiconductor device can be manufactured with high reliability and high yield.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例の半導体装置の製造方法を工程
順に示した断面図である。
FIG. 1 is a cross-sectional view showing a method of manufacturing a semiconductor device according to an embodiment of the present invention in the order of steps.

【図2】本発明の実施例の半導体装置を示した断面図で
ある。
FIG. 2 is a sectional view showing a semiconductor device according to an exemplary embodiment of the present invention.

【図3】アルカリ溶液中のアルミニウム濃度とシリコン
ウェハ表面へのアルミニウム吸着量との関係を示す図で
ある。
FIG. 3 is a diagram showing the relationship between the aluminum concentration in an alkaline solution and the amount of aluminum adsorbed on the surface of a silicon wafer.

【図4】従来技術による方法と本発明による方法を用い
て作製したMOSダイオードにおけるゲート酸化膜耐圧
特性をそれぞれ示す図であり、(A)が従来技術による
方法の場合、(B)が本発明による方法の場合である。
4A and 4B are diagrams respectively showing gate oxide film breakdown voltage characteristics in a MOS diode manufactured by using the method according to the related art and the method according to the present invention, where FIG. 4A is the method according to the related art and FIG. This is the case of the method according to.

【図5】従来技術の半導体装置の製造方法を工程順に示
した断面図である。
FIG. 5 is a cross-sectional view showing a method of manufacturing a semiconductor device in the related art in the order of steps.

【符号の説明】[Explanation of symbols]

10,20 シリコン基板 11,21 素子領域 12,22 素子分離領域(フィールド酸化膜) 13,23 ゲート酸化膜 14 アルミ酸化物の薄膜 15,25 電極 10, 20 Silicon substrate 11, 21 Element region 12, 22 Element isolation region (field oxide film) 13, 23 Gate oxide film 14 Aluminum oxide thin film 15, 25 Electrode

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 シリコン酸化膜形成後に、ウエット処理
により前記シリコン酸化膜の表面上にアルミ酸化物の薄
膜に形成することを特徴とする半導体装置の製造方法。
1. A method of manufacturing a semiconductor device, comprising forming a thin film of aluminum oxide on the surface of the silicon oxide film by a wet process after the formation of the silicon oxide film.
【請求項2】 前記ウエット処理は0.1〜10000
ppbのアルミニウムを含有したアルカリ性溶液に浸漬
する処理であることを特徴とする請求項1記載の半導体
装置の製造方法。
2. The wet treatment is 0.1-10000.
The method of manufacturing a semiconductor device according to claim 1, wherein the step is a step of immersing in an alkaline solution containing ppb of aluminum.
【請求項3】 半導体基板の主面にゲート酸化膜を形成
する工程と、前記半導体基板を0.1〜10000pp
bのアルミニウムを含有するアルカリ性溶液に浸漬して
前記ゲート酸化膜の表面上にアルミ酸化物の薄膜を形成
する工程と、前記アルミ酸化物の薄膜の上に電極を形成
する工程とを含むことを特徴とする半導体装置の製造方
法。
3. A step of forming a gate oxide film on a main surface of a semiconductor substrate, and 0.1 to 10000 pp of the semiconductor substrate.
b) forming a thin film of aluminum oxide on the surface of the gate oxide film by immersing it in an alkaline solution containing aluminum; and forming an electrode on the thin film of aluminum oxide. A method for manufacturing a characteristic semiconductor device.
【請求項4】 シリコン基板の主面に形成されたシリコ
ン酸化膜と、前記シリコン酸化膜の表面上に被着形成さ
れた該シリコン酸化膜より薄いアルミ酸化物の薄膜と、
前記アルミ酸化物の薄膜の上面に被着形成された電極と
を有することを特徴とする半導体装置。
4. A silicon oxide film formed on a main surface of a silicon substrate, and an aluminum oxide thin film deposited on the surface of the silicon oxide film and thinner than the silicon oxide film.
A semiconductor device, comprising: an electrode deposited on the upper surface of the aluminum oxide thin film.
JP7095301A 1995-04-20 1995-04-20 Method for manufacturing semiconductor device Expired - Lifetime JP2792461B2 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990014155A (en) * 1997-07-24 1999-02-25 윌리엄 비. 켐플러 High permittivity silicate gate dielectric
KR20210110153A (en) * 2020-02-27 2021-09-07 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 Semiconductor devices and methods of manufacture

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61137370A (en) * 1984-12-10 1986-06-25 Toshiba Corp Manufacture of mos semiconductor device
JPH04177728A (en) * 1990-11-09 1992-06-24 Matsushita Electric Ind Co Ltd Semiconductor insulating film and manufacture thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61137370A (en) * 1984-12-10 1986-06-25 Toshiba Corp Manufacture of mos semiconductor device
JPH04177728A (en) * 1990-11-09 1992-06-24 Matsushita Electric Ind Co Ltd Semiconductor insulating film and manufacture thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990014155A (en) * 1997-07-24 1999-02-25 윌리엄 비. 켐플러 High permittivity silicate gate dielectric
KR20210110153A (en) * 2020-02-27 2021-09-07 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 Semiconductor devices and methods of manufacture
US11387344B2 (en) 2020-02-27 2022-07-12 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing a semiconductor device having a doped work-function layer

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