JPH098307A - Semiconductor device - Google Patents

Abstract

PURPOSE: To obtain a semiconductor device in which fluctuation of characteristics due to hot carriers, generated by a high electric field or ultraviolet rays, can be suppressed. CONSTITUTION: A thermal oxide is deposited by 6-20nm thick beneath a nitride 25 while covering the side of a gate electrode 23 and impurity diffusion layers 26a, 26b serving as a lightly doped source and drain. This structure blocks passage of hot carriers, generated by a high field or ultraviolet rays, through the oxide 24 and reduce the hot carriers being trapped at the border of oxide 24 and nitride 25 thus suppressing fluctuation in the characteristics of a semiconductor device.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device used in a semiconductor integrated circuit.

[0002]

2. Description of the Related Art In recent years, nitride films and polysilicon have come to be used as sidewall spacer materials in semiconductor devices aiming at higher integration and higher performance. FIG. 4 shows Japanese Patent Laid-Open No. 62-81762 and Japanese Patent Laid-Open No. 63-22.
FIG. 6 is a cross-sectional view of a conventional semiconductor device described in Japanese Patent No. 4363. In FIG. 4, 1 is a semiconductor substrate, 2 is an insulating film,
Reference numeral 3 is a gate electrode, 4 is an oxide film, 5 is a nitride film, 6 is an impurity diffusion layer serving as a low concentration source / drain, 7 is an impurity diffusion layer serving as a high concentration source, and 8 is an impurity diffusion layer serving as a high concentration drain. is there.

The gate electrode 3 is arranged on the semiconductor substrate 1 via the insulating film 2. The oxide film 4 covers the side portions of the gate electrode 3 and the impurity diffusion layer 6. Oxide film 4
Is for electrically insulating the gate electrode 3 and for buffering the stress between the nitride film 5 and the gate electrode 3 and the impurity diffusion layer 6, and is formed by a thermal oxidation method or a CVD method. The film thickness of the oxide film 4 is about 20 to 30 nm. The nitride film 5 is a sidewall spacer, and is arranged on the side portion of the gate electrode 3 and the impurity diffusion layer 6 with the oxide film 4 interposed therebetween. The nitride film 5 is used as a mask that prevents the ion implantation into the impurity diffusion layer 6 when forming the impurity diffusion layers 7 and 8 to be the high concentration source and drain. In the past, a CVD oxide film was used, but here, due to the high driving ability by the gate fringe effect, the ease of salicide formation, and the ease of removing the unnecessary oxide film 4 by wet etching, etc., here. The nitride film 5 is used.

FIG. 5 is a sectional view of another conventional semiconductor device. In FIG. 5, 9 is a nitride film, 10 is polysilicon, and the same parts as in FIG. 4 are denoted by the same reference numerals. In FIG. 5, the semiconductor substrate 1, the insulating film 2, the gate electrode 3, and the oxide film 4 are arranged in the same manner as in FIG.
Like the oxide film 4, the nitride film 9 covers the side portions of the gate electrode 3 and the impurity diffusion layer 6. The polysilicon 10 is a sidewall spacer, and is arranged on the side portion of the gate electrode 3 and the impurity diffusion layer 6 via the oxide film 4 and the nitride film 9. The use of the polysilicon 10 as the sidewall spacer has a fine driving effect due to the gate fringe effect, the ease of salicide formation, and the ease of removing the unnecessary oxide film 4 by wet etching. This is because it is easy to form a large sidewall spacer. The nitride film 9 is used as an end point detection film when the polysilicon 10 is subjected to reactive ion etching. The oxide film 4 electrically insulates the gate electrode 3,
It is for buffering the stress between the nitride film 9 and the gate electrode 3 and the impurity diffusion layer 6, and is a thermal oxidation method or a CVD method.
Formed by the method.

4 and 5 are that a laminated film of an oxide film 4 and a nitride film 5 (or 9) is arranged on the side portion of the gate electrode 3 and the impurity diffusion layer 6. FIG.
International Electron Devices Meeting Technical Digest 1988 pp. 234-237 Author Tomohisa Mizuno "Silicon Nitride / Silicon Oxide Spacer Injust High Reliability In Erdidiem OSE Fitness &. It's Simple Degradation Model "(T. Mizuno et al.
"Si ₃ N ₄ / SiO ₂ Spacer Induce
d High Reliability in LDD
MOSFET and It's SimpleDegr
adation model ”, Internet
nal Electron Devices Meet
ing, p. 234-237, 1988), which is a graph showing characteristic variations due to hot carriers.

As shown in FIG. 6, the thickness of the oxide film 4 is 2.
When the thickness is as thin as 5 nm, the initial characteristic variation is large, but the characteristic variation rate is small. On the contrary, when the thickness of the oxide film 4 is as thick as 25 nm, the initial characteristic variation is small, but the characteristic variation rate is large. That is, it can be seen that the state of characteristic variation depends on the film thickness of the oxide film 4, and that the film thickness of the oxide film 4 has an optimum range.

[0007]

In the conventional semiconductor device described above, in the laminated film formed of the oxide film 4 and the nitride film 5 (or 9) on the side portion of the gate electrode 3 and the impurity diffusion layer 6, oxidation is performed. When the film thickness of the film 4 is thin, the initial characteristic fluctuation due to hot carriers generated by a high electric field or ultraviolet rays becomes large, while when the film thickness of the oxide film 4 is large, the characteristic fluctuation rate becomes large. is there.

The present invention solves the above-mentioned conventional problems, and an object of the present invention is to provide a semiconductor device capable of suppressing characteristic fluctuations caused by hot carriers generated by a high electric field or ultraviolet rays.

[0009]

According to a first aspect of the present invention, there is provided a semiconductor device having a gate electrode formed on a semiconductor substrate with an insulating film interposed therebetween, and a low-concentration source formed on the surface of the semiconductor substrate adjacent to both sides of the gate electrode. -Drain, high-concentration source / drain formed outside the low-concentration source / drain across the gate electrode, oxide film covering the side of the gate electrode and the low-concentration source / drain, and formed on the oxide film A semiconductor device including a nitride film, wherein the oxide film has a film thickness of 6
It is characterized by comprising a thermal oxide film having a thickness of not less than 20 nm and not more than 20 nm.

According to another aspect of the semiconductor device of the present invention, a gate electrode formed on a semiconductor substrate with an insulating film interposed therebetween, low-concentration source / drain formed on the surface of the semiconductor substrate adjacent to both sides of the gate electrode, and a gate electrode. Low concentration sauce across
High-concentration source / drain formed outside the drain,
What is claimed is: 1. A semiconductor device comprising: an oxide film covering a side portion of a gate electrode and a low concentration source / drain; and a nitride film formed on the oxide film, wherein the oxide film is a side portion of the gate electrode and a low concentration source / drain. Contact the drain and the film thickness is 6nm or more, 20n
m or less thermal oxide film and CVD formed on this thermal oxide film
It is characterized by being formed of a laminated film with an oxide film.

According to a third aspect of the present invention, in the semiconductor device according to the second aspect, the thickness of the CVD oxide film is 20 n.
It is characterized by being m-100 nm. According to a fourth aspect of the present invention, in the semiconductor device according to the first, second or third aspect, the nitride film is used as a sidewall spacer.

[0012]

According to the structure of the present invention, the oxide film covering the side portion of the gate electrode and the low-concentration source / drain is a thermal oxide film having a thickness of 6 nm or more and 20 nm or less. It is possible to prevent the hot carriers generated in (1) from passing through the oxide film and to prevent them from being trapped at the boundary between the oxide film and the nitride film, thereby reducing the characteristic fluctuation.

Further, an oxide film covering the side portion of the gate electrode and the low concentration source / drain is in contact with the side portion of the gate electrode and the low concentration source / drain, and the film thickness is 6 nm or more, 2
A thermal oxide film with a thickness of 0 nm or less and C formed on this thermal oxide film
By forming a laminated film with the VD oxide film, hot carriers generated by a high electric field or ultraviolet rays are prevented from passing through the oxide film, and are prevented from being trapped at the boundary between the oxide film and the nitride film, so that the characteristic variation is suppressed. Can be smaller.

[0014]

Embodiments of the present invention will be described below with reference to the drawings. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention. In FIG. 1, 21 is p
Type semiconductor substrate, 22 is an insulating film, 23 is a gate electrode, 2
4 is an oxide film, 25 is a nitride film, 26a is an impurity diffusion layer serving as an n-type low-concentration source, 26b is an impurity diffusion layer serving as an n-type low-concentration drain, and 27 is an impurity diffusion layer serving as an n-type high-concentration source. The layer 28 is an impurity diffusion layer which becomes an n-type high concentration drain.

The semiconductor substrate 21 is p-type (100: 10 to 1).
It is a semiconductor. The gate electrode 23 is made of polycide and is arranged on the semiconductor substrate 21 with the insulating film 22 interposed therebetween. The length of the gate electrode 23 (gate length) is 0.
It is about 2 μm. The oxide film 24 covers the side portions of the gate electrode 23 and the impurity diffusion layers 26a and 26b. The nitride film 25 is a sidewall spacer and the oxide film 24.
Through the side of the gate electrode 23 and the impurity diffusion layer 26
It is arranged on a and 26b and has a length of about 0.1 μm. The nitride film 25 is formed by anisotropic dry etching after growing a nitride film having a film thickness of about 0.1 μm on the entire surface of the semiconductor substrate 21.

The feature of this semiconductor device is that the oxide film 24 is
The thermal oxide film has a film thickness of 6 nm or more and 20 nm or less, and this thermal oxide film is formed by thermal oxidation at about 850 ° C. The characteristics of the semiconductor device configured as described above will be described. As miniaturization progresses, the electric field strength in the semiconductor substrate 21 increases, and hot electrons are easily generated. Also, hot electrons are generated by the ultraviolet rays generated during the process of processing plasma. These hot electrons are trapped at the interface between the oxide film 24 and the nitride film 25 and cause a characteristic change of the semiconductor device.

In order to investigate the characteristic variation due to hot electrons, ultraviolet rays were applied to the semiconductor device in which the thickness of the oxide film 24 was changed. The result is shown in FIG. Here, the wavelength λ of the ultraviolet rays is 253.7 nm, and the irradiation amount φ is 6 mW / cm ^2.
(Wafer surface), irradiation time is 15 minutes at room temperature. As shown in FIG. 2, it was found that the characteristics of the semiconductor device fluctuate remarkably when the thickness of the oxide film 24 is 6 nm or less. This is because the excited hot electrons penetrate the thin oxide film 24 and are trapped in the nitride film 25. On the contrary, when the thickness of the oxide film 24 is 6 nm or more,
It was found that the characteristics of the semiconductor device hardly changed. This is because the excited hot electrons cannot penetrate through the thick oxide film 24 and are not trapped in the nitride film 25. It was also found that the film thickness of 6 nm is about twice the film thickness at which the tunnel current starts to flow, and is a critical film thickness for ensuring the stability of the characteristics of the semiconductor device for a long period of time. Although hot electrons were generated by irradiation of ultraviolet rays this time, the above contents also apply to hot electrons generated by a high electric field.

Further, if the thickness of the oxide film 24 is increased,
Due to the heat treatment for a long time, the characteristics of the semiconductor device such as the threshold voltage and the contact resistance are deteriorated. When the oxide film 24 is formed of a thermal oxide film, if the film thickness of the oxide film 24 is 20 nm or less, no problem occurs in the semiconductor device used for the highly integrated circuit. As described above, according to this embodiment, the oxide film 24 is a thermal oxide film having a film thickness of 6 nm or more and 20 nm or less, so that the characteristic fluctuation due to hot carriers generated by a high electric field or ultraviolet rays can be suppressed. You can

On the other hand, when the oxide film 24 is formed of a CVD oxide film, the heat treatment does not change the characteristics of the semiconductor device. However, it has been found that when the CVD oxide film alone is used, the characteristic variation due to hot carriers is larger than that in the thermal oxide film. This is considered to be because a CVD oxide film having a rough film quality is more likely to pass hot electrons than a thermal oxide film having a dense film quality. That is,
In order for the characteristics of the semiconductor device to be stable, the gate electrode 2
3 and the oxide film 24 in contact with the impurity diffusion layers 26a and 26b
Must be formed of a thermal oxide film.

Further, it has been found that it is effective to make the oxide film 24 a laminated structure of a thermal oxide film and a CVD oxide film in order to further stabilize the characteristics of the semiconductor device. That is,
Range without characteristic fluctuation (film thickness 6 nm or more, 20 nm or less)
Then, a thermal oxide film having a dense film quality is formed, and a CVD oxide film is further formed to finally increase the film thickness of the oxide film 24. For example, when the thermal oxide film thickness is 8 nm and the CVD oxide film thickness is 20 nm or more, the characteristic variation amount upon irradiation with ultraviolet rays becomes almost zero. When the CVD oxide film thickness is thicker than 100 nm, the shape of the bottom of the contact hole deteriorates and it becomes difficult to form the sidewall spacer (nitride film 25). If the CVD oxide film thickness is 100 nm or less, the above inconvenience does not occur.

Therefore, the oxide film 24 is formed on the gate electrode 2
3 nm and a film thickness of 6 nm or more and 20 n formed on the impurity diffusion layers 26a and 26b of the low concentration source / drain.
a thermal oxide film having a thickness of m or less and a film thickness of 20 formed thereon
By forming the laminated structure with the CVD oxide film having a thickness of not less than 100 nm and not more than 100 nm, the shape of the bottom of the contact hole is not deteriorated, and the side wall spacer (nitride film 25) is not easily formed, which is high. It is possible to further suppress the characteristic variation due to hot carriers generated by an electric field or ultraviolet rays.

Next, another embodiment of the present invention will be described. FIG. 3 is a sectional view of a semiconductor device according to another embodiment of the present invention. In FIG. 3, reference numeral 31 is a nitride film as a sidewall spacer, 32 is an impurity diffusion layer serving as an n-type low concentration drain, and 33 is a nitride film as a protective film. Is attached.

In the semiconductor device of FIG. 1, the impurity diffusion layers 26a and 26b serving as the low-concentration source and drain are formed in the same size, but the semiconductor device of this embodiment shown in FIG. The impurity diffusion layer 32 to be formed is wider than the impurity diffusion layer 26a to be the low concentration source. Further, in addition to the nitride film 31 as the sidewall spacer, a nitride film 33 as a protective film is formed so as to cover the widely formed impurity diffusion layer 32 serving as the low concentration drain via the oxide film 24. . Other configurations are the same as those in FIG. 1, and the oxide film 24 has a film thickness of 6 nm or more, 20
It is formed of a thermal oxide film of nm or less.

Also in the semiconductor device of FIG. 3, the oxide film 24 is used.
Of the oxide film 24 when the film thickness of the
The characteristics of the semiconductor device fluctuated remarkably when the film thickness was 6 nm or less, and the characteristics of the semiconductor device hardly changed when the film thickness was 6 nm or more. This mechanism is the same as described in the above description. Further, although hot electrons were generated by irradiation of ultraviolet rays this time, the same applies to the case of hot electrons caused by a high electric field.

Also in the semiconductor device of FIG. 3, as in the semiconductor device of FIG.
By using a thermal oxide film having a thickness of 0 nm or less, it is possible to suppress characteristic fluctuations due to hot carriers generated by a high electric field or ultraviolet rays. Further, if the oxide film 24 has a laminated structure of a thermal oxide film having a film thickness of 6 nm or more and 20 nm or less and a CVD oxide film having a film thickness of 20 nm or more and 100 nm or less formed on the oxide film 24, the characteristic variation is further suppressed. What can be done is similar to the semiconductor device of FIG.

Further, in this embodiment, the side wall spacer is made of the nitride film 31, but the same applies to the case of being made of the CVD oxide film. Although the sidewall spacer is formed of the nitride film 25 (31) in the above embodiment, the gate electrode 23 and the impurity diffusion layers 26a and 26b (3) are formed.
In contrast to 2), the same applies to the case where the sidewall spacer made of polysilicon is arranged via the oxide film and the nitride film.

Further, in the above embodiment, the case of the n-channel type semiconductor device is shown, but the same applies to the case of the p-channel type semiconductor device. Further, although the semiconductor device having the LDD structure has been described in the above embodiment, the same applies to the semiconductor device having the SD structure or the FOLD structure.

[0028]

According to the present invention, by setting the thickness of the oxide film existing between the gate electrode or the impurity diffusion layer and the nitride film in the range of 6 nm or more and 20 nm or less, the characteristics caused by hot carriers can be obtained. It is possible to realize an excellent semiconductor device capable of suppressing fluctuations, and to greatly contribute to a semiconductor integrated circuit.

Further, the oxide film existing between the gate electrode or the impurity diffusion layer and the nitride film is formed to have a film thickness of 6 nm or more and 20 nm.
By using the following laminated film of a thermal oxide film and a CVD oxide film, it is possible to realize an excellent semiconductor device that can further suppress the characteristic fluctuation caused by hot carriers, and greatly contribute to the semiconductor integrated circuit.

[Brief description of drawings]

FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a characteristic diagram of an embodiment of the present invention.

FIG. 3 is a sectional view of a semiconductor device according to another embodiment of the present invention.

FIG. 4 is a cross-sectional view of a conventional semiconductor device.

FIG. 5 is a cross-sectional view of another conventional semiconductor device.

FIG. 6 is a characteristic diagram described in IEDM.

[Explanation of symbols]

 21 semiconductor substrate 22 insulating film 23 gate electrode 24 oxide film 25 nitride film 26a low concentration source impurity diffusion layer 26b low concentration drain impurity diffusion layer 27 high concentration source impurity diffusion layer 28 high concentration drain impurity diffusion layer Layer 31 Nitride film 32 Impurity diffusion layer to be a low concentration drain 33 Nitride film

Claims (4)

[Claims] 1. A gate electrode formed on a semiconductor substrate via an insulating film, and low-concentration source / drain formed on the surface of the semiconductor substrate adjacent to both sides of the gate electrode,
A high-concentration source / drain formed outside the low-concentration source / drain with the gate electrode interposed therebetween, an oxide film covering a side portion of the gate electrode and the low-concentration source / drain, and formed on the oxide film A semiconductor device including the nitride film described above, wherein the oxide film is a thermal oxide film having a film thickness of 6 nm or more and 20 nm or less. 2. A gate electrode formed on a semiconductor substrate via an insulating film, and low-concentration source / drain formed on the surface of the semiconductor substrate adjacent to both sides of the gate electrode,
A high-concentration source / drain formed outside the low-concentration source / drain with the gate electrode interposed therebetween, an oxide film covering a side portion of the gate electrode and the low-concentration source / drain, and formed on the oxide film A thermal oxidation film having a film thickness of 6 nm or more and 20 nm or less in contact with the side portion of the gate electrode and the low concentration source / drain, and the thermal oxidation film. A semiconductor device comprising a laminated film with a CVD oxide film formed on the film. 3. The thickness of the CVD oxide film is 20 nm to 100.
The semiconductor device according to claim 2, wherein the semiconductor device has a thickness of nm. 4. The semiconductor device according to claim 1, wherein the nitride film is a sidewall spacer.