JPS61137370A - Manufacture of mos semiconductor device - Google Patents

Manufacture of mos semiconductor device

Info

Publication number
JPS61137370A
JPS61137370A JP25929484A JP25929484A JPS61137370A JP S61137370 A JPS61137370 A JP S61137370A JP 25929484 A JP25929484 A JP 25929484A JP 25929484 A JP25929484 A JP 25929484A JP S61137370 A JPS61137370 A JP S61137370A
Authority
JP
Japan
Prior art keywords
film
semiconductor device
gate electrode
metal atoms
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25929484A
Other languages
Japanese (ja)
Inventor
Shigeo Hachiman
Shunichi Kai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP25929484A priority Critical patent/JPS61137370A/en
Publication of JPS61137370A publication Critical patent/JPS61137370A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/511Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/517Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate

Abstract

PURPOSE:To obtain a MOS semiconductor device of double insulating film structure having a uniform performance by implanting ions of metal atoms of Al, Ti and oxygen atoms into the surface layer of an oxide film coated on a substrate when forming a gate electrode in the semiconductor device,and forming the gate electrode on an oxide layer obtained by heat treating. CONSTITUTION:A thick field oxide film 2 laid on a P<+> type channel cut region 1A is formed on the surface edge of a P<-> type Si substrate 1, and a thin gate oxide film 3 is coated on the exposed surface 2a surrounded by the film 2. Then, ions of at least one metal atoms of Al, Ti, Ta, W, Zr, Hf, Pb and oxygen atoms are implanted into the surface of the films 3, 2, heat treated at 1,000 deg.C for 10min in N2 atmosphere to form a thin oxide layer 4 of metal atoms on the surface layers of the films 3, 2. Thereafter, polycrystalline Si layer is accumulated on the film 4, etched to allow a gate electrode 5 to remain through the film 4a, source region 1B and drain region 1C are diffused at both sides.
JP25929484A 1984-12-10 1984-12-10 Manufacture of mos semiconductor device Pending JPS61137370A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25929484A JPS61137370A (en) 1984-12-10 1984-12-10 Manufacture of mos semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25929484A JPS61137370A (en) 1984-12-10 1984-12-10 Manufacture of mos semiconductor device

Publications (1)

Publication Number Publication Date
JPS61137370A true JPS61137370A (en) 1986-06-25

Family

ID=17332077

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25929484A Pending JPS61137370A (en) 1984-12-10 1984-12-10 Manufacture of mos semiconductor device

Country Status (1)

Country Link
JP (1) JPS61137370A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08288507A (en) * 1995-04-20 1996-11-01 Nec Corp Semiconductor device and manufacturing method thereof
EP0962986A2 (en) * 1998-05-28 1999-12-08 Lucent Technologies Inc. MOS transistors with improved gate dielectrics
KR20020003029A (en) * 2000-06-30 2002-01-10 박종섭 Method for making a semi-conductor device
WO2002001622A3 (en) * 2000-06-26 2002-04-11 Univ North Carolina State Novel non-crystalline oxides for use in microelectronic, optical, and other applications
WO2002063668A1 (en) * 2001-02-06 2002-08-15 Matsushita Electric Industrial Co., Ltd. Method of forming insulating film and method of producing semiconductor device
JP2006332179A (en) * 2005-05-24 2006-12-07 Renesas Technology Corp Semiconductor device and its manufacturing method
JP2009529789A (en) * 2006-03-09 2009-08-20 アプライド マテリアルズ インコーポレイテッド Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08288507A (en) * 1995-04-20 1996-11-01 Nec Corp Semiconductor device and manufacturing method thereof
EP0962986A2 (en) * 1998-05-28 1999-12-08 Lucent Technologies Inc. MOS transistors with improved gate dielectrics
EP0962986A3 (en) * 1998-05-28 2000-12-27 Lucent Technologies Inc. MOS transistors with improved gate dielectrics
WO2002001622A3 (en) * 2000-06-26 2002-04-11 Univ North Carolina State Novel non-crystalline oxides for use in microelectronic, optical, and other applications
KR20020003029A (en) * 2000-06-30 2002-01-10 박종섭 Method for making a semi-conductor device
JP2002314074A (en) * 2001-02-06 2002-10-25 Matsushita Electric Ind Co Ltd Method for forming insulation film and method for manufacturing semiconductor device
WO2002063668A1 (en) * 2001-02-06 2002-08-15 Matsushita Electric Industrial Co., Ltd. Method of forming insulating film and method of producing semiconductor device
US6734069B2 (en) 2001-02-06 2004-05-11 Matsushita Electric Industrial Co., Ltd. Method of forming a high dielectric constant insulating film and method of producing semiconductor device using the same
JP2006332179A (en) * 2005-05-24 2006-12-07 Renesas Technology Corp Semiconductor device and its manufacturing method
KR101237153B1 (en) * 2005-05-24 2013-02-25 르네사스 일렉트로닉스 가부시키가이샤 Semiconductor device and manufacturing method thereof
US8501558B2 (en) 2005-05-24 2013-08-06 Renesas Electronics Corporation Semiconductor device and manufacturing method of the same
US8823110B2 (en) 2005-05-24 2014-09-02 Renesas Electronics Corporation Semiconductor device and manufacturing method of the same
JP2009529789A (en) * 2006-03-09 2009-08-20 アプライド マテリアルズ インコーポレイテッド Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system

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