JPH082852Y2 - Switching noise reduction circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial field of application) The present invention relates to a switching noise reduction circuit, which records information on a recording medium by alternately switching a plurality of heads or reproduces the recorded information. Used for.

(Prior Art) By using multiple heads,
In a recording / reproducing apparatus that records and reproduces an FM demodulated carrier, when the head is switched during reproduction, the demodulated signal demodulated from the carrier is interrupted when the head is switched.

The signal waveform shown in FIG. 3 (a) shows how the demodulated signal is interrupted. During the period from time T ₁₁ to T ₁₂ , the level is fixed at a constant value L ₁ due to the interrupted transmission of the demodulated signal. Then, at time T ₂ , the level suddenly and discontinuously changes. Such fixing of the level of the demodulated signal to a fixed value and sudden discontinuous change cause deterioration of the distortion rate as switching noise. Therefore, conventionally, as shown in FIG. 2B, the level V of the demodulated signal before the interruption is
₁₁ and the level V ₁₂ at the end of the interruption are interpolated by the voltage L ₂ that temporarily changes to reduce the distortion rate.

(Problems to be solved by the invention) However, in such an interpolation, the relationship between the phase of the demodulated signal and the interruption timing is as shown in FIG. At the time point Q when the coefficient becomes 0), the waveform of the demodulated signal that is not interpolated and the waveform of the demodulated signal that is interpolated by the signal L _{3 that} changes linearly [see FIG. 3 (d)] There is no large gap between them, and there is a point R at which the rate of change of the waveform is discontinuous.

That is, the method of performing primary interpolation has a problem that switching noise is not reduced depending on the relationship between the timing of interruption and the phase of the demodulated signal.

(Means for Solving the Problem) Information recorded on a recording medium is sequentially demodulated by a single demodulation circuit while alternately switching two heads, and an output is sent before head switching. When the audio signal demodulated by the above is used as a first demodulated audio signal and the audio signal demodulated by the head that outputs after switching the head is used as a second demodulated audio signal, In a reproducing apparatus having a function of interpolating an interruption period of a demodulated audio signal from when the transmission is interrupted to when the transmission of the second demodulated audio signal is started, the transmission of the first demodulated audio signal is interrupted. And a second differential circuit for sending the differential voltage of the demodulated audio signal when the sending of the second demodulated audio signal is started. A dividing circuit, an interpolation capacitor for storing the voltage of the demodulated audio signal when the transmission of the first demodulated audio signal is interrupted, and the interpolation capacitor when the transmission of the first demodulated audio signal is interrupted. The current corresponding to the output of the first differentiating circuit is sent to the first differential circuit, the value of the current sent is continuously changed, and when the sending of the second demodulated audio signal is started, the interpolation is performed. The capacitor is provided with an interpolation control circuit that sends out a current corresponding to the output of the second differentiating circuit.

(Operation) When the sending of the first demodulated audio signal is interrupted, the current corresponding to the output of the first differentiating circuit is sent to the interpolation capacitor that stores the voltage of the interrupted first demodulated audio signal. Then, the interpolation is started with a signal having the same change rate as the change rate at the time of interruption of the first demodulated audio signal. Thereby, the first
The demodulated audio signal and the interpolated signal have a smoothly continuous relationship. Further, as the second demodulated audio signal is sent, the current sent to the interpolation capacitor is continuously changed from the current corresponding to the output of the first differentiating circuit to the current corresponding to the output of the second differentiating circuit. Change to. This allows the second
When the transmission of the demodulated voice signal is started, the change rate of the interpolated signal is the same as the change rate of the second demodulated voice signal, and the interpolated signal and the second demodulated voice signal have a smooth and continuous relationship. Becomes

Embodiment An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a schematic block diagram showing an electrical configuration of a switching noise reduction circuit of the present invention.

In this embodiment, two heads are used to record and reproduce a carrier wave subjected to FM modulation.
The output signals of the first head 11 and the second head 12 pass through preamplifiers 13 and 14 provided correspondingly to terminals a of a head changeover switch 15 which is an analog switch for changing over the heads. It is entered in b.

The common terminal c of the head changeover switch 15 is
A demodulation audio signal S ₁ that is connected to a demodulation circuit 16 that demodulates an audio signal from a carrier wave, and a demodulation audio signal S ₁ that is an output of the demodulation circuit 16 passes through a noise reduction circuit 17 for reducing noise, and a delay circuit 18 that delays the signal. , And the second differentiating circuit 20. The output S ₃ of the delay circuit 18 is connected to the terminal a of the interpolation switch 22 including an analog switch and the first differentiating circuit 19.

A switching signal S ₄ indicating the timing of head switching is input to the head switching switch 15 and the pulse generating circuit 25, and the output of the pulse generating circuit 25 is the first differentiating circuit 19 and the second differentiating circuit. It is sent to the two differentiating circuits 20, the interpolation switch 22, and the voltage switching circuit 21a which is a component of the interpolation control circuit 21. Further, the voltage switching circuit 21a receives the differential outputs S ₅ and S ₆ from the first differentiating circuit 19 and the second differentiating circuit 20, and the output S ₇ of the voltage switching circuit 21a is the input voltage. It is sent to the current output circuit 21b that converts the current.

The output terminal of the current output circuit 21b is connected to the terminal b of the interpolation switch 22, and the cutoff frequency is connected to the common terminal c.
The input terminal of the low-pass filter 24 set to 20 kHz or less is connected to the other end of the interpolation capacitor 23 whose one end is grounded, and the output S ₈ of the low-pass filter 24 is sent to the outside as an audio signal.

Although not shown, each block in FIG. 1 is grounded as necessary.

Next, the operation of the switching noise reduction circuit configured as described above will be described with reference to the timing chart of FIG. Note that FIG. 2 shows the timing of main signals in the above embodiment.

The heads are switched by changing the level of the switching signal S ₄ from the “L” level to the “H” level at time T ₁ , and the connection of the head changeover switch 15 is switched from the terminal a to the terminal b. . By this switching, the transmission of the carrier wave from the first head 11 is interrupted, and the transmission of the carrier wave from the second head 12 is started. These carrier waves are demodulated by the demodulation circuit 16 and then demodulated audio signals.
It becomes S ₁ and is input to the noise reduction circuit 17, where the noise is removed and then output to the output terminal 17a.

Therefore, the output terminal 17a of the noise reduction circuit 17
The signal S ₂ output from the
Until the time T ₄ with slightly delayed time T ₁ has been switched with the head changeover switch 15, a first demodulated audio signal S ₁₀ based on the output of the first head 11 is sent, when it becomes time T ₅ The second demodulated audio signal based on the output of the second head 12.
S ₁₁ appears. The slight difference between the time T ₁ and the time T ₄ is due to the delay time due to the demodulation circuit 16 and the noise reduction circuit 17, and during the period t ₁ from T ₄ to T ₅ , the head changeover switch 15 This is an indefinite period in which the signal value is not determined due to the switching operation of.

Since the delay circuit 18 is a circuit that gives a delay of the period t ₂ ,
The output S ₃ is the output S ₂ of the noise reduction circuit 17 t ₂
The signal is delayed by the period [ ₁ ] (see FIG. 2B), and like the output S ₂ , there is an indefinite period of the period t ₁ .

Pulse generation circuit 25, for performing the generation of pulses according to the switching signal S _4, the switching signal S ₄ of the level is "H" time from the time T ₁ has changed in t ₂ to a level delay (this time delay t ₂ the delay circuit With a delay time of 18), the pulse signal S ₉ of “H” level [see FIG. 2 (h)] is generated during the period t ₃ . Then, this "H" level period t ₃ is set so that t ₃ = t ₂ . Further, the interpolation switch 22 performs a switching operation according to the output S ₉ of the pulse generation circuit 25, connects the common terminal c to the terminal b during the period t ₃ , and connects the common terminal c to the terminal a during the other periods. To do.

The first differentiating circuit 19 and the second differentiating circuit 20 differentiate the input signal and output the differentiated voltage, and the output S ₉ of the pulse generating circuit 25 becomes “H” level. At the time of (T ₂ ), the output of the differential voltage immediately before that is held, so the output S _{6 of} the second differential circuit 20
The Second diagram (c)], the at time T _2, is output differential voltage at the point P ₂ of the output S ₂ of the noise reduction circuit 17, during the period t _3, the transmission of this voltage is maintained . Its voltage is V ₁ . Also, the output S of the first differentiating circuit 19
₅ [See FIG. 2 (d)] shows that the point P of the output S ₃ of the delay circuit 18 is
The differential voltage V _{2 at 3} is output and held for the period t ₃ . This point P ₃ corresponds to the point P ₁ of the output S ₂ .

On the other hand, the voltage switching circuit 21a controls the output S of the pulse generating circuit 25.
By following the _9, at time T _2, and outputs the voltage V ₂ of the output S ₅ of the first differential circuit 19, the output voltage is continuously changed, when it becomes time T _3, the output The voltage is configured to be equal to the output voltage V ₁ of the second differentiating circuit 20. The output voltage in other periods is indefinite.

At time T ₂ , the connection of the common terminal c of the interpolation switch 22 is switched from the terminal a to the terminal b.
Since the interpolation capacitor 23 is connected to the common terminal c of the interpolation switch 22, the output S immediately after switching at time T ₂
Voltage of ₁₂ [Fig. 2 (f) see] is equal to the voltage of the point P ₃ of the output S _3.

Then, time T _2, after the interpolation capacitor 23 is to be connected to the current output circuit 21b, in accordance with the output current of the current output circuit 21b, the voltage across the interpolation capacitor 23 (voltage S ₁₂₎ is varied. The current of the current output circuit 21b at the time T ₂ is output by the first differentiating circuit 19 and the delay circuit
Since it is the current value corresponding to the differential coefficient at the point P ₃ of the output S ₃ of 18, the change in the voltage at the input of the low-pass filter 24 is
Since it has the same slope as the tangent line C ₂ , the delayed first demodulated voice signal S ₁₀ ′ and the interpolation signal S ₁₂ ′ become signals that smoothly and continuously change at the point P ₅ .

Since the output of the voltage switching circuit 21a linearly changes toward the output voltage V ₁ of the second differentiating circuit 20 after time T ₂ ,
Interpolation output S ₁₂ ′ shows a smooth quadratic change at time T
_As it goes to ₃ , its rate of change approaches that of the delayed second demodulated speech signal S ₁₁ ′ at point P ₆ .

The rate of change of the interpolated signal S ₁₂ ′ at time T ₃ becomes a value that matches the rate of change of the delayed second demodulated voice signal S ₁₁ ′. Further, the input of the low-pass filter 24 is the current output circuit 21b by the operation of the interpolation switch 22.
And is connected to the output of the delay circuit 18. Therefore, at the point P ₆ , the interpolated signal S ₁₂ ′ and the delayed second demodulated audio signal S ₁₁ ′ are smooth and continuous signals.

The demodulated voice signal thus guided to the low-pass filter 24 is sent out to the outside as a voice signal after the extra waveform of 20 kHz or more is removed by the low-pass filter 24.

In the above embodiment, the number of heads is two, but the number of heads may be 4, for example, in an apparatus using four heads.
The same can be applied.

Further, regarding the voltage switching circuit 21a, the configuration in which the output voltage changes in a primary manner has been described, but as another change, it is possible to adopt a configuration in which a secondary change occurs, for example.

(Effects of the Invention) As described above, according to the switching noise reduction circuit of the present invention, from the time when the transmission of the first demodulated audio signal is interrupted to the time when the transmission of the second demodulated audio signal is started. Since the signal for interpolating the interruption period and each demodulated voice signal have a smooth and continuous relationship, it is possible to prevent the occurrence of switching noise due to the influence of the phase of the demodulated voice signal and the timing of switching the head.

[Brief description of drawings]

FIG. 1 is a schematic block diagram showing an electrical configuration of a switching noise reduction circuit of the present invention, FIG. 2 is a timing chart showing timings of main signals of the circuit, and FIG. 3 is an operation of a conventional switching noise reduction circuit. It is explanatory drawing which shows a waveform. 11 ...... First head 12 ...... Second head 19 ...... First differentiation circuit 20 ...... Second differentiation circuit 21 ...... Interpolation control circuit 23 ...... Interpolation capacitor S ₁₀ ...... First demodulated voice Signal S ₁₁ ...... Second demodulated voice signal

Claims (1)

[Scope of utility model registration request] 1. Information recorded on a recording medium is sequentially demodulated by a single demodulation circuit while alternately switching two heads, and is also demodulated by a head which outputs before head switching. When the audio signal is the first demodulated audio signal and the audio signal demodulated by the head which outputs after switching the head is the second demodulated audio signal, the transmission of the first demodulated audio signal is interrupted. In the reproducing device having the function of interpolating the interruption period of the demodulated audio signal from when the transmission of the second demodulated audio signal is started, when the transmission of the first demodulated audio signal is interrupted, A first differentiating circuit for sending a differential voltage of the demodulated audio signal; a second differentiating circuit for sending a differential voltage of the demodulated audio signal when the sending of the second demodulated audio signal is started; An interpolating capacitor for storing the voltage of the demodulated audio signal when the output of the demodulated audio signal of 1 is interrupted; and a first differential in the interpolation capacitor when the output of the first demodulated audio signal is interrupted. The current corresponding to the output of the circuit is sent, the value of the current sent is continuously changed, and when the sending of the second demodulated audio signal is started, the second value is sent to the interpolation capacitor. A switching noise reduction circuit comprising: an interpolation control circuit that sends out a current corresponding to the output of a differentiating circuit.