JPH08272977A - Predictive encoding system decoding device - Google Patents

Abstract

PURPOSE: To decrease the necessary storage capacity of a frame memory as to a predictive encoding system decoding device which decodes an image encoded by a predictive encoding system. CONSTITUTION: Respective pictures which are encoded by the predictive encoding system are inputted to an decoding means 2 in the order of IPBBPBB.... The decoding means 2 performs decoding on the basis of them and further by referring a reference image read out of the frame 1. The decoding result is written in the frame memory 1. Those wiring to the frame memory 1 and reading from the frame memory 1 are carried out by specifying areas by a frame memory control means 3. There are the reference image and output image as images read out of the frame memory 1. The specification of the areas by the frame memory control means 3 is performed by a specifying means 3a. The specifying means 3a specifies one of 7 banks in the frame memory 1 for every two-divided part constituting an image in the input timing of a decoding control signal and an output control signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a predictive coding system decoding device for decoding an image coded by a predictive coding system, and more particularly to writing in a frame memory provided in the decoding device. And a predictive coding system decoding device characterized by address control for reading.

In recent years, there has been a demand for transmitting and accumulating data having a huge amount of information such as moving images. In order to meet such demands, H.264 is required for communication media such as videophones. 261 is defined as an encoding method, and CD-ROM, DAT (Digital Audio Ta
For storage media such as pe), encoding systems called MPEG1 and MPEG2 are defined.

[0003]

2. Description of the Related Art Conventionally, efficient compression of information is indispensable for digital transmission of moving images and realization of storage services. Therefore, as a moving image compression encoding method,
Various schemes have been investigated. Among them, inter-frame prediction is a method for defining the correlation in the time axis direction. In this method, when the first frame (image) is coded, all the information of this frame is coded, but for the subsequent frames, the difference from the previously coded frame is coded. It is a method to do. This method is particularly effective for images that are almost stationary or images in which only a part of the screen is moving.

From the above, inter-frame prediction is
The H.264 standard, which is an international standardization method for moving image coding, 261, MP
Used in EG1 and MPEG2. MPEG2 is
This is an extension of MPEG1 and is used for NTSC signals and PA.
This is a system in which an interlaced image such as an L signal can be efficiently coded, and each field can be coded as an independent image.

In the inter-frame predictive coding method, when decoding an image, since the previously decoded reproduced image is referred to, the decoding device must have a frame memory for storing the reference image. That is, as shown in FIG. 12A, it is assumed that there are images F1, F2, F3, ... Which are to be coded along the time axis. Inter-frame predictive coding is performed on these, and I, B, B, P, and
It is assumed that encoded images (pictures) B, B, P, B, B ... Are obtained. The I picture is an intraframe coded image, the P picture is an interframe forward (forward) predictive coded image, and the B picture is an interframe bidirectional (bidirectional) predictive coded image. The forward predictive coding is, for example, as shown by a broken-line arrow in FIG. 12A, for the frame F4, the difference between the frame F4 and the frame F1 is obtained and coding is performed. Bidirectional (bidirectional) predictive coding means, for example, a frame F as shown by a solid arrow in FIG.
For 2, the difference from the frame F1 and the difference from the frame F4 are obtained, and the interpolation (arithmetic mean) of both differences is encoded. The encoding is performed based on the already-encoded frames, so that the frames F1, F4, F2, F
3, F7, F5, F6 ... As a result, as shown in FIG. 12 (B), I1,
Each picture is sent in the order of P4, B2, B3, P7, B5, B6 .... The numbers added to these I, P, and B are matched with the frame numbers to show the correspondence with the frames.

Next, the procedure of decoding based on each sent picture will be described with reference to FIG. Each picture is
In the decoding device sent in the order of I1, P4, B2, B3, P7, B5, B6 ... First, the frame F1 is decoded by intra-frame prediction based on the picture I1. Next, based on the picture P4, the frame F4 is decoded by interframe forward prediction with reference to the frame F1. Then, based on the picture B2, the frame F2 is decoded by inter-frame bidirectional prediction (forward prediction based on the frame F1 and backward prediction based on the frame F3) with reference to the frames F1 and F4. Further, based on the picture B3, the frame F3 is decoded by inter-frame bidirectional prediction with reference to the frames F1 and F4. This decoded image is shown in FIG.

In order to output the image decoded by the decoding device from the decoding device and display it on the image display device, frames F1, F2, F3, F4, F5, F6, F7 ...
Since it is necessary to output in the order of, the output is arranged in order by delaying the decoding processing cycle by two cycles as shown in FIG.

[0008]

However, such a conventional inter-frame bidirectional prediction and frame rearrangement output requires a frame memory having a storage capacity of 4 frames, as shown in FIG. 13 (C). Become. On the other hand, the frame memory is expensive, and there has been a demand that the frame memory having a smaller storage capacity could somehow be able to decode the predictive coded signal.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a predictive coding system decoding device in which the storage capacity of a frame memory is reduced.

[0010]

In order to achieve the above object, the present invention, as shown in FIG. 1, decodes a coded signal and a frame memory 1 composed of an image storage portion for 3.5 frames. The decoding means 2 and the image decoded by the decoding means 2 are written in the frame memory 1, and
And a frame memory control unit 3 for reading the written image from the frame memory 1 and outputting it as a reference image to the decoding unit 2, and for reading the written image from the frame memory 1 and outputting it. A predictive coding method decoding device is provided.

Further, the frame memory control means 3 includes a designation means 3a for inputting a decoding control signal and an output control signal and designating an area in the frame memory 1 for each of these input timings.

[0012]

With the above construction, each picture coded by the predictive coding method is input to the decoding means 2 in the order of IPBBPBB. The decoding means 2 performs decoding based on these, further referring to the reference image read from the frame memory 1. The decoding result is written in the frame memory 1. The writing to the frame memory 1 and the reading from the frame memory 1 are performed by the frame memory control means 3 designating an area. The images read from the frame memory 1 include a reference image and an output image. The reference image is an image that the decoding unit 2 reads and refers to in order to perform forward prediction or bidirectional prediction, and the output image is, for example, an image that is output and displayed on the image display device 4 or the like.

The designation of the area by the frame memory control means 3 is performed by the designation means 3a.
Is a decoding control signal and an output control signal [FIG. 2 (A),
7C in the frame memory 1 at the input timing of (C)].
One of the two banks [FIG. 2 (E)] is designated for each of the two divided portions forming the image. The image is composed of two field images of the interlaced scanning system or images bisected in time of the non-interlaced scanning system.

The coded signal input to the decoding means 2 is
The format is I, P, B pictures, and the designating means 3a is
Of the two banks used for the decoded image by the B picture that is first input during the period of the I and P pictures [for example, F2 in FIG. 2 (B)], the previous bank [FIG.
The bank 4] in (E) is designated as the latter bank of the two banks to be used for the next decoded image by the B picture [for example, F3 in FIG. 2 (B)].

That is, as shown in FIG. 2 (E), the seven banks in the frame memory 1 are named bank 0 to bank 6, and the first half of the divided image is represented by t and the second half is represented by b. In this case, the decoded image F1t is written to bank 0, and similarly, F1b to bank 1 and F4t to bank 2.
, F4b to bank 3, F2t to bank 4, F2b
To bank 5 and F3t to bank 6, respectively.
At this point, there is no bank in which the next decoded image F3b should be written.

On the other hand, as shown in FIG. 2D, by the time T1, the output of the images F1t, F1b, F2t, F2b has been completed. The images F1t and F1b must be saved because they will be used as reference images in the future, but the images F2t and F2b are unnecessary because they have been output. The image F2b has a problem due to the time lag, but there is no problem even if the image F2t is erased by overwriting at this point. Therefore, the bank 4 in which the image F2t has been written is used for writing the next decoded image F3b.

Regarding the writing after the decoded image F7t, the above-mentioned writing is repeated, and the writing is performed without any trouble. In this way, the frame memory 1 has a capacity of 3.5 for the conventional 4 frames (corresponding to 8 banks).
It becomes possible to configure by the number of frames (7 banks), and the storage capacity of the frame memory can be reduced.

[0018]

Embodiments of the present invention will be described below with reference to the drawings. An embodiment of the present invention is a decoding device that handles an image created by an interlaced scanning method. The structure is shown in FIG.
As shown in FIG. 3, a frame memory 1 including an image storage portion for 3.5 frames, a decoding unit 2 for decoding an encoded signal, and an image decoded by the decoding unit 2 are written in the frame memory 1. At the same time, it comprises a frame memory control means 3 for reading out the written image from the frame memory 1 and outputting it as a reference image to the decoding means 2, and for reading out the written image from the frame memory 1 and outputting it.

The internal structure of the frame memory 1 is shown in FIG. That is, the frame memory 1 includes banks 0 to 6
Consists of One bank (region) has a storage capacity of half a frame, that is, a field image is stored in this embodiment. Therefore, the frame memory 1 has an image storage capacity of 3.5 frames.

Although not shown in the figure, the decoding means 2 is a CP.
It has a processor configuration including U, ROM, RAM, etc., or a hard logic configuration, and outputs a decoded image and outputs various signals to the frame memory control means 3 as described later.

FIG. 4 is a block diagram showing the internal structure of the frame memory 1 and the frame memory control means 3.
In the figure, a frame memory controller 5 and an address generator 6
Constitutes the frame memory control means 3.

A memory access type signal, a decoding control signal, an output control signal, and a relative address [Y] (vector value) are input from the decoding means 2 to the frame memory control section 5. The memory access type signal indicates the type of image written to or read from the frame memory 1, and is a signal indicating any of a reference image, a decoded image, and a display (output) image. The decoding control signal is a timing signal having the same cycle as the cycle in which each picture I, P, B coded by the predictive coding method is input to the decoding means 2, and the decoding means 2 responds to this signal by the decoding means 2. Decrypt. The output control signal has the same cycle as the decoding control signal and is a timing signal generated with a half cycle deviation from the cycle of the decoding control signal. In accordance with this output control signal, the restored image is output to the outside and is displayed and various signal processes are performed. In the following description, it is assumed that image display is performed by the image display device 4. The relative address [Y] is an address representing a scanning position within the frame image.

Based on the memory access type signal, the decoding control signal, the output control signal, and the relative address [Y], the frame memory control unit 5 should write or read an image in which bank of the frame memory 1. Decide This determination procedure will be described later with reference to the flowcharts shown in FIGS. The relative address [Y] is used by the frame memory control unit 5 to determine one of the two banks corresponding to one image.

The frame memory controller 5 outputs the offset address [X] (vector value) of the determined bank to the address generator 6. Offset address [X]
Represents the starting address of the bank in the frame memory 1. The relative address [Y] is sent from the decoding means 2 to the address generator 6, and the offset address [X] is sent.
And the address generator 6 calculates the real address [Z] (vector value) based on the relative address [Y]. The real address [Z] is an address representing a scanning position in the frame memory 1. This will be described with reference to FIG.

FIG. 5 shows the arrangement of banks in the frame memory 1, and the starting point positions of the banks 0 to 6 are indicated by O _{0 to} O ₆ . The offset address [X] in the illustrated drawing designates the starting point O _{6 of the} bank 6, and the relative address [Y] indicates the scanning position viewed from the starting point O _{6 of the} bank 6. The real address [Z], which is the scanning position seen from the starting point O ₀ of the frame memory 1 (which is the same as the starting point of bank 0), is
It is calculated as [X] + [Y]. This real address [Z] is sent to the frame memory 1.

A read / write control signal is sent from the decoding means 2 to the frame memory 1 in accordance with the memory access type signal. That is, when the memory access type signal is the reference image, the read control signal is sent, when it is the decoded image, the write control signal is sent, and when it is the display image, the read control signal is sent. When the memory access type signal is the decoded image, the decoding means 2 sends the decoded image data to the frame memory 1. The frame memory 1 reads an image from the scanning position designated by the real address [Z] according to the read / write control signal and sends it to the decoding means 2 or the image display device 4, or designates it by the real address [Z]. The image sent from the decoding means 2 is written in the designated scanning position. Such image reading and writing is performed in bank units. Therefore, it can be said that this is performed in field image units.

FIGS. 6 and 7 are diagrams showing the transition of the usage state of each bank of the frame memory 1, and the horizontal axis shows time. (A) and (E) show generation timings of the decoding control signal and the output control signal, respectively, and (B) shows
The bank in which the decoded field image is written is shown, (C) shows the bank in which the field image read out as the forward (forward) reference image and sent to the decoding means 2 was stored, (D) ) Indicates the bank in which the field image read out as the backward (reverse direction) reference image and sent to the decoding means 2 was stored, and (F) indicates
The bank in which the field image read out as a display image and sent to the image display device 4 is stored is shown.
(G) shows a period in which the field image decoded by the decoding means 2 is written in the frame memory 1,
(H) indicates a period in which the field image to be sent to the image display device 4 is read from the frame memory 1,
(I) indicates a field image stored in the bank 4. In the figure, F1 to F7 are the frame codes of the field images stored in the corresponding banks, and the field image generated first among the two field images forming the frame image is indicated by t, and later. The field image generated is shown by b.

First, the decoding means 2 receives the picture I1 (intra-frame predictive coded signal relating to the frame F1) coded by the predictive coding method and the decoding control signal [FIG. 6 (A)], and performs decoding. The field image F1t obtained as a result is then sent to the frame memory 1 as well as the field image F1b, and a memory access type signal called a decoded image is sent to the frame memory control unit 5. The decoding means 2 also sends a write control signal to the frame memory 1. The frame memory control unit 5 first selects bank 0 and then bank 1 according to the value of the relative address [Y]. This selection method will be described later with reference to FIG. As a result, the frame memory 1 writes the field image F1t in the bank 0, and then writes the field image F1t.
1b is written in bank 1 [FIG. 6 (B)].

Next, the decoding means 2 receives the picture P4 (inter-frame forward predictive coding signal regarding the frame F4) and the decoding control signal [FIG. The memory access type signal. Further, the decoding means 2 is the frame memory 1
Send a read control signal to. The frame memory control unit 5 is
According to the value of the relative address [Y], bank 0 is first selected and then bank 1 is selected. This selection method will be described later with reference to FIG. As a result, the frame memory 1 reads the field image F1t from the bank 0,
Next, the field image F1b is read from the bank 1,
It is sent to the decryption means 2 [FIG. 6 (C)]. The decryption means 2 is
While referring to the sent field images F1t and F1b, the inter-frame forward predictive coding is decoded based on the picture P4, and the resulting field image F4 is obtained.
Then, the field image F4b is sent to the frame memory 1 and a memory access type signal called a decoded image is sent to the frame memory controller 5. Also, the decryption means 2
Sends a write control signal to the frame memory 1. The frame memory control unit 5 changes the relative address [Y] according to the value of
First, bank 2 is selected, and then bank 3 is selected. This selection method will be described later with reference to FIG. As a result, the frame memory 1 writes the field image F4t in the bank 2 and then writes the field image F4b in the bank 3 [FIG. 6 (B)].

When the decoding means 2 receives the output control signal [FIG. 7 (E)] while receiving the picture P4, it sends a memory access type signal called a display image to the frame memory control section 5. The decoding means 2 also sends a read control signal to the frame memory 1. The frame memory control unit 5 first selects the bank 0 according to the value of the relative address [Y],
Next, bank 1 is selected. Figure 1 shows this selection method.
It will be described later with reference to FIG. As a result, the frame memory 1
Reads the field image F1t from bank 0, then reads the field image F1b from bank 1, and sends it to the image display device 4 [FIG. 7 (F)].

Next, the decoding means 2 receives the picture B2 (inter-frame bidirectional predictive coded signal relating to the frame F2) and the decoding control signal [FIG. 6 (A)], and first, the decoding means 2 calls the frame memory control section 5 a reference image. Send the memory access type signal. Further, the decoding means 2 is the frame memory 1
Send a read control signal to. The frame memory control unit 5 is
According to the value of the relative address [Y], bank 0 is first selected and then bank 1 is selected. This selection method will be described later with reference to FIG. As a result, the frame memory 1 reads the field image F1t from the bank 0,
Next, the field image F1b is read from the bank 1,
It is sent to the decryption means 2 [FIG. 6 (C)]. Further, the decoding means 2 sends a memory access type signal called a reference image to the frame memory control section 5. The decoding means 2 also sends a read control signal to the frame memory 1. The frame memory control unit 5 first selects the bank 2 and then the bank 3 according to the value of the relative address [Y]. This selection method will be described later with reference to FIG. This allows
The frame memory 1 includes the field image F4 from the bank 2.
t, and then field image F4 from bank 3
b is read out and sent to the decoding means 2 [FIG. 6 (D)].

Then, the decoding means 2 decodes the inter-frame bidirectional predictive coding based on the picture B2 while referring to the sent field images F1t, F1b and F4t, F4b, and the result is obtained. The field image F2t, then the field image F2b are sent to the frame memory 1, and a memory access type signal called a decoded image is sent to the frame memory control unit 5. The decoding means 2 also sends a write control signal to the frame memory 1. The frame memory control unit 5 first selects the bank 4 and then the bank 5 according to the value of the relative address [Y].
This selection method will be described later with reference to FIG. As a result, the frame memory 1 writes the field image F2t in the bank 4 and then writes the field image F2b in the bank 5 (FIG. 6 (B)).

When the decoding means 2 receives the output control signal [FIG. 7 (E)] while receiving the picture B2, it sends a memory access type signal called a display image to the frame memory control section 5. The decoding means 2 also sends a read control signal to the frame memory 1. The frame memory control unit 5 first selects the bank 4 according to the value of the relative address [Y],
Next, bank 5 is selected. Figure 1 shows this selection method.
It will be described later with reference to FIG. As a result, the frame memory 1
Reads the field image F2t from the bank 4, then reads the field image F2b from the bank 5, and sends it to the image display device 4 [FIG. 7 (F)]. Since the writing of the field image F2t to the bank 4 and the reading from the field image F2t are shifted by a half cycle of the decoding control signal,
You can definitely read it. There is no problem between the bank 5 and the field image F2b.

Next, the decoding means 2 receives the picture B3 (inter-frame bidirectional predictive coded signal relating to the frame F3) and the decoding control signal [FIG. 6 (A)], and the decoding means 2 first calls the frame memory control section 5 a reference image. Send the memory access type signal. Further, the decoding means 2 is the frame memory 1
Send a read control signal to. The frame memory control unit 5 is
According to the value of the relative address [Y], bank 0 is first selected and then bank 1 is selected. This selection method will be described later with reference to FIG. As a result, the frame memory 1 reads the field image F1t from the bank 0,
Next, the field image F1b is read from the bank 1,
It is sent to the decryption means 2 [FIG. 6 (C)]. Further, the decoding means 2 sends a memory access type signal called a reference image to the frame memory control section 5. The decoding means 2 also sends a read control signal to the frame memory 1. The frame memory control unit 5 first selects the bank 2 and then the bank 3 according to the value of the relative address [Y]. This selection method will be described later with reference to FIG. This allows
The frame memory 1 includes the field image F4 from the bank 2.
t, and then field image F4 from bank 3
b is read out and sent to the decoding means 2 [FIG. 6 (D)].

Then, the decoding means 2 decodes the inter-frame bidirectional predictive coding based on the picture B3 while referring to the sent field images F1t, F1b and F4t, F4b, and the result is obtained. The field image F3t, and then the field image F3b are sent to the frame memory 1 and a memory access type signal called a decoded image is sent to the frame memory control unit 5. The decoding means 2 also sends a write control signal to the frame memory 1. The frame memory control unit 5 first selects the bank 6 and then the bank 4 according to the value of the relative address [Y].
This selection method will be described later with reference to FIG. 8 (step S8). As a result, the frame memory 1 writes the field image F3t in the bank 6, and then writes the field image F3b in the bank 4 [FIG. 6 (B)]. Field image F2 previously stored in bank 4
Since t has already been used for display and is not used as a reference image, there is no problem even if it is overwritten by the field image F3t. That is, FIG.
As shown in (I), the bank 4 has a field image F2.
After t is written, the field image F2t is read during the period shown by the hatched portion in FIG.
There is no problem even if the field image F3b is written in the bank 4 during the period shown by the hatched portion in FIG. 7 (G).

When the decoding means 2 receives the output control signal [FIG. 7 (E)] while receiving the picture B3, it sends a memory access type signal called a display image to the frame memory control section 5. The decoding means 2 also sends a read control signal to the frame memory 1. The frame memory control unit 5 first selects the bank 6 according to the value of the relative address [Y],
Next, bank 4 is selected. Figure 1 shows this selection method.
It will be described later with reference to FIG. As a result, the frame memory 1
Reads out the field image F3t from the bank 6, then reads out the field image F3b from the bank 4, and sends it to the image display device 4 [FIG. 7 (F)]. Note that, also here, since the writing of the field image F3t to the bank 6 and the reading from the field image F3t are deviated by a half cycle of the decoding control signal, the reading can be surely performed. Similarly, there is no problem between the bank 4 and the field image F3b.

The operation following the picture input is similar to the above. Next, a procedure for selecting a bank by the frame memory control unit 5 will be described. FIG. 8 is a flowchart showing a procedure for selecting a bank to write the decoded field image. The steps will be described below in order of step number.

[S1] Wait for the input of the decoding control signal, and when the decoding control signal is input, proceed to the next step. [S2] Bank 0 is selected as the bank Dt in which the first field image of the decoded frame image is to be written, and the bank Db in which the second field image is to be written
Select bank 1 as This corresponds to the input of the picture I1 in FIG. The first field image is a field image formed by odd-numbered scanning lines, and the second field image is a field image formed by even-numbered scanning lines.

[S3] The input of the next decoding control signal is awaited, and when the decoding control signal is input, the process proceeds to the next step. [S4] It is determined whether or not the picture when the decoding control signal is input is I or P. If it is I or P, the process proceeds to step S5, and if it is B, the process proceeds to step S6.

[S5] As the bank Dt, the bank (St) _{p in} which the first field image of the forward prediction reference images was stored when the decoding control signal was previously input is selected, and the bank Db is selected. As a selection, the bank (Sb) _{p in} which the second field image of the forward prediction reference images was stored when the decoding control signal was input last time is selected.
For example, when the picture P4 in FIG. 6B is input, the bank 2 [bank 2 when the picture I1 is input in FIG. 6C] is selected as the bank Dt. Also, for example, in FIG.
When the picture P7 of (B) is input, the bank Db is used as the bank 1 [the image F when the picture B3 of FIG. 6C is input.
1b in which 1b was stored is selected.

[S6] It is determined whether or not the picture at the previous input of the decoding control signal is I or P. If it is I or P, that is, if it is the input of the first picture B of the pictures B input twice in succession, the process proceeds to step S7, while the second picture B is input.
If the input is, the process proceeds to step S8.

[S7] As the bank Dt, the bank with the smallest number among the empty banks in the frame memory 1 is selected. Further, as the bank Db, the bank with the next smallest number is selected from among the empty banks in the frame memory 1. However, a field image decoded based on a B picture and written in a predetermined bank is deleted from the bank when it is output for display. Therefore, the bank is in a free state.

This step is executed, for example, when the picture B2 is input, and the banks 4, 5 and 6 are in an empty state until just before the input of the picture B2. Therefore, as shown at the time of inputting the picture B2 in FIG. 6B, the bank 4 is selected as the bank Dt and the bank 5 is selected as the bank Db.

[S8] As the bank Dt, the bank with the smallest number among the empty banks in the frame memory 1 is selected. In addition, as the bank Db, when the decoding control signal is input last time, the first of the decoded frame images
The bank (Dt) _{p in} which the field image of is written is selected. This step is executed, for example, when the picture B3 is input, and the bank 6 is in an empty state until just before the input of the picture B3. Therefore, FIG.
As shown when the picture B3 in (B) is input, the bank Dt
Bank 6 as the bank, and bank 4 as the bank Db.
[Frame image F2 when picture B2 in FIG. 6B is input
The bank 4 in which t was stored] is selected.

Next, FIG. 9 is a flowchart showing the procedure for selecting the bank from which the reference image for forward prediction should be read. The steps will be described below in order of step number. [S11] Wait for the input of the decoding control signal, and when the decoding control signal is input, proceed to the next step.

[S12] Further, the input of the next decoding control signal is awaited, and when the decoding control signal is input, the process proceeds to the next step. This corresponds to that there is no writing in the banks 2 and 3 when the picture I1 in FIG. 6C is input.

[S13] It is determined whether or not the picture when the decoding control signal is input is I or P. I or P
If so, the process proceeds to step S14, and if B,
The bank is not selected and the process returns to step S12.

[S14] First reference image for forward prediction
The bank St in which the first field image of the reference image for backward prediction was stored at the time of the previous input of the decoding control signal (R)
t) select _p and select the second reference image for forward prediction.
As the bank Sb to the field is read, the bank where the second field image is stored in the reference image for backward prediction in the previous input of the decoding control signal (Rb) _p
Select For example, when the picture P4 in FIG. 6C is input, bank 0 [bank 0 in which the image F1t was stored when the picture I1 in FIG. 6D was input] is selected as the bank St. Further, for example, the picture P in FIG.
In case of 7 inputs, the bank Sb is bank 3 [FIG.
The bank 3 in which the image F4b was stored when the picture B3 in (D) was input is selected.

Next, FIG. 10 is a flow chart showing the procedure for selecting the bank from which the reference image for backward prediction should be read. The steps will be described below in order of step number. [S21] Wait for the input of the decoding control signal, and when the decoding control signal is input, proceed to the next step.

[S22] It is determined whether or not the picture when the decoding control signal is input is I or P. I or P
If so, go to step S23, and if B,
The bank is not selected and the process returns to step S21.

[S23] First reference image for backward prediction
The bank Rt from which the first field image is stored is selected as the bank Rt from which the first field image is to be read, and the reference image for backward prediction is selected. As the bank Rb from which the second field image is to be read, the bank Db in which the second field image of the images decoded at this time of the decoding control signal was stored was selected.
For example, when the picture P4 in FIG. 6D is input, the bank 2 [bank 2 in which the image F4t was stored when the picture P4 in FIG. 6B was input] is selected as the bank Rt. Further, for example, when the picture P7 in FIG. 6D is input, the bank 1 is the bank Rb [bank 1 in which the image F7b was stored when the picture P7 in FIG. 6B was input].
Select

Finally, FIG. 11 is a flow chart showing the procedure for selecting the bank from which the image for display is to be read. The steps will be described below in order of step number. [S31] Wait for the input of the output control signal, and when the output control signal is input, proceed to the next step.

[S32] It is determined whether or not the picture when the output control signal is input is I or P. I or P
If so, the process proceeds to step S33, and if B, the process proceeds to step S34.

[S33] As the bank Ht from which the first field image of the display image is to be read, the bank from which the first field image of the forward prediction reference image is read when the output control signal is input this time. St is selected, and the second field image of the reference image for forward prediction is read out at the time of the input of the output control signal as the bank Hb from which the second field image of the image for display is to be read out. Select the bank Sb. For example, when the picture P4 in FIG. 7F is input, bank 0 [bank 0 in which the image F1t was stored when the picture P4 in FIG. 6C was input] is selected as the bank Ht. Also, for example, in FIG.
If the picture P7 of (F) is input, the bank Hb is set as the bank 3 [image F of the picture P7 of FIG. 6 (C) is input.
4b in which bank 4b was stored] is selected.

[S34] As the bank Ht, the bank Dt in which the first field image of the images decoded at this time of the output control signal was stored was selected, and
As the bank Hb, the bank Db in which the second field image among the images decoded at this time of the output control signal was stored was selected. For example, when the picture B2 in FIG. 7F is input, the bank 4 [bank 4 in which the image F2t was stored when the picture B2 in FIG. 6B was input] is selected as the bank Ht. Also, for example, in FIG.
When the picture B3 of (F) is input, the bank Hb is set as the bank 4 [the image F when the picture B3 of FIG. 6B is input.
3b in which bank 3b was stored] is selected.

Thus, the address control (bank selection) of the frame memory 1 as described above is performed for writing the decoded image, reading the reference image, and reading the image for display. The frame memory 1 composed of only one bank can fulfill a sufficient function. As a result, the storage capacity of the frame memory can be reduced.

Although the above embodiment has been described with respect to the decoding device which handles the image of the interlace scanning system, the present invention is also applicable to the decoding device which handles the image of the non-interlace scanning system. is there. That is, in the above embodiment, the image is divided into the first and second field images and the bank is selected for each field image. Instead of this, the image of the non-interlaced scanning method is divided into the upper and lower two.
Alternatively, the bank may be selected for each divided image. In the non-interlaced scanning method, the upper divided image and the lower divided image can be clearly separated in time, and therefore the bank selection for each of the upper and lower divided images can be performed in exactly the same manner as in the above embodiment.

[0058]

As described above, according to the present invention, at the input timing of the decoding control signal and the output control signal, any one of the seven banks in the frame memory is designated for every two divided portions forming an image. . By such address control of the frame memory, the storage capacity of the frame memory can be reduced from the conventional 4 frames to 3.5 frames.

[Brief description of drawings]

FIG. 1 is a diagram illustrating the principle of the present invention.

FIG. 2 is an operation explanatory diagram of the present invention.

FIG. 3 is a configuration diagram of a frame memory.

FIG. 4 is a partial configuration diagram of an embodiment.

FIG. 5 is an explanatory diagram of addresses of a frame memory.

FIG. 6 is a diagram (1) showing a state transition of each bank of the frame memory.

FIG. 7 is a diagram (2) showing a state transition of each bank of the frame memory.

FIG. 8 is a decoding bank selection flowchart.

FIG. 9 is a flowchart for selecting a forward prediction reference bank.

FIG. 10 is a flowchart for selecting a backward prediction reference bank.

FIG. 11 is a flowchart for selecting a display bank.

FIG. 12 is a diagram showing a conventional predictive coding method.

FIG. 13 is a diagram showing a conventional decoding and display procedure.

[Explanation of symbols]

 1 frame memory 2 decoding means 3 frame memory control means 3a designation means 4 image display device

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yukio Otobe 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited (72) Inventor, Katsuki Miyawaki 1015, Kamikodanaka, Nakahara-ku, Kawasaki, Kanagawa Prefecture, Fujitsu Limited ( 72) Inventor Hideki Miyasaka 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Limited (72) Inventor Takahiro Kobayakawa 3-22-8 Hakataekimae, Hakata-ku, Fukuoka, Fukuoka Inside Fujitsu Kyushu Digital Technology Co., Ltd.

Claims (7)

[Claims] 1. A predictive coding method decoding device for decoding an image coded by the predictive coding method, a frame memory including an image storage portion for 3.5 frames, and decoding a coded signal. Decoding means, writing the image decoded by the decoding means to the frame memory, reading the written image from the frame memory, outputting it as a reference image to the decoding means, and writing the image. A predictive coding method decoding device, comprising: a frame memory control unit that reads out and outputs the stored image from the frame memory. 2. The frame memory control means includes a designation means for inputting a decoding control signal and an output control signal, and designating an area in the frame memory for each input timing of these signals. The predictive coding method decoding device described. 3. The predictive coding according to claim 2, wherein the output control signal has the same period as the decoding control signal and is out of phase with a half period of the decoding control signal. Method decoding device. 4. The image decoded by the decoding means is composed of two divided images, the frame memory is composed of seven banks, and the designating means designates a bank for each of the divided images. The predictive coding system decoding device according to claim 2, wherein 5. The coded signal input to the decoding means is in the I, P, B picture format, and the designating means assigns to the B picture input first in the cycle of the I, P pictures. The bank of the two used correspondingly is designated as the bank of the latter of the two banks to be used corresponding to the next input B picture. Item 4. The predictive coding method decoding device according to Item 4. 6. The image encoded by the decoding means is an interlaced scanning image, and the two divided images are a first field image and a second field image. The predictive coding method decoding device described. 7. The image encoded by the decoding means is a non-interlaced scanning type image, and the two divided images are obtained by temporally dividing the image encoded by the decoding means into two. The predictive coding system decoding device according to claim 4, wherein the predictive coding system decoding device is an image.