JPH08272501A - Termination circuit of memory module - Google Patents

Abstract

PURPOSE: To enable the effective termination of a bus signal to be executed regardless of the mounting conditions of a memory module at the time of constituting an electronic computer main memory by the memory module. CONSTITUTION: The termination circuit is constituted of a mounting judging circuit 6 judging whether or not the memory modules 2 are mounted on respective sockets 1 and a selecting circuit 7 selecting the one which is located farthest from the output end of a bus signal drive IC4 within the memory modules 2 judged to be mounted by the mounting judging circuit 6 so as to operate an active terminator 8 which is fitted in the neighborhood of the socket 1 for the memory module 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bus signal termination circuit for a memory module of an electronic computer.

[0002]

2. Description of the Related Art When a main memory of an electronic computer is composed of memory modules, it is common to prepare a required maximum number of sockets 1 and mount a required minimum number of memory modules 2 as shown in FIG. is there. At this time, the termination of the bus signal 3 is performed by the terminator 5 at a position (the end) physically farthest from the output end of the bus signal drive IC 4.

[0003]

Memory module 2
Are to be mounted in order from the output end of the bus signal drive IC4. At this time, the prepared socket 1
In many cases, the number of memory modules 2 mounted is smaller than the number of the memory modules 2, and the physical distance from the memory module 2 farthest from the output end of the bus signal drive IC 4 to the terminator 5 becomes long, and the effect of termination is reduced. . Therefore, an object of the present invention is to improve the effect by performing termination in the vicinity of the memory module farthest from the output end of the bus signal drive IC among the mounted memory modules.

[0004]

[MEANS FOR SOLVING THE PROBLEMS] A mounting determination circuit for determining whether or not a memory module is mounted in each socket, and a bus signal drive of the memory modules determined to be mounted by this mounting determination circuit IC
Select the memory module farthest from the output end of
And a selection circuit for operating an active terminator mounted in the vicinity of the socket for the memory module.

[0005]

The mounting determination circuit determines whether or not the memory module is mounted in each socket, and the memory module mounted in the vicinity of the socket for the memory module farthest from the output end of the bus signal drive IC is mounted. The active terminator is operated by the selection circuit. In this way, the bus signal is always effectively terminated regardless of the mounting status of the memory module.

[0006]

Embodiments of the present invention will be described below with reference to FIGS. FIG. 1 is a block diagram of an embodiment of the present invention. Suppose there are m sockets 1 for memory modules 2 from No. 1 to No. m, and n memory modules 2 from No. 1 to No. n are mounted.
(However, m is a number larger than n.) The mounting determination circuit 6 determines whether or not the memory module 2 is mounted in each socket 1. As a result, No. 1 to No.
The mounting determination circuits 6 up to No. output the mounted (output value: 1), and the mounting determination circuits 6 from No. n + 1 to No. m output the unmounted (output value: 0). All the outputs from the mounting determination circuit 6 are input to the selection circuit 7, and the outputs from No. 1 to No.
Any one of m active terminators 8 up to m is selected and an operation signal (output value: 1) is output. In the case of this example, an operation signal (output value: 1) is output to the No. n active terminator 8. A non-operation signal (output value: 0) is output to the other active terminators 8. As a result, the termination can be performed in the vicinity of the socket 1 (No. n socket 1) for the memory module 2 farthest from the output end of the bus signal drive IC 4 of the mounted memory modules 2.

FIG. 2 shows an example of the mounting determination circuit 6. One end of the signal wired in a loop in the memory module 2 is set to the GND level (0V), and the other end is output from the DC voltage through the pull-up resistor 9 for mounting determination. When the memory module 2 is mounted, G
The ND level (output value: 1) is output, and when not mounted, the DC voltage level (output value: 0) is output.

FIG. 3 shows an example of the selection circuit 7. IN1
To INm are outputs from the m mounting determination circuits 6. Also, from ACT1 to ACTm, m
These are output signals to the respective active terminators 8. For example, a truth table of the output ACTk to the No. k active terminator 8 is shown in the figure. In the figure, 1 indicates valid, 0 indicates invalid, and X indicates indefinite. In the case shown in FIG. 1, since the value of INn is 1 and the value of INn + 1 is 0, the value of ACTn becomes 1 and the No. n active terminator 8 operates.

4 to 7 show other examples of the mounting determination circuit 6. In FIG. 4, one end of a signal wired in a loop in the memory module 2 is set as a DC voltage level, and the other end is pulled down from GND (0V) to a pull-down resistor 10
It is used as the output of the mounting determination through the. In FIG. 5, a signal generator 11 is attached to one end of a signal wired in a loop in the memory module 2 to output a signal whose level changes (pulse signal, rising signal, falling signal), and a return signal thereof. The implementation is determined by the presence or absence of. Figure 6 shows the GND (0V) in the memory module 2.
The signal is output from the DC voltage via the pull-up resistor 9 for mounting determination. FIG. 7 shows that the DC voltage signal in the memory module 2 is output from GND (0V) through the pull-down resistor 10 for mounting determination.

[0010]

As described above, according to the present invention, it is determined that a memory module is mounted in each socket, and which of the mounted memory modules is farthest from the output end of the bus signal drive IC. By selecting one of them and operating an active terminator attached near the memory module, the bus signal can always be effectively terminated regardless of the mounting condition of the memory module.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a diagram illustrating an example of a mounting determination circuit.

FIG. 3 is a diagram showing an example of a selection circuit.

FIG. 4 is a diagram showing another example of a mounting determination circuit.

FIG. 5 is a diagram showing another example of a mounting determination circuit.

FIG. 6 is a diagram showing another example of a mounting determination circuit.

FIG. 7 is a diagram showing another example of a mounting determination circuit.

FIG. 8 is a block diagram showing a conventional termination circuit.

[Explanation of symbols]

 1 socket 2 memory module 3 bus signal 4 bus signal drive IC 5 terminator 6 mounting judgment circuit 7 selection circuit 8 active terminator 9 pull-up resistor 10 pull-down resistor 11 signal generator

Claims (1)

[Claims] 1. A mounting determination circuit for determining whether or not a memory module is mounted in each socket, and an output terminal of a bus signal drive IC of the memory modules determined to be mounted by this mounting determination circuit. The termination circuit of the memory module, which includes a selection circuit that selects the memory module that is farthest from, and operates the active terminator installed near the socket for the memory module.