JPH08251136A - Signal transmission device/method and signal reception device/method - Google Patents

Abstract

PURPOSE: To speedily and easily reproduce a carrier and a clock on a reception side by transmitting the carrier of a frequency which is not used for the transmission of an information system and in which one-to-integer time of a second period becomes a period as a reference. CONSTITUTION: The respective carriers of an orthogonal frequency division multiplex system(OFDM) correspond to the coefficient numbers '0' to '23' of a discrete Fourier transformer(DFT). Data '0' is allocated to the coefficient numbers 0, 2, 20, 22 and 23 so as to prevent outputs from being actually emitted. Actual transmission information are allocated to DFT coefficient numbers '3' to '19' and DFT coefficient numbers '1' and '21' are set to be carriers f1 and f21 for reference for carrier reproduction and clock reproduction. The carriers which are not used for the transmission of the information system among the carriers of the frequency in which one-to-integer time of a guard interval becomes one period are used for the carriers f1 and f2 .

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal transmitting apparatus and method and a signal receiving apparatus and method, and in particular to OFDM.
The present invention relates to a signal transmission device and method, and a signal reception device and method, which are suitable for use in carrier recovery and clock recovery in a system.

[0002]

2. Description of the Related Art Conventionally, in order to transmit a digital signal, one carrier wave is provided, and the digital signal is modulated by changing the phase and amplitude of the carrier wave at high speed corresponding to the input digital signal. Phase modulation (PSK: Phase Shift Keying) as a method of changing only the phase
The quadrature modulation (QAM: Quadrature Ampli) is a method for changing both amplitude and phase.
The Tude Modulation method is well known.

As described above, in the past, one carrier was modulated at such a high speed as to fit within the transmission band, but recently, orthogonal frequency division multiplexing (OFDM: Orthogonal).
Frequency Division Multi
A modulation method called plex) has been proposed. This OFDM system is a system in which a large number of orthogonal carrier waves are provided in a transmission band and each carrier wave is digitally modulated by PSK or QAM. Since this system divides the transmission band by a large number of carriers, the band per carrier wave becomes narrow and the modulation speed becomes slow. However, since there are a large number of carriers, the total transmission speed is the same as that of the conventional modulation system. does not change.

In this OFDM system, since a large number of carriers are transmitted in parallel, the symbol rate becomes slow. In a transmission line where so-called multipath interference exists, the time length of the multipath relative to the time length of the symbol is set. Can be shortened. Therefore, this method can be said to be a strong method against multipath interference, and due to such characteristics, particular attention is paid to the transmission of digital signals by terrestrial waves which are strongly affected by multipath interference.

Also, due to recent advances in semiconductor technology, it is possible to realize discrete Fourier transform and discrete Fourier inverse transform by hardware, and by using this, OF can be easily performed.
One of the reasons why the OFDM system has been drawing attention is that the DM system can be modulated and vice versa.

Inventions relating to such an OFDM system are disclosed in, for example, Japanese Patent Application Laid-Open No. 5-167633, Japanese Patent Application Laid-Open No. 5-284143, Japanese Patent Application Laid-Open No. 5-219006, and Japanese Patent Application Laid-Open No. 5-219021. It is disclosed.

FIG. 8 shows an example of the configuration of a conventional transmitter using such an OFDM system. I channel input signal and Q channel input signal are serial / serial
It is input to the parallel converters (S / P) 1 and 3, and is input to a discrete inverse Fourier transformer (IDFT: Inversed Dis).
parallel data supplied to the create Fourier Transform 2). The discrete inverse Fourier transformer 2 converts this parallel data into a discrete inverse Fourier transform (ID
FT) to convert the frequency domain signal into a time domain signal.

The parallel time domain signal of the I and Q signals obtained in this way is converted into a parallel / serial converter (P
/ S) 4 and 10, the signals are temporally converted into serial signals, and so-called guard intervals are added by buffer memories 5 and 11, and then input to D / A converters 6 and 12. The outputs of the D / A converters 6 and 12 are supplied to the low-pass filters 7 and 13 in order to remove the aliasing components, and then to the multipliers 8 and 14 for modulation.

The multiplier 8 outputs the output of the local oscillator 15 to 90
The signal shifted by 90 ° by the phase shifter 16 and the output of the local oscillator 15 are supplied to the multiplier 14 as they are. The outputs of the multipliers 8 and 14 are added to the adder 9
Then, only the signal in the predetermined intermediate frequency band is taken out by the bandpass filter (BPF) 17, the frequency is converted by the RF converter 18, and the signal is transmitted from the transmitting antenna 19 as a transmitting signal. .

Next, the operation will be described. The I signal and the Q signal are converted from serial data to parallel data in the serial / parallel converters 1 and 3, respectively, and then input to the discrete inverse Fourier transformer 2, where the IDFT is performed.
It is processed. This processing is performed in symbol units.

The I and Q signals IDFT-processed by the discrete inverse Fourier transformer 2 are converted from parallel data to serial data by the parallel / serial converters 4 and 10, respectively, and then stored in the buffer memories 5 and 11. Each is input and stored. Then, a guard interval having a predetermined width is added there. This guard interval is added to reduce the influence of the ghost.

I output from the buffer memories 5 and 11
The signal and the Q signal are D / A converted by the D / A converters 6 and 12.
After the conversion, the low-pass filters (LPF) 7 and 13 remove the aliasing components, and then input to the multipliers 8 and 14, respectively.

In the multiplier 8, the low pass filter 7
The input I signal component is multiplied by the carrier wave output from the local oscillator 15 and phase-shifted by 90 ° by the 90 ° phase shifter 16. In the multiplier 14, the Q signal component output from the low-pass filter 13 is multiplied by the carrier wave whose phase shift output by the local oscillator 15 is not shifted by 90 °.

The adder 9 outputs the output of the multiplier 8 and the multiplier 1
The output of 4 is added and output to the band pass filter 17. The bandpass filter 17 extracts only a signal in a predetermined intermediate frequency band and outputs it to the RF converter 18.
The RF converter 18 frequency-converts the input signal in the intermediate frequency band and outputs it as a radio wave from the antenna 19.

FIG. 9 shows an example of the configuration of a receiving device that receives a signal transmitted from the transmitting device of FIG. The RF signal input is captured by the receiving antenna 31 and supplied to the tuner 32. The tuner 32 converts the RF band signal into an intermediate frequency band signal and supplies it to the multipliers 33 and 38.
The multiplier 33 outputs the output of the local oscillator 47 to the 90 ° phase shifter 4
The signal phase-shifted by 90 ° at 8 and the output of the local oscillator 47 are supplied to the multiplier 38 as they are.

The multipliers 33 and 38 are provided for the intermediate frequency band I
The signal and the Q signal are converted into signals in the base frequency band, and these signals are further removed of unnecessary harmonic components by the low-pass filters 34 and 39, and then the A / D converter 3
5 and 40. The outputs of the A / D converters 35 and 40 are output by the discrete Fourier transformer (DFT) 37 to the DFT.
Serial / parallel converter (S / P) 36
And 41 are converted into parallel data. The output of the discrete Fourier transformer 37 is the parallel / serial converter (P / S) 4
2 and 44 are temporally converted into a serial data series, and after being subjected to removal processing such as guard intervals by the buffer memories 43 and 45, they are output as I channel reception data and Q channel reception data. There is.
The address controller 52 includes buffer memories 43 and 4
5 controls reading and writing.

By the way, such an OF transmitted
Various types of synchronization are required to correctly demodulate the DM signal in the receiving device. That is, in order to convert the OFDM signal in the intermediate frequency band into the OFDM signal in the base band, it is necessary to synchronize the frequency and phase of the signal output from the local oscillator 47 with that on the transmission side. Further, in order to demodulate the OSDM signal in the base band, the clock synchronized with the clock on the transmitting side must be regenerated by the local oscillator 50 on the receiving side.

For this reason, the carrier wave reproducing circuit 46 reproduces a carrier wave from the I and Q signals output from the buffer memories 43 and 45, and the reproduced output controls the local oscillator 47. Similarly, a clock is regenerated from the I signal and the Q signal demodulated by the clock regeneration circuit 49, and the local oscillator 50 is controlled.

Next, the operation will be described. The radio wave captured by the receiving antenna 31 is converted into a signal in the intermediate frequency band by the tuner 32 and supplied to the multipliers 33 and 38. The multiplier 33 divides the signal input from the tuner 32 and the reproduced carrier signal output from the local oscillator 47 by 9
The 0 ° phase shifter 48 multiplies the phase shift by the signal shifted by 90 °. As a result, the I signal component is obtained. Similarly, the multiplier 38 multiplies the main power of the tuner 32 and the output of the local oscillator 47. As a result, the Q signal component is obtained.

With respect to the I signal component output from the multiplier 33 and the Q signal component output from the multiplier 38, unnecessary harmonic components are removed by the low pass filters 34 and 39, respectively, and then the A signal is converted to the A / D converter 35. It is input to 40 and A / D converted.

A / D converter A / D converters 35 and 40
The converted I signal component and Q signal component are input to serial / parallel converters 36 and 41, respectively, converted from serial data to parallel data, and then input to the discrete Fourier transformer 37.

The discrete Fourier transformer 37 DFT processes the input I signal component and Q signal component in units of symbols. Since the processing is performed in units of symbols, the DFT window signal representing the period of the symbol is reproduced by the window reproduction circuit 51 from the reproduced I signal and Q signal and supplied to the discrete Fourier transformer 37.

The I signal component and the Q signal component output from the discrete Fourier transformer 37 are converted from parallel data to serial data by the parallel / serial converters 42 and 44, respectively, and then input to the buffer memories 43 and 45. To be done. Then, here, after the guard interval is removed, the signals are output as a reproduction I signal and a reproduction Q signal.

The carrier recovery circuit 46 detects a phase error of the carrier from the reproduced I signal and the reproduced Q signal, and outputs a signal corresponding to the detected phase error to the local oscillator 47. The local oscillator 47 generates a signal having a phase and frequency corresponding to the signal supplied from the carrier recovery circuit 46, that is, a carrier wave synchronized with the carrier wave on the transmission side.

Similarly, the clock recovery circuit 49 uses the recovery I
Local oscillator 50 corresponding to the phase error between the signal and the reproduced Q signal.
To synchronize the clock generated by the local oscillator 50 with the clock on the transmission side.

In order to reproduce the carrier wave in the carrier wave reproducing circuit 46, focusing on only the specific frequency of each symbol, a demodulated output of this specific frequency is used to form a Costas loop or the like, and the calculation result is stored in the local oscillator 47. A method of returning and reproducing a carrier wave has been proposed. FIG. 10 shows the OFDM
It shows a configuration example of a conventional carrier recovery circuit 46 when the carrier of this specific frequency of the signal is QPSK modulated.

The demodulated I and Q signals are input to the squaring circuits 61 and 62, respectively, and also to the multiplier 63. The squaring circuits 61 and 62 square the I signal and the Q signal, respectively, and supply the outputs to the subtractor 64. The subtractor 64 subtracts the two input signals, and the multiplier 6
5 is output. In addition, the multiplier 63 multiplies the input I signal and Q signal and outputs the result to the multiplier 65. The multiplier 65 multiplies the output of the subtractor 64 and the output of the multiplier 63.

The output of the multiplier 65 is, as shown in FIG. 11, the carrier I and Q signals on the transmitting side and the reproduced carrier I ',
The phase error detection signal has the characteristic shown in FIG. 12, which corresponds to the phase error φ of the Q ′ signal. This phase error detection signal is supplied to a low pass filter (LPF) 66 to generate a control voltage E (φ) of the local oscillator 47 for carrier wave reproduction,
This control voltage is fed back to the local oscillator 47 to reproduce the carrier wave.

Similarly, in order to regenerate the clock, the clock regenerating circuit 49 (which has the same configuration as the carrier regenerating circuit 46) uses a frequency different from the specific frequency used for regenerating the carrier to generate a Costas loop or the like. It is configured and fed back to the local oscillator 50.

In order to correctly demodulate such an I signal or Q signal, the window phases for Fourier transform in the discrete Fourier transformer 37 must be synchronized. FIG. 13 shows the relationship between the symbol data and the DFT window phase.

As shown in FIG. 13A, the symbol is composed of an effective symbol portion and a guard interval portion inserted for the purpose of eliminating the influence of ghost. In order to demodulate this symbol, the data (DF
(T window signal) is input and only data in the meantime is processed. That is, this DFT window signal is shown in FIG.
As shown in (B), the window signal needs to indicate the range of the data of the same symbol. As shown in FIG. 13C, if a window signal spanning different symbols is input to the discrete Fourier transformer 37 as a DFT window signal, correct symbol demodulation cannot be performed due to intersymbol interference.

[0032]

If the window phase of the DFT is not established in this way, the I signal and Q signal cannot be demodulated correctly. Therefore, the carrier recovery circuit 46 at this time does not operate as expected because the input itself is incorrect. Generally, the DFT window synchronization is established after carrier wave reproduction and clock reproduction are performed, and
The carrier and the clock synchronization must be established for the FT window synchronization reproduction, but the DFT window synchronization must be established for the carrier and the clock synchronization. It was difficult to quickly reproduce the carrier wave or clock.

The present invention has been made in view of such a situation, and the OFD is irrelevant regardless of the establishment of DFT window synchronization.
The carrier wave and clock of the M signal can be reproduced.

[0034]

According to another aspect of the signal transmission device of the present invention, each symbol of a carrier wave is constituted by a first period defined by an information sequence and a second period not defined by the information sequence. And a carrier having a frequency that is one of a plurality of carriers and is not used for transmitting an information sequence and has a frequency in which one integral time of the second period is one cycle. And second means for doing so.

According to a third aspect of the present invention, there is provided a signal transmission method, wherein each symbol of a carrier wave is composed of a first period defined by an information sequence and a second period not defined by the information sequence. , A carrier wave that is not used for transmitting the information sequence,
It is characterized in that a carrier wave having a frequency in which an integral fraction of the second period is one cycle is transmitted as a reference.

According to another aspect of the signal receiving apparatus of the present invention, at least one of the first generating means for generating a phase error signal by using the carrier wave as the reference and the reproduced carrier wave or the clock in synchronization with the carrier wave as the reference. And a second generating unit for generating.

In the signal receiving method according to the sixth aspect, a phase error signal is generated by using a carrier wave as a reference,
It is characterized in that at least one of a carrier wave and a clock is generated in synchronization with a carrier wave as a reference.

[0038]

A signal transmission device according to claim 1 and claim 3
In the signal transmission method described in (1), a carrier wave that is not used for transmitting the information sequence and has a frequency such that a time of an integral fraction of the second period is one cycle is transmitted as a reference.

In the signal receiving device according to the fourth aspect and the signal receiving method according to the sixth aspect, the phase error signal is generated using the carrier wave as the reference, and the phase error signal is generated in accordance with the phase error signal. At least one of the clocks is generated.

[0040]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an example of the configuration of a transmitting apparatus according to the present invention, and parts corresponding to those of the conventional transmitting apparatus shown in FIG. In this embodiment, the fixed data (reference signal) output from the fixed data generation circuit 81 is selected by the multiplexers 82 and 83 in place of the I signal or the Q signal under the control of the controller 84, and serial / parallel conversion is performed. It is configured to output to the devices 1 and 3, and other configurations are the same as those in the case of FIG.

Next, the operation will be described. The controller 84 controls the multiplexers 82 and 83 to select an I signal and a Q signal supplied from a circuit (not shown), or an I signal component of fixed data (reference signal) generated by the fixed data generation circuit 81. Select the Q signal component. The operation in the case where the multiplexers 82 and 83 select the I signal and Q signal corresponding to the information sequence to be transmitted, which is supplied from the circuit not shown, is the same as the case in FIG.

That is, for example, the I signal component and the Q signal component of the carrier wave of the first frequency forming the OFDM signal are converted from serial data to parallel data in the serial / parallel converters 1 and 3, respectively, into data in units of symbols. After the conversion, it is input to the discrete inverse Fourier transformer 2 and subjected to IDFT processing.

The IDFT is performed by the discrete inverse Fourier transformer 2.
The processed I and Q signals are converted from parallel data to serial data in the parallel / serial converters 4 and 10, respectively, and then supplied to and stored in the buffer memories 5 and 11. Then, the buffer memories 5 and 11
After a guard interval of a predetermined period is added at, the D / A converters 6 and 12 perform D / A conversion.
The outputs of the D / A converters 6 and 12 are input to the low-pass filters 7 and 13, and after the folding components are removed, they are input to the multipliers 8 and 14.

The multiplier 8 multiplies the I signal input from the low-pass filter 7 by the carrier output from the local oscillator 15 and having its phase shifted by 90 ° by the 90 ° phase shifter 16. Similarly, the multiplier 14 includes a low-pass filter 13
And the carrier wave output by the local oscillator 15 are multiplied.

The adder 9 adds the signals output from the multipliers 8 and 14 and outputs the result to the bandpass filter 17. The bandpass filter 17 extracts only a signal in a predetermined intermediate frequency band and outputs it to the RF converter 18. The RF converter 18 converts the frequency of the input signal and outputs it as a radio wave from the transmitting antenna 19.

The above-described operation is performed for each carrier of the OFDM signal corresponding to the information sequence to be transmitted.

Further, in this embodiment, in addition to transmitting a carrier wave of a predetermined frequency corresponding to the information sequence,
A carrier as fixed data (reference signal) generated by the fixed data generation circuit 81 is also transmitted as one of the OFDM signal carriers. In this case, the controller 84 controls the multiplexers 82 and 83 to select the output of the fixed data generating circuit 81 and supply it to the serial / parallel converters 1 and 3. Then, the processing corresponding to this fixed data is executed in the same manner as in the case described above, and the carrier wave as the reference signal is transmitted.

As a carrier wave as a reference signal, a carrier wave not used for transmitting an information sequence among carrier waves having a frequency in which one integral time of the guard interval added in the buffer memories 5 and 11 has one cycle. Is used.

Since a signal of a predetermined frequency in which a time that is an integral fraction of the time of the guard interval is one cycle has a length of the guard interval that is an integral multiple of one cycle, if the amplitude and phase are constant, As shown in 2, the signal becomes a continuous signal regardless of the DFT window phase (the phase does not become discontinuous).

For example, the outputs of the multiplexers 82 and 83 are input to the serial / parallel converters 1 and 3, and 102
This is the data for the 4-point discrete inverse Fourier transform. The data array of the serial / parallel converters 1 and 3 is an array corresponding to each carrier wave of OFDM.

FIG. 3 shows an example of the spectrum structure of an OFDM signal according to the present invention in which such a reference signal is inserted. In the example of FIG. 3, a DFT of 24 points out of 1024 points is used. DF
Although each carrier of OFDM corresponds to T coefficient numbers 0 to 23, data 0 is assigned to coefficient numbers 0, 2, 20, 22, and 23 so that substantially no output is generated. Then, in the DFT coefficient numbers 3 to 19, the actual transmission information (I
Signals and modulated signals such as QAM and QPSK defined by the Q signal) are allocated, and the DFT coefficient numbers 1 and 21 at substantially the lowest and upper frequencies are carrier waves for reference for carrier recovery and clock recovery, respectively. I am trying.

Serial / parallel converter 1 in FIG.
The parallel data output from 3 and 3 has a relationship between each DFT coefficient number and the information transmission carrier and the reference carrier as shown in FIG.

FIG. 4 shows a configuration example of a signal receiving device for receiving the signal transmitted from the signal transmitting device shown in FIG. As is apparent by comparing FIG. 4 with FIG. 9 described above, the basic configuration is the same as the conventional case. However, in this embodiment, the address controller 52
The REF1 signal is supplied to the carrier wave reproducing circuit 46. This REF1 signal is a signal that goes high only when the Q signal is a reference signal. In addition, the carrier recovery circuit 46 and the clock recovery circuit 49 include
Only one of the outputs of the buffer memories 43 and 45 (see FIG.
In the case of the above embodiment, only the output of the buffer memory 45 is supplied.

The carrier recovery circuit 46 is constructed as shown in FIG. That is, in the carrier wave reproduction circuit 46, the reproduction Q signal output from the buffer memory 45 is the data (D).
A low-pass filter (L-type) which smooths the output of the D-type flip-flop 101 input to the terminal and the D-type flip-flop 101 and outputs it to the local oscillator 47 as a phase error voltage (L
PF) 102. The REF1 signal is input to the clock terminal of the D flip-flop 101.

Next, the operation of the embodiment shown in FIG. 4 will be described. The operation of this device for reproducing the I signal and the Q signal is basically the same as in FIG.

Then, next, the carrier recovery circuit 4 shown in FIG.
The operation of No. 6 will be described. D-type flip-flop 10
The Q signal output from the buffer memory 45 is input to the D terminal of 1. Then, the D-type flip-flop 10
The address controller 52 inputs the REF1 signal, which is at a high level when the Q signal is the reference signal, to the 1st clock terminal. Therefore, the D flip-flop 101 samples the Q signal component of the reference signal.

The data held in the D-type flip-flop 101, as shown in FIG. 6, when a phase error φ exists between the reference transmitted by the transmitting side and the reference received by the receiving side, Corresponding to the phase error,
The data has the phase error detection characteristics as shown in FIG. Therefore, the output of the D-type flip-flop 101 is converted into the phase error voltage ε (φ) by the low pass filter 102 and supplied to the local oscillator 47 as a control voltage. As a result, the phase of the reproduced carrier wave output by the local oscillator 47 is synchronized with the phase of the carrier wave transmitted on the transmission side.

Although not shown, the clock recovery circuit 49
Is also configured as shown in FIG. 5 similarly to the carrier recovery circuit 46. The local oscillator 50 is controlled according to the phase error voltage output by the clock recovery circuit 49, and the phase of the clock output by the local oscillator 50 is synchronized with the phase of the clock on the transmission side. The clock output from the local oscillator 50 is supplied to each circuit in the subsequent stage of the A / D converters 35 and 40 in FIG.

In the carrier recovery circuit 46, the reference carrier f ₁ shown in FIG. 3 is detected.
In the clock recovery circuit 49, the reference carrier wave f ₂₁ is detected.

As described above, the transmitting side inserts an arbitrary carrier having a frequency of an integer fraction of the guard interval into the OFDM as a reference signal, so that the receiving side does not depend on the DFT window phase. It is possible to detect the phase error of the reference signal and reproduce the carrier wave and the clock easily and accurately according to the phase shift error.

[0061]

As described above, according to the signal transmission device of the first aspect and the signal transmission method of the third aspect, a carrier wave which is not used for transmitting an information sequence among a plurality of carrier waves, Since the carrier wave having a frequency in which a time that is an integral fraction of the two periods is one cycle is transmitted as the reference signal, the carrier wave and the clock can be quickly and easily reproduced on the receiving side.

Further, according to the signal receiving device of the fourth aspect and the signal receiving method of the sixth aspect, at least one of the carrier wave and the clock is generated corresponding to the phase error of the carrier wave as the reference. Therefore, it becomes possible to generate a carrier wave or a clock quickly and reliably.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration example of a signal transmission device of the present invention.

FIG. 2 is a diagram illustrating a reference signal output from a fixed data generation circuit 81 in FIG.

FIG. 3 is a diagram illustrating a spectrum of an OFDM signal in the embodiment of FIG.

FIG. 4 is a block diagram showing a configuration example of a signal receiving apparatus of the present invention.

5 is a block diagram showing a configuration example of a carrier recovery circuit 46 of FIG.

FIG. 6 is a diagram illustrating a phase error detected in the embodiment of FIG.

7 is a diagram showing a phase error characteristic in the embodiment of FIG.

FIG. 8 is a block diagram showing a configuration example of a conventional signal transmission device.

FIG. 9 is a block diagram showing a configuration example of a conventional signal receiving device.

10 is a block diagram showing a configuration example of a carrier recovery circuit 46 of FIG.

11 is a diagram illustrating a phase error detected in FIG.

12 is a diagram showing a phase error detection characteristic of the example of FIG.

FIG. 13 is a diagram illustrating a DFT window phase.

[Explanation of symbols]

 1 serial / parallel converter 2 discrete inverse Fourier transformer 3 serial / parallel converter 4 parallel / serial converter 5 buffer memory 10 parallel / serial converter 11 buffer memory 15 local oscillator 16 90 ° phase shifter 37 discrete Fourier Converter 43, 45 Buffer memory 46 Carrier wave recovery circuit 47 Local oscillator 48 90 ° phase shifter 49 Clock recovery circuit 50 Local oscillator 52 Address controller 81 Fixed data generation circuit 82, 83 Multiplexer 84 Controller

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yoshikazu Miyato 6-735 Kitashinagawa, Shinagawa-ku, Tokyo Sony Corporation

Claims (6)

[Claims] 1. A signal transmission device for transmitting at least one of a phase and an amplitude of a plurality of carriers as an orthogonal frequency division multiplexed signal by defining an information sequence in units of symbols, and transmitting each symbol of the carrier as the information sequence. And a first means configured to transmit the second period not defined by the information sequence, the plurality of carrier waves that are not used for transmitting the information sequence. And a second means for transmitting, as a reference, a carrier having a frequency whose integral time is one cycle of the second period, which is one cycle. 2. The signal transmission device according to claim 1, wherein the second means transmits at least two carrier waves as the reference. 3. A signal transmission method, wherein at least one of the phases and amplitudes of a plurality of carriers is defined by an information sequence in units of symbols and transmitted as an orthogonal frequency division multiplexed signal, wherein each symbol of the carrier is represented by the information sequence. Of the plurality of carrier waves that are not used for transmitting the information sequence, A signal transmission method, characterized in that a carrier having a frequency of which a period of an integer is one cycle is transmitted as a reference. 4. A first period in which at least one of the phases and amplitudes of a plurality of carriers is defined by an information sequence in units of symbols, and each symbol of the carrier is defined by the information sequence, and the information sequence. And a second period not specified in Section 2 above, which is a carrier wave that is not used for the transmission of the information sequence among the plurality of carrier waves and has a period that is an integer fraction of the second period is one cycle. In a signal receiving device for receiving an orthogonal frequency division multiplex signal whose carrier is transmitted as a reference, a baseband conversion unit for converting the transmitted orthogonal frequency division multiplex signal to a baseband signal, and using the carrier as the reference And a second generation means for generating at least one of a reproduced carrier wave and a clock corresponding to the phase error signal. A signal receiving device, comprising: 5. The first generating means uses an I signal component or a Q signal component obtained by processing the orthogonal frequency division multiplexed signal, out of a carrier wave as the reference. The signal receiving device according to. 6. A first period in which at least one of the phases and amplitudes of a plurality of carriers is defined by an information sequence in units of symbols, and each symbol of the carrier is defined by the information sequence, and the information sequence. A second period which is not specified in Section 1 above, and which is a carrier wave that is not used for transmitting the information sequence among the plurality of carrier waves and has a period that is an integer fraction of the second period is one cycle. In a signal receiving method of receiving an orthogonal frequency division multiplex signal in which a carrier of a first frequency and a carrier of a second frequency are transmitted as a reference, the transmitted orthogonal frequency division multiplex signal is converted into a baseband signal, A signal receiving method characterized in that a phase error signal is generated using a carrier wave, and at least one of a carrier wave and a clock is generated corresponding to the phase error signal.