JP3926945B2 - Carrier reproduction circuit and carrier reproduction method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a carrier reproduction circuit that is used in, for example, a digital broadcast receiver and reproduces a carrier from a received signal.
[0002]
[Prior art]
As is well known, in digital transmission, multilevel quadrature modulation and multilevel phase modulation are advantageous in order to increase the transmission bit rate, but are not suitable for transmission at low C / N. As a method for achieving both a transmission bit rate and a low C / N characteristic, there is a method in which signals modulated by modulation schemes having different numbers of phases, such as 8PSK and BPSK, are time-division multiplexed and transmitted. In the case of the above example, this method decodes both symbols transmitted by 8PSK and BPSK modulation schemes at high C / N, and decodes only symbols transmitted by BPSK at low C / N. Thus, although it is lower than the transmission bit rate of high C / N, transmission symbols can be decoded even at low C / N. At this time, carrier recovery in the receiving apparatus is performed using a BPSK signal so that reception is possible even at low C / N.
[0003]
Recently, digital BS broadcasting has been put into practical use. In this broadcasting, the above-described method is adopted, and a transmission frame configuration as shown in FIG. 6 is standardized. In this transmission frame configuration, one of 8PSK, QPSK, and BPSK modulation schemes can be selected for the main signal, and the BPSK modulation scheme is used for auxiliary signals including frame synchronization signals, TMCC (Transmission Multiplex Control) signals, and synchronization acquisition burst signals. Is adopted so that both signals are time-division multiplexed.
[0004]
Here, the frame synchronization signal and the TMCC signal are arranged at the head of each frame of the transmission signal. The TMCC signal is 128 symbols, and the frame synchronization signal is arranged 32 symbols before and after the TMCC signal. Hereinafter, the period of the frame synchronization signal and the TMCC signal is referred to as a TMCC unit. The synchronization acquisition burst signal is arranged in units of 4 symbols at intervals of 203 symbols in the main signal modulation wave period excluding the TMCC signal portion. That is, there are (203 + 4) * 48 symbols of the main signal and the synchronization acquisition burst signal in one frame.
[0005]
When receiving a digital modulated wave with such a transmission frame configuration, in order to enable demodulation at a low C / N, a carrier using a frame synchronization signal, TMCC signal and synchronization acquisition burst signal that are always transmitted by BPSK. Playback is performed. However, when carrier recovery is performed with a synchronous control loop configuration using a frame synchronization signal transmitted through BPSK, a TMCC signal, and a synchronization acquisition burst signal, there are the following problems.
[0006]
That is, when there is a frequency error exceeding the acquisition range of the synchronization acquisition burst, the frequency acquisition operation is performed by the PLL in the frame synchronization signal and TMCC signal period, but the synchronization acquisition burst signal inserted between the main signals is synchronized. Pull-in causes pseudo synchronization, and carrier reproduction cannot be performed. Although it is possible to perform carrier reproduction while increasing the loop gain during the frame synchronization signal and TMCC signal period and causing pseudo-synchronization, there is a practical problem because the carrier becomes poorly stable.
[0007]
[Problems to be solved by the invention]
As described above, time-division multiplexing of a main signal modulated by an arbitrary multi-level modulation method and an auxiliary signal modulated by a modulation method having the same or less number of phases as the multi-level modulation of this main signal A digital transmission signal in which an auxiliary signal is arranged at a plurality of consecutive symbols at the head of each frame, followed by a main signal, and further distributed at regular intervals in the main signal. When performing carrier recovery using the auxiliary signal part during reception, there is a problem that frequency recovery cannot be performed in the auxiliary signal part of the main signal period, causing pseudo-synchronization, and carrier recovery cannot be performed. .
[0008]
It is an object of the present invention to provide a carrier reproduction circuit and a carrier reproduction method that can solve the above-described problems and can perform good carrier reproduction by eliminating pseudo-synchronization with auxiliary signals distributed in a distributed manner.
[0009]
[Means for Solving the Problems]
In order to achieve the above object, the present invention can be applied to a main signal modulated by an arbitrary multi-level modulation scheme and a modulation scheme having a phase number equal to or less than the number of phases of the multi-level modulation of the main signal. The auxiliary signal is time-division multiplexed, and the auxiliary signal is arranged at a plurality of consecutive symbols at the head of each frame, followed by the main signal, and further distributed at regular intervals in the main signal. The digital modulated wave is input, and the digital modulated wave is frequency-converted using the reproduced carrier signal to detect the phase error of the frequency converted signal, and the phase of the reproduced carrier is reduced so that the phase error is reduced. In a carrier recovery circuit that performs carrier recovery by controlling the frequency and phase, a frame detection means for detecting the frame head of the digital modulation wave, and a frame detected by this means First phase error detection means for obtaining a first phase error of the reproduction carrier from auxiliary signals of a plurality of consecutive symbols at the head of the frame based on detection timing, and based on frame detection timing detected by the frame detection means And second phase error detection means for obtaining a second phase error of the reproduction carrier from auxiliary signals distributed in the main signal, and the first phase error detection means obtained by the first phase error detection means. The frequency of the reproduced carrier is drawn by the phase error, and the phase of the reproduced carrier is drawn by the second phase error obtained by the second phase error detecting means.
[0010]
As described above, in the present invention, by using only the auxiliary signals of a plurality of consecutive symbols at the head of the frame, the frequency acquisition is performed to suppress the occurrence of pseudo-synchronization, and the auxiliary signals distributed and arranged in the main signal at the time of phase acquisition are used. Thus, stable carrier reproduction can be performed.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0012]
(First embodiment)
FIG. 1 is a block circuit diagram showing a configuration of a digital BS broadcast receiving apparatus including a carrier reproduction circuit according to the first embodiment of the present invention. In FIG. 1, a digital satellite broadcast wave reception signal supplied to an input terminal 101 is input to first and second synchronous detection circuits 102 and 103 and generated by a local oscillator 107 and a 90 ° phase shifter 106. Quadrature detection is performed by fixed carriers orthogonal to each other. The quadrature detection outputs from the synchronous detection circuits 102 and 103 are supplied to the A / D converters 108 and 109 as quasi-synchronous detection outputs I and Q after unnecessary harmonic components are removed by the low-pass filters 104 and 105, respectively. Converted to digital data. The subsequent block configuration shown in the figure is a carrier recovery circuit by digital processing.
[0013]
The quasi-synchronized detection signals digitized by the A / D converters 108 and 109 are supplied to the complex multiplier 110 and accurately synchronized. Thereafter, the waveform is shaped by roll-off filters (ROF) 111 and 112, the output of one roll-off filter 111 is output to I1, and the output of the other roll-off filter 112 is output to a demodulation circuit (not shown) as Q1.
[0014]
The outputs I1 and Q1 of the roll-off filters 111 and 112 are also supplied to the phase detector 113. The phase detector 113 detects phase information from the input signals I 1 and Q 1, and this phase information is supplied to the frame detection circuit 118, the TMCC part carrier error detection circuit 119 and the burst part carrier error detection circuit 120.
[0015]
First, the frame detection circuit 118 generates a frame timing signal by detecting a BPSK-modulated frame synchronization signal from the phase information of the transmitted symbol sequence. This frame timing signal is generated by the TMCC unit carrier error detection circuit 119 and the frame timing signal. It is supplied to the burst part carrier error detection circuit 120.
[0016]
Based on the frame timing signal, the TMCC part carrier error detection circuit 119 extracts the phase information of the TMCC part (frame synchronization signal and TMCC signal part) subjected to BPSK modulation from the output of the phase detector 113, and the carrier phase error during that period. The phase error information detected here is supplied to the loop filter 115.
[0017]
Also, the burst portion carrier error detection circuit 120 extracts the phase information of the BPSK modulated burst signal portion for synchronization acquisition from the output of the phase detector 113 based on the frame timing signal, and detects the carrier phase error in that period. Therefore, the phase error information detected here is supplied to the loop filter 115.
[0018]
The loop filter 115 integrates the phase error signal from the TMCC part carrier error detection circuit 119 and the phase error signal from the burst part carrier error detection circuit 120 to generate a frequency control signal. This frequency control signal Is supplied to a numerically controlled oscillator (NCO) 116.
[0019]
The numerically controlled oscillator 116 generates a reproduction carrier, and its frequency is controlled by a frequency control signal from the loop filter 115. The reproduced carrier signal obtained here is converted into a sine and cosine characteristic signal by the data conversion circuit 117, and then supplied to the complex multiplier 110 for synchronous detection.
[0020]
The loop for the complex multiplier 110 is a fully digital PLL, and the loop filter 115 includes a circuit having a complete integration system. In this case, the frequency pull-in range of the PLL is infinite in principle, and an ideal operation as a PLL can be expected. Since this technique is described in detail in the description of FIG. 5 in the column “Prior Art” of Japanese Patent Laid-Open No. 6-78009, the description thereof is omitted here.
[0021]
In the above configuration, the operation of the carrier recovery circuit portion which is a feature of the present invention will be described below.
[0022]
First, the output of the phase detection circuit 113 is supplied to the frame detection circuit 118, the TMCC part carrier error detection circuit 119, and the burst part carrier error detection circuit 120. From the frame synchronization timing detected by the frame detection circuit 118, the TMCC carrier error detection circuit 119 detects the carrier phase error during the period of the frame synchronization signal and the TMCC signal. This carrier phase error is converted into a frequency by the integration system of the loop filter 115, and operates as a PLL loop that pulls in the frequency of the carrier. When the reproduction carrier frequency error is sufficiently suppressed, the burst portion carrier error detection circuit 120 detects the carrier phase error in the synchronization acquisition burst signal period from the frame synchronization timing detected by the frame detection circuit 118. This carrier phase error is supplied to the loop filter 115 to perform phase synchronization by the PLL loop, thereby completing the carrier reproduction.
[0023]
FIG. 2 shows a loop control operation in the carrier recovery circuit, where (a) shows a frequency pull-in operation and (b) shows a phase pull-in operation. First, as shown in FIG. 2A, since the NCO 116 is controlled so that Δf becomes 0 during the period of the frame synchronization signal and the TMCC signal, the control is maintained in the main signal and the burst signal period for synchronization acquisition. As a result, frequency pull-in is also performed in the main signal and the burst signal period for acquisition of synchronization, and pseudo-synchronization is eliminated. After the frequency shift of the regenerative carrier is sufficiently suppressed, phase pull-in is performed using the synchronization acquisition burst signal as shown in FIG. 2B. Therefore, carrier reproduction is possible without pseudo-synchronization.
[0024]
Here, if the phase acquisition is performed only in the burst signal period for synchronization acquisition, the phase error detection period in the period of the frame synchronization signal and the TMCC signal becomes long, so the 4 symbols at the rear of this period are used for the phase acquisition control. To do. As a result, stable phase drawing can be performed. It is also possible to perform phase pull-in using all symbols in the frame synchronization signal and TMCC signal period.
[0025]
Therefore, according to the carrier recovery circuit having the above-described configuration, it is possible to perform good carrier recovery by eliminating the pseudo-synchronization in the synchronization acquisition burst signals that are distributed.
[0026]
(Second Embodiment)
FIG. 3 is a block circuit diagram showing a configuration of a digital BS broadcast receiving apparatus provided with a carrier reproduction circuit according to the second embodiment of the present invention. However, in FIG. 3, the same parts as those in FIG. 1 are denoted by the same reference numerals, and the description overlapping with the first embodiment is omitted here.
[0027]
In FIG. 3, the error signal detected by the burst part carrier error detection circuit 120 is supplied to the averaging circuit 121. The averaging circuit 121 calculates the average of the error signals of 4 symbols detected during the synchronization supplement burst signal period, and the calculation result is supplied to the loop filter 115.
[0028]
That is, at low C / N, the phase jitter increases because the phase error signal varies greatly. Therefore, in this embodiment, in order to improve the performance at low C / N, the average of the error signals of 4 symbols detected by the averaging circuit 121 during the synchronization supplement burst signal period is obtained, and the phase synchronization is performed by the average value. Like to do. As a result, it is possible to prevent loss of phase synchronization due to phase jitter at low C / N.
[0029]
Note that noise removal processing such as LPF is also effective in place of the averaging circuit.
[0030]
(Third embodiment)
FIG. 4 is a block circuit diagram showing a configuration of a digital BS broadcast receiving apparatus provided with a carrier reproduction circuit according to the third embodiment of the present invention. However, in FIG. 4, the same parts as those in FIGS. 1 and 3 are denoted by the same reference numerals, and the description overlapping with the first and second embodiments is omitted here.
[0031]
The carrier recovery circuit shown in FIG. 4 is obtained by inserting a limiter 122 after the averaging circuit 121 of the second embodiment. Since the averaging circuit 121 has only four symbols for averaging, there may be a case where a phase error greatly different from the original phase error is detected at low C / N. In such a case, an incorrect control signal is supplied to the NCO 116 via the loop filter 115, and the regenerative carrier is greatly disturbed to cause a cycle slip. Therefore, in this embodiment, the limiter 122 is interposed to limit the phase error signal so as not to become larger than a predetermined value, thereby stabilizing the PLL loop.
[0032]
(Fourth embodiment)
FIG. 5 is a flowchart showing a processing procedure when the carrier reproduction processing from phase detection to NCO control signal generation according to the third embodiment is realized by software as the fourth embodiment of the present invention.
[0033]
First, symbol sequence phase information is detected from the I1 and Q1 outputs of the roll-off filters 111 and 112 shown in FIG. 4 (S1), and a BPSK-modulated frame synchronization signal is detected to obtain frame timing information (S2). Subsequently, based on the frame timing information, the carrier phase error of the TMCC part and the carrier phase error of the burst part are detected (S3). The burst portion carrier phase error is averaged (S4).
[0034]
Next, the carrier phase error of the TMCC part is compared with a specified value (S5), and while the specified value is exceeded, this carrier phase error is integrated to generate a control signal for the NCO 116, and the frequency of the reproduced carrier is controlled. (S6). When the value is below the specified value, the average value of the carrier phase error is integrated to generate a control signal for the NCO 116, and the phase of the reproduced carrier is controlled (S7). At this time, the carrier phase error is monitored and the average value is limited so as not to exceed the specified value (S8). If the average value exceeds the allowable value, the process proceeds to step S5, where the TMCC part carrier Switching to frequency error integration is performed (S9).
[0035]
With the above processing procedure, the carrier reproduction by software becomes possible.
[0036]
In the embodiment described above, the present invention is applied to a carrier reproduction circuit of a digital BS broadcast receiving apparatus. However, the present invention is not limited to this and is modulated by an arbitrary multilevel modulation system. The main signal and the auxiliary signal modulated by the modulation method of the number of phases equal to or less than the number of phases of the multilevel modulation of this main signal are time-division multiplexed, and are supplemented to a plurality of continuous symbols at the head of each frame. The present invention can be applied to a carrier recovery circuit in the case of receiving a digital transmission signal in which a signal is arranged, followed by a main signal, and further distributed in the main signal at regular intervals and an auxiliary signal is arranged.
[0037]
【The invention's effect】
As described above, according to the present invention, it is possible to provide a carrier reproduction circuit and a carrier reproduction method that enable good carrier reproduction by eliminating pseudo-synchronization with auxiliary signals arranged in a distributed manner.
[Brief description of the drawings]
FIG. 1 is a block circuit diagram showing a configuration of a digital BS broadcast receiving apparatus provided with a carrier reproduction circuit according to a first embodiment of the present invention.
FIG. 2 is a view showing the operation of the carrier reproducing circuit in the same embodiment.
FIG. 3 is a block circuit diagram showing a configuration of a digital BS broadcast receiving apparatus provided with a carrier reproduction circuit according to a second embodiment of the present invention.
FIG. 4 is a block circuit diagram showing a configuration of a digital BS broadcast receiving apparatus provided with a carrier reproduction circuit according to a third embodiment of the present invention.
FIG. 5 is a flowchart showing a processing procedure when the carrier reproduction processing of the fourth embodiment is realized by software as the fourth embodiment of the present invention.
FIG. 6 is a diagram showing a modulated wave configuration of digital BS broadcasting.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 101 ... Input terminal, 102, 103 ... Synchronous detection circuit, 104, 105 ... Low pass filter, 106 ... 90 degree phase shifter, 107 ... Local oscillator, 108, 109 ... A / D converter, 110 ... Complex multiplier, 111 , 112 ... Roll-off filter, 113 ... Phase detector, 115 ... Loop filter, 116 ... Numerically controlled oscillator, 117 ... Data conversion circuit, 118 ... Frame detection circuit, 119 ... TMCC part carrier error detection circuit, 120 ... Burst part carrier Error detection circuit, 121... Averaging circuit, 122.

Claims (6)

A main signal modulated with an arbitrary multi-level modulation method and an auxiliary signal modulated with a modulation method with the same or less number of phases as the multi-level modulation of this main signal are time-division multiplexed, An auxiliary signal is arranged in a plurality of consecutive symbols at the head of the frame, followed by a main signal, and a digital modulated wave in which the auxiliary signal is arranged dispersed at regular intervals in the main signal is input, and this digital The carrier wave is reproduced by detecting the phase error of the frequency conversion signal generated by frequency-converting the modulated wave using the reproduction carrier signal and controlling the frequency and phase of the reproduction carrier so that the phase error is reduced. In the carrier regeneration circuit,
Frame detection means for detecting a frame head of the digital modulation wave;
First phase error detection means for obtaining a first phase error of the reproduction carrier from auxiliary signals of a plurality of consecutive symbols at the head of the frame based on the frame detection timing detected by the means;
Second phase error detection means for obtaining a second phase error of the reproduction carrier from auxiliary signals distributed in the main signal based on the frame detection timing detected by the frame detection means;
The reproduction carrier frequency is drawn by the first phase error obtained by the first phase error detection means, and the reproduction carrier phase is drawn by the second phase error obtained by the second phase error detection means. A carrier reproduction circuit characterized by that. 2. The carrier reproduction circuit according to claim 1, wherein the second phase error detection means includes averaging means for averaging and outputting the phase error. 2. The carrier reproduction circuit according to claim 1, wherein the second phase error detection means includes smoothing means for smoothing and outputting the phase error. 4. The carrier recovery circuit according to claim 1, wherein the second phase error detecting means includes output limiting means for limiting the level of the phase error and outputting it. The auxiliary signals arranged in a plurality of consecutive symbols at the head of the frame are a frame synchronization signal and a transmission multiplex control signal, and the auxiliary signals distributed at regular intervals in the main signal are burst signals for synchronization acquisition. 2. A carrier reproducing circuit according to claim 1, wherein: A main signal modulated with an arbitrary multi-level modulation method and an auxiliary signal modulated with a modulation method with the same or less number of phases as the multi-level modulation of this main signal are time-division multiplexed, An auxiliary signal is arranged in a plurality of consecutive symbols at the head of the frame, followed by a main signal, and a digital modulated wave in which the auxiliary signal is arranged dispersed at regular intervals in the main signal is input, and this digital The carrier wave is reproduced by detecting the phase error of the frequency conversion signal generated by frequency-converting the modulated wave using the reproduction carrier signal and controlling the frequency and phase of the reproduction carrier so that the phase error is reduced. In the carrier regeneration method,
A frame detection procedure for detecting a frame head of the digital modulation wave;
Based on the frame detection timing detected in this procedure, the first phase error of the reproduction carrier is obtained from the auxiliary signals of a plurality of consecutive symbols at the head of the frame, and the reproduction is performed from auxiliary signals distributed in the main signal. A phase error detection procedure for determining a second phase error of the carrier;
A frequency pull-in procedure for pulling in the frequency of the reproduction carrier by the first phase error obtained in this procedure;
And a phase pull-in procedure for performing phase pull-in of the reproduced carrier by the second phase error detected by the phase error detection procedure after the frequency pull-in by this procedure.

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