JPH08250626A - Semiconductor device - Google Patents

Abstract

PURPOSE: To provide a semiconductor device wherein a semiconductor chip is effectively and sufficiently cooled and in active circuit element or the like can be formed in the semiconductor chip with high level of integration. CONSTITUTION: A plurality of cooling holes 22 are formed on a semiconductor chip 15. In the chip, an active circuit element 16 which is arranged in a semiconductor device and cooled by making refrigerant flow is formed. When the semiconductor device is operated, the thermal conductivity at the time of making the refrigerant flow in the cooling holes 22 is remarkably increased, i.e., a several tens times the thermal conductivity at the time of making the refrigerant flow along a plane surface. Since the refrigerant flows to directly come into contact with the active circuit element 16 of the semiconductor chip 15 or the like, very effective cooling can be realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device capable of efficiently cooling a semiconductor chip.

[0002]

2. Description of the Related Art A conventional semiconductor device having a semiconductor chip on which active circuit elements, passive circuit elements and wiring are formed will be described with reference to the schematic sectional view of FIG.

In FIG. 14, a semiconductor chip 1 has an active circuit element, a passive circuit element, and wiring formed on one surface thereof as a circuit forming surface 2. Reference numeral 3 denotes a package, and a recess 4 for accommodating the semiconductor chip 1 is formed on one side of the package, and the semiconductor chip 1 is fixed to the bottom of the recess 4 such that the other surface is bonded. The opening of the recess 4 accommodating the semiconductor chip 1 is hermetically closed by a lid 5, and the recess 4 is filled with an inert gas.

On the other surface side of the package 3, a cooling device 6 such as a radiation fin is provided. Therefore, whether the heat generated in the active circuit element or the like of the semiconductor chip 1 reaches the package 3 from the bonding surface between the semiconductor chip 1 and the package 3 by heat conduction from the circuit forming surface 2 to the inside of the semiconductor chip 1,
Air that is transmitted to the package 3 by natural convection of the inert gas in the recess 4 and further follows the heat transfer path to the cooling device 6 by heat conduction inside the package 3 and flows in the cooling device 6 as indicated by the white arrow. Is transmitted to the cooling medium 7 and is discharged to the outside. An external lead 8 is provided upright on the other surface side of the package 3, which is connected to a corresponding portion of the semiconductor chip 1 by a bonding wire 9.

However, in the above-mentioned prior art,
Since the heat resistance of the heat transfer path from the circuit forming surface 2 to the cooling device 6 is large, it is difficult to efficiently cool the temperature of the circuit forming surface 2 which is the heat generating portion by the cooling device 6 and sufficiently lower it. . Further, since the temperature difference between the temperature of the circuit forming surface 2 being cooled and the temperature of the cooling device 6 increases as the amount of heat generated in the heat generating portion increases, active circuit elements to be formed on the semiconductor chip 1 in the future. It is predicted that if the integration density increases, the heat generation density will also increase, and even if a liquid is used as a cooling medium, circuit formation will not be established due to the thermal limit, and the realization of a semiconductor device that enables more efficient cooling Is strongly desired.

[0006]

SUMMARY OF THE INVENTION As described above, conventionally,
The heat generated in the active circuit element of the semiconductor chip is released to the cooling device through the heat transfer path due to the heat conduction in the semiconductor chip and the package, so that the heat resistance of the heat transfer path is high, and the semiconductor is efficient and sufficient. It is assumed that the chip cannot be cooled and the circuit cannot be formed when the active circuit elements and the like formed on the semiconductor chip are highly integrated. The present invention has been made in view of such circumstances, and an object of the present invention is to enable efficient and sufficient cooling of a semiconductor chip and to form an active circuit element or the like on the semiconductor chip with a high degree of integration. It is to provide a semiconductor device capable of

[0007]

According to the present invention, there is provided a semiconductor device comprising:
A semiconductor chip having a circuit element formed thereon, a through hole provided so as to penetrate the semiconductor chip, and a cooling means for cooling the semiconductor chip by using a cooling medium. The cooling means is a convection cooling means for allowing a cooling medium to flow in the through hole, and the cooling means is a boiling cooling means having the through hole as a boiling nucleus. Furthermore, at least one of the circuit elements is characterized in that it is formed so as to face the inner wall surface of the through-hole, and a semiconductor chip on which the circuit element is formed,
The semiconductor chip includes a groove and cooling means for cooling the semiconductor chip using a cooling medium, and at least one of the circuit elements is formed so as to face an inner wall surface of the groove. Further, the cooling means is a convection cooling means for causing a cooling medium to flow in the groove, and the cooling means is a boiling cooling means using the groove as a boiling nucleus. In addition, a semiconductor chip having at least one through hole, a mounting member in which the semiconductor chip is mounted through a predetermined gap, and a cooling medium through the gap and the through hole. A semiconductor chip having at least one through hole, and at least one opening, and the opening and the through hole communicate with each other. It is characterized in that it has a mounting member on which the semiconductor chip is mounted, and means for flow through the cooling medium through the through holes and openings in.

[0008]

In the semiconductor device constructed as described above, the semiconductor chip is formed with the cooling hole, and the heat transfer coefficient when the cooling medium is flown into the cooling hole is the same as that of the conventional radiation fin. The heat transfer coefficient is several tens of times larger than that when a cooling medium is flown along the surface of a flat plate, and it is very efficient because the cooling medium flows directly in contact with the active circuit elements of the semiconductor chip. You can cool it.

Further, it is possible to carry out boiling cooling by using cooling holes or cooling grooves formed in the semiconductor chip as boiling nuclei.

On the other hand, since the active circuit element is provided on the inner wall surface of the cooling hole or the cooling groove formed in the semiconductor chip, the heat transfer coefficient increases and the cooling medium directly flows in contact with the active circuit element. As a result, the heat can be dissipated and the cooling can be performed efficiently with a very low thermal resistance.
Further, it becomes possible to increase the degree of integration of active circuit elements and the like without requiring the miniaturization of the structure.

[0011]

Embodiments of the present invention will be described below with reference to the drawings. First, a first embodiment will be described with reference to FIGS. FIG. 1 is a schematic cross-sectional view, and FIG. 2 is a cross-sectional view of an essential part showing a part in cross section.

In FIGS. 1 and 2, reference numeral 11 denotes a semiconductor device, which is, for example, several mm to several tens of mm square and has a thickness of 100 μm on the inner bottom surface 14 of the recess 13 of the package 12 as a mounting member.
The semiconductor chip 15 having a rectangular plate shape of about 500 μm is housed. Here, the mounting member is not limited to the package but may be a short substrate. This also applies to the following examples. Semiconductor chip 15
Is formed, for example, by dividing a Si wafer on which a plurality of semiconductor circuits are formed, and the active circuit elements 16 and passive circuit elements and wirings 17 not shown are provided on one side of the circuit forming surface 18 with a depth δ from the surface. It is formed in the range.

The semiconductor chip 15 has a circuit forming surface 1
It is fixed to the corresponding pad portion 20 provided on the inner bottom surface 14 of the concave portion 13 via the bump 19 which is electrically connected to the semiconductor circuit provided on the inner surface 8. The pad portion 20 is fixed to the inner bottom surface 14 of the recess 13 so as to be electrically connected to an external lead (not shown). As a result, a gap 21 corresponding to the height of the bump 19 is formed between the circuit forming surface 18 and the inner bottom surface 14 of the recess 13.

In addition, the semiconductor chip 15 is, for example, several .mu.m to penetrate so as to penetrate from the one surface which is the circuit forming surface 18 to the other surface in the vicinity of the portion where the active circuit element 16 is formed.
A plurality of cooling holes 22 having a circular cross section having a diameter of about several tens of μm, and depending on the case, a size of several hundreds of μm depending on the amount of generated heat and the like are formed. The cooling hole 22 communicates with a gap 21 between the cooling hole 22 and the inner bottom surface 14 of the recess 13.

On the other hand, one end of the cooling medium branch pipe 23 is attached to the other surface of the semiconductor chip 15 so as to include the opening portion of the cooling hole 22 inside so as to be hermetically adhered.
The other end of the cooling medium branch pipe 23 is attached so as to communicate with the side opening 26 of the cooling medium pipe 25 that hermetically seals the opening 24 of the recess 13 by fixing the outer surface of the pipe wall. Here, the cooling medium branch pipe 23 may be, for example, a bellows formed in a bellows shape.

Further, a cooling medium introducing port 27 is formed in the package 12 so as to communicate with the inside of the recess 13, and a cooling medium such as a cooling medium is supplied from a cooling medium supply source (not shown) into the recess 13 through the cooling medium introducing port 27. It is designed to introduce air. As a result, the cooling medium introduced into the concave portion 13 through the cooling medium introduction port 27 flows through the gap 21 into the cooling hole 22 and further through the cooling medium branch pipe 23 to the cooling medium pipe 25 as shown by the solid arrow. .

In the present embodiment configured as described above, when the semiconductor device 11 is operated, the cooling medium is supplied from the cooling medium source to the cooling medium introduction port 27 so that the semiconductor device 1
1, that is, the semiconductor chip 15 is cooled.

This cooling is performed by introducing the cooling medium into the concave portion 13 through the cooling medium introducing port 27 and flowing the cooling medium toward the cooling medium pipe 25 having a negative pressure than that in the concave portion 13. The cooling medium introduced into the recess 13 and diffused flows through the gap 21 along the circuit forming surface 18 of the semiconductor chip 15, and then flows from the circuit forming surface 18 through the cooling hole 22 to the other surface side of the semiconductor chip 15. The cooling medium reaching the other surface of the semiconductor chip 15 is cooled by the cooling medium branch pipe 23.
Through the side port 26 to the cooling medium pipe 25.

Although not shown, the inside of the recess 13 may have a negative pressure than the cooling medium pipe 25 so that the cooling medium is supplied from the cooling medium pipe 25 to the semiconductor chip 15 via the cooling medium branch pipe 23. . In this case, the cooling medium flows through the route opposite to the route shown by the solid arrow in FIG.

The active circuit elements 16 and the like formed on the semiconductor chip 15 as described above come into direct contact with the flow of the cooling medium, so that the heat in the main body of the semiconductor chip 15 and the package 12 and the like, which have a large thermal resistance as in the conventional case. It is cooled with very low thermal resistance without conduction. In addition, the heat transfer coefficient related to flowing the cooling medium into the cooling holes 22 formed in the semiconductor chip 15 is the same as that of the conventional cooling device (see FIG. 14).
As described above, the heat transfer coefficient is several tens of times larger than the heat transfer coefficient when the cooling medium is flown along the flat plate surface, so that very efficient cooling is performed.

Although the cooling hole 22 formed in the semiconductor chip 15 of the above embodiment has a circular cross section, the present invention is not limited to this. For example, a cooling hole 22 having a rectangular cross section also has the same operation and effect. can get.

A simulation was performed using a computer in order to confirm the cooling condition of this embodiment. In this simulation, a 5 W power FET in which a transistor element which is an active circuit element is formed at the center of one side of a 5 mm square semiconductor chip is used as a model. Here, as a device corresponding to the present embodiment, when a cooling hole having a rectangular cross section of 0.2 mm square is provided at the center of a semiconductor chip and air of a cooling medium is flowed to pass through the cooling hole to cool the semiconductor chip. The temperature of the transistor was calculated.

As a comparative example, a heat radiation fin was provided on the other surface of the semiconductor chip on which no transistor was formed, and the temperature of the transistor when air was cooled by cooling the heat radiation fin was calculated. Then, when the calculated temperature of the transistor in this example and the calculated temperature of the transistor in the comparative example were compared, it was found that the temperature in this example was lower by about 50K. From this result, it was confirmed that according to this example, efficient cooling can be performed.

Next, a second embodiment will be described with reference to FIG. FIG. 3 is a perspective view of a main part of which a part is shown in cross section.

In FIG. 3, 27 is a semiconductor device,
Inner bottom surface 14 of recess 13 of package 28 which is a mounting member
The semiconductor chip 15 is housed inside. The semiconductor chip 15 is formed by dividing a semiconductor wafer on which a plurality of semiconductor circuits are formed, and an active circuit element 16 and a passive circuit element (not shown) and wirings 17 are formed on one side of the circuit forming surface 18 from the surface to a depth. It is formed in the range of δ.

The semiconductor chip 15 has a circuit forming surface 1
It is fixed to the corresponding pad portion (not shown) provided on the inner bottom surface 14 of the concave portion 13 via the bump 19 that is electrically connected to the semiconductor circuit provided on the semiconductor integrated circuit 8. The pad portion is fixed to the inner bottom surface 14 so as to be electrically connected to the external lead. As a result, a gap 21 corresponding to the height of the bump 19 is formed between the circuit forming surface 18 and the inner bottom surface 14 of the recess 13.

Further, in the semiconductor chip 15, a plurality of cooling holes 22 are formed in the vicinity of the portion where the active circuit element 16 is formed so as to penetrate from one surface which is the circuit forming surface 18 to the other surface.
And the cooling hole 20 is formed on the inner bottom surface 14 of the recess 13.
It is communicated with the gap 21 between and.

Further, the liquid of the cooling medium supplied from a cooling medium supply source (not shown) fills the concave portion 13 of the package 28 and fills the concave portion 13 with the gap 2 as indicated by the solid arrow.
It flows from 1 to the inside of the cooling hole 22 of the semiconductor chip 15, and then flows out from the inside of the recess 13. Then, during this time, the semiconductor chip 15 immersed in the cooling medium is cooled by boiling.

In the present embodiment configured as described above, the semiconductor chip 15 is operated by operating the semiconductor device 27.
However, since the active circuit elements 16 and the like formed on the semiconductor chip 15 are in direct contact with the flow of the cooling medium, they are cooled in a state where the thermal resistance is extremely small, and very efficient cooling is achieved. Done. Further, when the cooling medium filled in the concave portion 13 flows through the cooling holes 22 of the semiconductor chip 15, the cooling holes 22 serve as boiling nuclei to perform boiling cooling and accelerate heat transfer. Become.

The shape of the cooling hole 22 is not limited to the illustrated circular cross section, and may be a rectangular cross section or the like. Further, when the heat transfer is promoted by forming the boiling nuclei, the holes are not limited to the through holes, and the bottomed holes or grooves may be used as the boiling nuclei.

Further, as in the present embodiment, the cooling medium may not be forced to flow, but only the boiling cooling may be performed.

Next, modified examples of the first and second embodiments described above will be described. FIG. 4 is a sectional view of an essential part showing a part in section.

In FIG. 4, a plurality of elongated cooling holes 30 are formed in the active circuit element 1 so as to penetrate the semiconductor chip 29.
It is formed in the vicinity of 6. Even with such a configuration, the same operation and effect as those of the first and second embodiments described above can be obtained.

Next, a third embodiment will be described with reference to FIG. FIG. 5 is a schematic sectional view.

In FIG. 5, reference numeral 31 denotes a semiconductor device, and a cavity 33 is formed inside the package 32 of the semiconductor device.
5 and the downstream space 36. And cavity 3
3, a cooling medium introduction port 37 and a cooling medium discharge port 38 are formed in the side walls of the upstream space 35 and the downstream space 36, and an opening 39 is formed in the center of the partition 34.

A semiconductor chip 40 is bonded and fixed to one surface of the partition portion 34 on the upstream space 35 side so as to cover the opening 39 so as to hermetically seal the peripheral edge of the semiconductor chip 40 to the partition portion 34. That is, in this embodiment, the partition 34 serves as a mounting member. The semiconductor chip 40 is formed in substantially the same manner as that of the first embodiment, which is formed by dividing a semiconductor wafer on which a plurality of semiconductor circuits are formed, and the circuit forming surface 18 on one side thereof is not shown. The active circuit element, the passive circuit element, and the wiring are formed in a predetermined depth range from the surface.

Further, the semiconductor chip 40 has a plurality of cooling sections each having a circular cross section so as to penetrate from the one side which is the circuit forming surface 18 to the other side in the vicinity of the active circuit elements formed in the central portion and the peripheral portion thereof. A hole 22 is formed. As a result, the upstream space 3 divided into two by the partition part 34
5 and the downstream space 36 communicate with each other through the cooling hole 22.

Further, one end of a bonding wire 41 is fixed to the semiconductor chip 40 so as to be electrically connected to the semiconductor circuit provided on the circuit forming surface 18, and the other end of the bonding wire 41 is not shown in the drawing but is provided with a partition portion 34. It is fixed to a corresponding pad portion provided on one surface so as to be electrically connected to the external lead.

A cooling medium is supplied to the cooling medium inlet 37 from a cooling medium supply source (not shown). As a result, the cooling medium introduced into the upstream space 35 through the cooling medium introduction port 37 flows through the cooling holes 22 of the semiconductor chip 40 to the downstream space 36 as indicated by the solid arrow, and the cooling medium discharge port 38. Emitted from.

Although not shown, the flow direction of the cooling medium may be opposite to the direction shown by the solid arrow in FIG.

In the present embodiment configured as described above, when the semiconductor device 31 is operated, the cooling medium is supplied from the cooling medium supply source to the cooling medium introduction port 37, so that the semiconductor device 31, that is, the semiconductor chip 40 Cooling is performed.

For cooling, the cooling medium introduced through the cooling medium inlet 37 diffuses into the upstream space 35 and flows from one surface of the circuit forming surface 18 of the semiconductor chip 40 through the cooling hole 22 to the other surface side. Then, the cooling medium reaching the downstream space 36 on the other surface side of the semiconductor chip 40 is discharged to the outside from the cooling medium discharge port 38.

As described above, the semiconductor chip 40 and the active circuit elements and the like formed therein are directly contacted with the flow of the cooling medium to be cooled. Therefore, also in this embodiment, the same efficient cooling as in the first embodiment is performed.

Next, a fourth embodiment will be described with reference to FIG.
FIG. 6 is a perspective view of a main part of a semiconductor chip, a part of which is shown in cross section.

In FIG. 6, reference numeral 42 denotes a semiconductor chip having a plurality of cooling holes 43 having a circular cross section so as to penetrate between the front and back surfaces thereof. Although not shown, the semiconductor chip 42 is housed in, for example, a package having the same structure as that of the first or third embodiment, and a cooling medium is provided in the cooling hole 43 to form a semiconductor device. There is.

Further, the semiconductor chip 42 is provided with the active circuit element 16 constituting the semiconductor circuit, the passive circuit element (not shown) and the wiring 17 on one surface 18. Further, the semiconductor chip 42 is fixed to a pad portion (not shown) via the bump 19 which is electrically connected to the semiconductor circuit. Further cooling holes 43
A plurality of active circuit elements 16 and wirings 17 are formed on the inner wall surface of the so as to face the surface. Here, the wiring 17 is not limited to the wiring extending in the cooling hole 43 as shown in the drawing.

The semiconductor chip 42 configured as described above
In this embodiment, the semiconductor chip 42 is supplied with a cooling medium from a cooling medium supply source so as to flow through the cooling holes 43 of the semiconductor chip 42 when the semiconductor device is operated.
Cooling is performed. Therefore, the active circuit element 16 and the like formed on the one surface 18 of the semiconductor chip 42 and the inner wall surface of the cooling hole 43 are cooled by directly contacting the flow of the cooling medium. Therefore, also in this embodiment, the same efficient cooling as in the first embodiment is performed.

On the other hand, according to the present embodiment, the cooling holes 43
Since the active circuit element 16 and the like are provided on the inner wall surface of the device, it is possible to increase the degree of integration without the need to miniaturize the structure.

The semiconductor chip 42 according to this embodiment may be applied to the second embodiment for boil cooling.

Next, a fifth embodiment will be described with reference to FIGS. 7 and 8. FIG. 7 is a perspective view of a main part of a semiconductor chip, a part of which is shown in cross section, and FIG. 8 is a partial circuit diagram.

7 and 8, reference numeral 44 denotes a semiconductor chip on which a semiconductor circuit is formed, and a plurality of cooling holes 45 having a circular cross section are formed so as to penetrate between the front and back surfaces of the semiconductor chip. Although not shown, the semiconductor chip 44 is housed in a package having the same configuration as that of the first or third embodiment shown in FIG. 1 or 5, and the cooling medium is allowed to flow through the cooling hole 45. A semiconductor device is formed.

The semiconductor chip 44 is formed by, for example, an epitaxial growth method or a direct bonding technique for a Si wafer, which is the first layer 46 ₁ , the second layer 46 ₂ , ...
The uppermost layer 46 _n is laminated in this order. Each layer 46
_As shown in FIG. 8, a transistor 47 of an active circuit element, a capacitor 48 of a passive circuit element, and a bit line 49, which form a semiconductor circuit, are formed at ₁ , 46 ₂ , ..., 46 _n .

That is, each layer 46 is provided around the cooling hole 45.
_1, 46 _2, ..., 46 first impurity implantation region 50 ₁ at a distance from each other in _n, 50 _2, ..., ₁ 50 _n and the second impurity-implanted region 51, 51 _2, ..., 51 _n are provided, Further, each layer 46 ₁ , 46 ₂ , so as to form the inner wall surface of the cooling hole 45,
, 46 _n , the oxide film 52 and the first wiring 53 are layered. Further, each layer 46 ₁ , 46 ₂ , ..., 46
The first impurity implantation region in _{n 50 1, 50 2, ...} , 50
second wiring connected to _{n 49 1, 49 2, ...} , 49 n are provided.

As a result, the transistors 47 ₁ , 47 ₂ ,
, 47 _n , the first wiring 53 is used as a gate electrode, the oxide film 52 is used as a gate insulating film, and the first impurity implantation region 50 is used.
₁ , 50 ₂ , ..., 50 _n and the second impurity implantation region 5
1 _1, 51 _2, ..., it formed a 51 _n source, as a drain region. Furthermore, capacitors 48 ₁ , 48 ₂ , ...,
48 _n is the second impurity implantation region 51 ₁ , 51 ₂ , ...,
51 _n and the base material of each layer 46 ₁ , 46 ₂ , ..., 46 _n . Note that the first wiring 53 is a word line, the second wiring 49 _1, 49 _2, ..., 49 _n is the bit line.

Then, one end of a bonding wire (not shown) is fixed so as to be electrically connected to the semiconductor circuit, and the other end is fixed to a corresponding pad portion (not shown) provided on the package so as to be electrically connected to the external lead.

The semiconductor chip 44 configured as described above
In this embodiment, the semiconductor chip 44 is supplied with the cooling medium from the cooling medium supply source so as to flow through the cooling holes 45 of the semiconductor chip 44 when the semiconductor device is operated.
Cooling is performed. Therefore, the transistors 47 ₁ , 47 ₂ , ..., 47 of the active circuit elements formed on the surface of the uppermost layer 46 _n of the semiconductor chip 44 and the inner wall surface of the cooling hole 45.
_{n and the} like are cooled by the flow of the cooling medium.
Therefore, also in this embodiment, the same efficient cooling as in the first embodiment is performed.

The semiconductor chip 44 according to this embodiment may be applied to the second embodiment to perform boiling cooling.

Further, since the transistors 47 ₁ , 47 ₂ , ..., 47 _n are provided so as to face the inner wall surface of the cooling hole 45, miniaturization of the structure is required as in the fourth embodiment. It is possible to increase the degree of integration without doing so.

Next, a sixth embodiment will be described with reference to FIG.
FIG. 9 is a perspective view of a main part of a semiconductor chip, a part of which is shown in cross section.

In FIG. 9, reference numeral 55 is a semiconductor chip, and a plurality of cooling holes 56 having a circular cross section are formed so as to penetrate between the front and back surfaces thereof. The semiconductor chip 55 is
Although not shown, the semiconductor device is formed by being housed in a package having the same structure as that of the first or third embodiment described above, and being provided so as to allow the cooling medium to flow through the cooling holes 56.

The semiconductor chip 55 is made of, for example, GaA.
The s epitaxial growth, first layer 57 ₁ is a lowermost layer in Fig. 8, second layer 57 _2, ..., are stacked in this order of the top layer 57 _n. Each layer 57 ₁ , 57 ₂ ,
... around the edge forming the inner wall surface of the cooling hole 56 of 57 _n , transistors 58 ₁ , 58 ₂ , ...
N-type region 59 constituting the _{58 n 1, 59 2, ...} , 59 n
, And the first n ⁺ type regions 60 ₁ , 60 ₂ , ..., 60 _n , and the second n ⁺ type regions 61 ₁ , 61 ₂ , ..., 61 _n are exposed.

Further, n-type regions 59 ₁ , 59 ₂ , ..., 59 _n and a first n ⁺ -type region 60 are formed on the inner wall surface of the cooling hole 56.
₁ , 60 ₂ , ..., 60 _n , second n ⁺ type regions 61 ₁ , 6
A first wiring 62, a second wiring 63, and a third wiring 64 are provided so as to connect 1 ₂ , ..., 61 _n in the axial direction. As a result, the first wiring 62 serves as a gate electrode, the second wiring 63 and the third wiring 64 serve as a source electrode and a drain electrode, and a large number of transistors 58 ₁ , 58 ₂ ,.
The semiconductor circuit has a configuration in which _n is connected in parallel.

Then, one end of a bonding wire (not shown) is fixed so as to be electrically connected to the semiconductor circuit, and the other end of the bonding wire is fixed to a corresponding pad portion provided on the package (not shown).

The semiconductor chip 55 configured as described above
In this embodiment, the semiconductor chip 55 is supplied with a cooling medium from the cooling medium supply source so as to flow through the cooling holes 56 of the semiconductor chip 55 when the semiconductor device is operated.
Cooling is performed. Therefore, the transistors 58 ₁ , 58 ₂ , ..., 58 _n of the active circuit elements formed so as to be exposed on the inner wall surface of the cooling hole 56 of the semiconductor chip 55 are cooled by directly contacting the flow of the cooling medium. become. Therefore, also in this embodiment, the same efficient cooling as in the first embodiment is performed.

Further, since the transistors 58 ₁ , 58 ₂ , ..., 58 _n are provided on the inner wall surface of the cooling hole 56, the degree of integration can be improved without requiring the fine structure as in the fourth embodiment. It is possible to increase.

The semiconductor chip 55 according to this embodiment may be applied to the second embodiment to perform boiling cooling.

Next, a seventh embodiment will be described with reference to FIG. FIG. 10 is a perspective view of a main part of a semiconductor chip, a part of which is shown in cross section.

In FIG. 10, reference numeral 65 is a semiconductor chip,
A plurality of cooling holes 66 having a circular cross section are formed so as to penetrate between the front and back surfaces. Although not shown, the semiconductor chip 65 is housed in a package having the same structure as that of the third embodiment, and a semiconductor device is formed so that the cooling medium flows through the cooling holes 66.

The semiconductor chip 65 is made of, for example, GaA.
s cooling hole 66 formed so as to penetrate the single crystal substrate
A transistor 6 is axially formed on the inner wall surface by ion implantation.
7, an n-type region 68 and a first n ⁺ -type region 69,
The second n ⁺ type region 70 is formed so as to be exposed. Further, a first wiring 71, a second wiring 72, and a third wiring 73 extending in the axial direction are provided in each of these regions 68, 69, and 70, and the first wiring 71 is the gate electrode and the second wiring. Wiring 7
The second and third wirings 73 serve as a source electrode and a drain electrode to form a large-area transistor 67 on the inner wall surface of the cooling hole 66.

Then, one end of a bonding wire (not shown) is fixed so as to be electrically connected to the semiconductor circuit including the transistor 67, and the other end of the bonding wire is fixed to a corresponding pad portion provided on the package (not shown).

The semiconductor chip 65 configured as described above
In this embodiment, the semiconductor chip 65 is supplied with a cooling medium from a cooling medium supply source so as to flow through the cooling holes 66 of the semiconductor chip 65 when the semiconductor device is operated.
Cooling is performed. Therefore, the transistor 67 of the active circuit element, which is formed so as to be exposed on the inner wall surface portion of the cooling hole 66 of the semiconductor chip 65 and which allows a large current to flow in a large area.
Will be cooled in direct contact with the flow of the cooling medium. Therefore, also in this embodiment, the same efficient cooling as in the first embodiment is performed.

Further, since the transistor 67 is provided on the inner wall surface of the cooling hole 66, it is possible to increase the degree of integration without the need to miniaturize the structure as in the fourth embodiment.

The semiconductor chip 65 according to this embodiment may be applied to the second embodiment to perform boiling cooling.

Next, an eighth embodiment will be described with reference to FIGS. 11 and 12. FIG. 11 is a schematic cross-sectional view, and FIG. 12 is a cross-sectional view of an essential part showing a part in cross section.

In FIGS. 11 and 12, reference numeral 81 denotes a semiconductor device, which is, for example, several mm to several tens of mm square and has a thickness of 100 μm to 500 μ on the inner bottom surface 14 of the recess 13 of the package 12.
The semiconductor chip 82 having a rectangular plate shape of about m is housed. The semiconductor chip 82 is formed, for example, by dividing an Si wafer on which a plurality of semiconductor circuits are formed.

The semiconductor chip 82 is fixed to the corresponding pad portion (not shown) provided on the inner bottom surface 14 of the recess 13 through the bump 19 which is electrically connected to the semiconductor circuit on one side. The pad portion is fixed to the inner bottom surface 14 of the recess 13 so as to be electrically connected to an external lead (not shown). As a result, one surface of the semiconductor chip 82 and the inner bottom surface 1 of the recess 13 are
A gap corresponding to the height of the bump 19 is formed between the bumps 4 and 4.

On the other hand, on the other surface of the semiconductor chip 82, a plurality of cooling grooves 83 having a rectangular cross section are formed.
An active circuit element 84 constituting a semiconductor circuit is formed so as to face the side wall surface of No. 3. On the other surface of the semiconductor chip 82 housed in the recess 13, for example, a cooling medium branch pipe 23 formed in a bellows shape is hermetically sealed at one end so as to include at least a part of all openings of the cooling groove 83 therein. It is attached so as to be in close contact with.

Then, for example, cooling air, which is a cooling medium, is introduced into the recess 13 of the package 12 through the cooling medium introduction port 27, and the introduced cooling medium flows in the cooling groove 83 in the groove direction as indicated by the solid arrow. Are collected in the cooling medium branch pipe 23 and flow from the side port 26 to the cooling medium pipe 25.

In the present embodiment configured as described above, when the semiconductor device 81 is operated, the cooling medium is supplied from the cooling medium source to the cooling medium introduction port 27, and the semiconductor device 8
1, that is, the semiconductor chip 82 is cooled. This cooling is performed on the active circuit element 84 provided in the cooling groove 83 of the semiconductor chip 82 when the cooling medium flows from the cooling medium introduction port 27 toward the cooling medium pipe 25 having a negative pressure. This is performed by dissipating the heat generated in the active circuit element 84 by causing the medium to directly contact.

As described above, the active circuit element 84 comes into direct contact with the flow of the cooling medium and is cooled in a state where the thermal resistance is extremely small, so that the cooling is performed very efficiently.

Although the cooling groove 83 has a rectangular cross section in the above embodiment, it is not limited to this and may have a V-shape or the like. Further, even if the semiconductor chip 82 has a laminated structure as in the fifth and sixth embodiments, the same action and effect as those in the eighth embodiment can be obtained.

Next, a ninth embodiment will be described with reference to FIG. FIG. 13 is a schematic sectional view.

In FIG. 13, reference numeral 85 denotes a semiconductor device, which is configured to house a rectangular plate-shaped semiconductor chip 88 in the inner bottom surface 14 of the recess 87 of the package 86. The semiconductor chip 88 is formed, for example, by dividing a Si wafer on which a plurality of semiconductor circuits are formed, and active circuit elements, passive circuit elements, and wiring (not shown) are formed on the circuit forming surface 18 on one side thereof.

The semiconductor chip 88 is fixed to the corresponding pad portion (not shown) provided on the inner bottom surface 14 of the recess 87 via the bump 19 which is electrically connected to the semiconductor circuit on one side. The pad portion is fixed to the inner bottom surface 14 of the recess 87 so as to be electrically connected to an external lead (not shown). As a result, one surface of the semiconductor chip 88 and the inner bottom surface 1 of the recess 87 are
A gap corresponding to the height of the bump 19 is formed between the bumps 4 and 4.

On the other hand, on the other surface of the semiconductor chip 88, a cooling plate 89 is provided so that one surface is in close contact with this surface. The cooling plate 89 has a plurality of cooling holes 90 formed in a direction parallel to the main surface thereof, and an opening 91 communicating with the cooling holes 90 is formed at the center of the other surface. Also, the cooling plate 89
On the other surface, for example, a cooling medium branch pipe 2 formed in a bellows shape.
3 is attached so that one end is airtightly adhered so as to include the opening 91 inside.

Then, for example, cooling air, which is a cooling medium, is introduced into the recess 87 of the package 86 through the cooling medium introduction port 27, and the introduced cooling medium passes through the inside of the cooling hole 90 of the cooling plate 89 as shown by a solid arrow. The flow is collected from the opening 91 to the cooling medium branch pipe 23 and is collected from the side port 26 to the cooling medium pipe 25.
It is supposed to flow to.

In the present embodiment configured as described above, when the semiconductor device 85 is operated, the cooling medium is supplied from the cooling medium source to the cooling medium introduction port 27, and the semiconductor device 8
5, that is, the semiconductor chip 88 is cooled. This cooling is performed by a cooling plate 89 provided so as to be in close contact with the other surface of the semiconductor chip 88 when the cooling medium flows from the cooling medium introduction port 27 toward the cooling medium pipe 25 having a negative pressure than that. When the cooling medium flows in the cooling holes 90, the heat generated in the active circuit elements of the semiconductor chip 88 is transferred to the cooling medium via the cooling plate 89 and is dissipated.

As described above, the semiconductor chip 88 having the active circuit element is cooled by coming into contact with the flow of the cooling medium only through the cooling plate 89, so that the thermal resistance without the package 86 is small. Efficient cooling is achieved.

[0089]

As is apparent from the above description, according to the present invention, a semiconductor chip can be efficiently and sufficiently cooled, and an active circuit element or the like can be formed on the semiconductor chip with a high degree of integration. And so on.

[Brief description of drawings]

FIG. 1 is a schematic sectional view showing a first embodiment of the present invention.

FIG. 2 is a perspective view of an essential part showing a part in section according to the first embodiment of the present invention.

FIG. 3 is a perspective view of an essential part showing a part of a second embodiment of the present invention in section.

FIG. 4 is a perspective view of a main part showing a cross section of a part of the first and second embodiments of the present invention.

FIG. 5 is a schematic sectional view showing a third embodiment of the present invention.

FIG. 6 is a perspective view of a main part of a semiconductor chip showing a part in section according to a fourth embodiment of the present invention.

FIG. 7 is a perspective view of a main part of a semiconductor chip showing a part in section according to a fifth embodiment of the present invention.

FIG. 8 is a partial circuit diagram according to a fifth embodiment of the present invention.

FIG. 9 is a perspective view of a main part of a semiconductor chip showing a part in section according to a sixth embodiment of the present invention.

FIG. 10 is a perspective view of a main part of a semiconductor chip showing a part in section according to a seventh embodiment of the present invention.

FIG. 11 is a schematic sectional view showing an eighth embodiment of the present invention.

FIG. 12 is a perspective view of an essential part of a semiconductor chip showing a part in section according to an eighth embodiment of the present invention.

FIG. 13 is a schematic sectional view showing a ninth embodiment of the present invention.

FIG. 14 is a schematic sectional view showing a conventional example.

[Explanation of symbols]

 15 ... Semiconductor chip 16 ... Active circuit element 22 ... Cooling hole

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yasushi Godai, 4-4 Suehiro-cho, Tsurumi-ku, Yokohama-shi, Kanagawa Prefecture, Keio Plant, Toshiba Corp. Address Stock Company In Toshiba Research and Development Center (72) Inventor Fuminori Matsuoka 1 Komukai Toshiba-cho, Sachi-ku, Kawasaki City, Kanagawa Stock Company In Toshiba Research and Development Center

Claims (9)

[Claims] 1. A semiconductor chip having a circuit element formed thereon,
A semiconductor device comprising: a through hole provided so as to penetrate the semiconductor chip; and a cooling means for cooling the semiconductor chip using a cooling medium. 2. The semiconductor device according to claim 1, wherein the cooling unit is a convection cooling unit that allows the cooling medium to flow in the through hole. 3. The semiconductor device according to claim 1, wherein the cooling unit is a boiling cooling unit having the through hole as a boiling nucleus. 4. The semiconductor device according to claim 1, wherein at least one of the circuit elements is formed to face an inner wall surface of the through hole. 5. A semiconductor chip having a circuit element formed thereon,
A groove provided in this semiconductor chip, and a cooling means for cooling the semiconductor chip using a cooling medium,
At least one of the circuit elements is formed so as to face an inner wall surface of the groove. 6. The semiconductor device according to claim 5, wherein the cooling unit is a convection cooling unit that allows the cooling medium to flow in the groove. 7. The semiconductor device according to claim 5, wherein the cooling unit is a boiling cooling unit having the groove as a boiling nucleus. 8. A semiconductor chip having at least one through hole, a mounting member on which the semiconductor chip is mounted through a predetermined gap, and a means for allowing a cooling medium to flow through the gap and the through hole. A semiconductor device comprising: 9. A mounting member having a semiconductor chip having at least one through hole, at least one opening, and mounting the semiconductor chip so that the opening and the through hole communicate with each other. A semiconductor device comprising: a means for allowing a cooling medium to flow through the through hole and the opening.