JPH08241899A - Bonding of chip - Google Patents

Abstract

PURPOSE: To provide a chip bonding method capable of eliminating and suppressing the generation of a void (bubble) within a bond when a chip is bonded to a substrate with the bond. CONSTITUTION: A bond 2 is spread on the upper surface of a substrate 1 in a matrix-form with even number (4) of spots to which the bond is spread being arranged longitudinally and laterally respectively. In this case, the spread amount of the bond 2a at the 4 central points is made more than that at the other points. Then, a chip 3 is mounted on the bond 2, 2a and pressed slightly. Thereupon, the bond 2a at the central 4 points with increased amount is spread to neighborhoods while pushing out inside air, and then the other bond 2 is spread also to neighborhoods so that all bond 2 is unified. Thus, a void 4 does not exist at all internally or is generated scacsely, and the chip 3 can be bonded to the substrate 1 satisfactorily.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip bonding method for bonding a chip to a substrate by bonding.

[0002]

2. Description of the Related Art A chip cut out from a wafer is generally bonded to a substrate such as a lead frame or a printed circuit board by bonding. The conventional chip bonding method will be described below.

7A and 7B are explanatory views of a conventional chip bonding method. FIG. 7A shows a state where a bond is applied to a substrate, and FIG. 7B shows a state where a chip is bonded onto the bond. Shows. In addition, FIG.
In (b), the upper diagram is a cross-sectional view taken along the line AA of the lower diagram and the lower diagram is a plan view of the substrate. In the lower diagram of (b), the chip 3 is removed.

First, as shown in FIG. 7A, a large number of bonds 2 are spot-wise applied in a matrix on the upper surface of the substrate 1. The bond 2 is applied in the same amount in all 4 (even) vertical and horizontal n. This bond application is performed by a transfer pin or a dispenser.

As shown in FIG. 7A, a bond 2 is formed on the substrate 1.
After coating, the chip 3 is mounted on the bond 2 as shown in FIG. In this case, the chip 3 is mounted by pressing it lightly against the bond 2, so that the bond 2 applied spotwise spreads to the periphery. Therefore, FIG.
The diameter of the bond 2 shown in the lower diagram of FIG. 7 (b) is larger than that of the bond 2 shown in the lower diagram of (a). The chip 3 is mounted on the bond 2 by an automatic mounting device such as a die bonder.

[0006]

In FIG. 7 (b),
The blackened portions are voids (air bubbles) 4. The void 4 is the air that has lost the escape route and is trapped inside when transitioning from (a) to (b) in FIG. 7. Void 4
Reduces the bonding force of the chip 3. When the substrate 1 is incorporated into an electronic device and driven, the chip 3
Self-heats due to internal resistance, but this heat causes the voids 4 to thermally expand, and in the worst case, the chip 3 is destroyed. However, as shown in FIG. 7B, the conventional chip bonding method has a problem in that a large number of voids 4 that cause the above-described adverse effects are likely to occur in the substrate 1 and the chip 3.

Therefore, an object of the present invention is to provide a chip bonding method capable of eliminating or suppressing the occurrence of voids.

[0008]

To this end, the present invention is a chip bonding method in which a bond is spot-wise applied in a matrix form on the upper surface of a substrate, and a chip is mounted on the bond. An even number of m and horizontal n are applied, and the application amount of the four central points is made larger than the application amounts of the other points.

[0009]

According to the above structure, when the chip is mounted on the bond applied to the substrate and the chip is lightly pressed, the central bond with a large coating amount spreads to the surroundings while pushing air outward. Therefore, the amount of voids generated inside the bond is significantly reduced.

[0010]

【Example】

(Embodiment 1) Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is an explanatory diagram of a chip bonding method according to a first embodiment of the present invention. (A) shows a state in which the bonds 2 and 2a are applied to the substrate 1, (b) shows a state immediately after mounting the chip 3 on the bonds 2 and 2a, and (c) shows the chip 3
Shows a state in which bonding is completed by lightly pressing against the bonds 2 and 2a. Further, in (a), (b) and (c), the upper diagram is a cross-sectional view taken along the line BB of the lower diagram, and the lower diagram is a plan view of the substrate. Note that the chips 3 are omitted in the lower diagrams of (b) and (c).

Next, a chip bonding method will be described. First, as shown in FIG. 1A, an even number of bonds 2 (vertical m and horizontal n) are formed on the upper surface of the substrate 1 (both 4 in this embodiment).
Apply one by one) in a matrix. In this case, as shown in the figure, the bonds 4a at the four central points are increased in amount, and the applied amount is made larger than the applied amounts at the other points. Specific means for increasing the coating amount will be described later with reference to FIGS. 5 and 6.

Bond 2 (2a) as shown in FIG. 1 (a)
After coating, the chip 3 is mounted on the bond 2 (2a) by a die bonder as shown in FIG. 1 (b).
Press lightly on bond 2 (2a). Then, the bond 2 (2a) on the substrate 1 is crushed by the lower surface of the chip 3,
As shown in the lower diagram of (b), the diameter of the bond 2 (2a) increases and spreads to the surroundings.

FIG. 1C shows a completed state of bonding. In this state, since the chip 3 is pressed against the bond 2, the bond 2 is sufficiently expanded and all the bonds 2 are integrated. When the chip 3 is strongly pressed against the bond 2, the occurrence of the void 4 is reduced, but the bond 2 is squeezed out to the periphery of the chip 3, and in the worst case, the bond 2 squeezed out to the periphery of the chip 3 is generated. As it rises to the top surface, the chip 3 must be pressed lightly against the bond 2.

Here, as described above, by increasing the amount of the bonds 4a at the four points in the center, when the bonds 2a at the four points are expanded, the air inside is pushed out to the outside. Therefore, as shown in the lower diagram of (c), the four bond 2 at the center
The void 4 is slightly generated only by the central air that cannot be escaped to the outside because it is surrounded by a. As described above, according to this chip bonding method, the air in the inside can be pushed out by spreading the centrally increased four-point bonds 2a to the surroundings, so that the generation of voids 4 can be suppressed to a minimum. it can. It should be noted that the voids 4 of this degree can substantially eliminate the above-mentioned adverse effects of the voids 4.

(Embodiment 2) FIG. 2 is an explanatory view of a chip bonding method according to a second embodiment of the present invention. (A) shows a state where the bonds 2 and 2b are applied to the substrate 1, (b) shows a state immediately after mounting the chip 3 on the bond 1, and (c) shows the state where the chip 3 is lightly pressed against the bonds 2 and 2b. It shows a state in which bonding is completed. Also (a) (b) (c)
In the above, the upper diagram is a cross-sectional view taken along line C-C of the lower diagram, and the lower diagram is a plan view of the substrate 1. Further, in the lower diagrams of (b) and (c), the chip 3 is removed.

Next, a chip bonding method will be described. First, as shown in FIG. 2A, an odd number of bonds 2 (vertical m and horizontal n) (both are 5 in this embodiment) are formed on the upper surface of the substrate 1.
Pieces) Apply in matrix. In this case, as shown in the drawing, the amount of the bond 2b at one point in the center is increased, and the amount of application thereof is made larger than the amounts of application at other points.

Next, as shown in (b), the chip 3 is mounted on the bond 2 and lightly pressed against the bond 2. Then, the central bond 2b that first comes into contact with the lower surface of the chip 3 spreads greatly to the periphery, then the other bonds 2 also spread to the periphery, and finally all the bonds 2 are integrated as shown in (c), and the chip 3 Are completely bonded. In the second embodiment, since the central bond 2b spreads largely to the periphery first, the air inside is completely pushed out to the outside, so that the void 4 does not occur at all.

As in the second embodiment, when an odd number of the bonds 2 are applied to both the vertical m and the horizontal n, the amount of the bond adjacent to the central bond 2b in the vertical direction and the lateral direction is set to the central bond 2b. The same amount may be used.

(Embodiment 3) FIG. 3 is an explanatory view of a chip bonding method of a third embodiment of the present invention. (A) shows a state in which the bonds 2 and 2c are applied to the substrate 1, and (b) shows a state immediately after the chip 3 is mounted on the bonds 2 and 2c.
(C) shows a state where the chip 3 is lightly pressed against the bonds 2 and 2c to complete the bonding. Also (a)
In (b) and (c), the upper diagram is a cross-sectional view taken along line D-D of the lower diagram, and the lower diagram is a plan view of the substrate 1. In the lower diagrams of (b) and (c), the chip 3 is removed.

Next, a chip bonding method will be described. First, as shown in FIG. 3A, the bond 2 is applied on the upper surface of the substrate 1 in an even number (n = 4 in this embodiment) and in an odd number (5 in this embodiment). In this case, as shown in the figure, the bonds 2c at the two central points are increased in amount, and the applied amount is made larger than the applied amounts at the other points.

Next, as shown in (b), the chip 3 is mounted on the bond 2 and lightly pressed against the bond 2 (2c). Then, the central bond 2c that first contacts the lower surface of the chip 3
Spread greatly around, and then the other bonds 2 also spread around, respectively, and finally all the bonds 2 are integrated as shown in (c), and the chip 3 is completely bonded. In the third embodiment, since the central bond 2c spreads greatly to the surroundings, the air inside is completely pushed out to the outside, so that the void 4 does not occur at all. As described above, according to this embodiment, when the chip 3 is lightly pressed against the bond 2 to be mounted, the air inside is pushed out to the outside due to the expansion of the bond 2, so that the generation of voids is suppressed and eliminated, and the chip 3 Can be bonded well.

Next, an apparatus for adjusting the amount of the bond 2 spotwise applied to the substrate 1 will be described. FIG.
FIG. 3 is an explanatory diagram showing a first example of a chip bonding apparatus according to an embodiment of the present invention. Reference numeral 10 denotes a shaft, and a transfer head 11 is detachably attached to the lower end of the shaft. The transfer head 11 is formed by projecting a plurality of transfer pins 13 and 14 on the lower surface of the block 12. The transfer pins 13 and 14 are arranged in an array of 5 in each of vertical and horizontal, and the central transfer pin 14 has a large cross-sectional area (the diameter of the transfer pin when it is a cylinder) and the disconnection of the other transfer pins 13. The area is small. The transfer head 11 of this example is used to increase the coating amount at one point in the center shown in FIG.

The bond 2 is stored in the bond tray 15, and the transfer head 11 is moved up and down by the information of the bond tray 15 to attach the bond 2 to the lower surface of the transfer pins 13 and 14, and then the transfer head. The bond 2 attached to the lower surfaces of the transfer pins 13 and 14 is moved by moving 11 above the substrate 1 (see arrow a) and performing vertical movement there.
Is transferred to the substrate 1. After that, die bonder collet 1
The chip 3 vacuum-adsorbed by 6 is mounted on the bond 2 and bonded (see arrow b).

The transfer pin 13 is used as a means for applying the bond 2.
When using 14, the amount of the bond 2 applied can be changed by changing the cross-sectional areas of the transfer pins 13 and 14. Of course, in the case of the embodiment shown in FIG. 1, the cross-sectional area of the four central pins is increased or the length is shortened,
Further, in the case of the embodiment shown in FIG. 3, the cross-sectional area of the two central pins is increased or the length thereof is shortened.

FIG. 5 is an explanatory view showing a second example of the chip bonding apparatus in one embodiment of the present invention. 20
Is a bond application head, a syringe 21 storing the bond 2 and a nozzle 22 mounted below the syringe 21.
It consists of. The nozzle 22 is a hollow needle 2
3 and 24, the bond 2 is discharged from the needles 23 and 24 to apply the bond 2 to the substrate 1 in a matrix.

A compressed air supply means (not shown) for supplying compressed air into the syringe 21 is connected to the syringe 21. The inner diameter of the central needle 24 is larger than that of the other needles 23, and when compressed air is supplied into the syringe 21, the needle 24 will not move to the other needles 2.
A larger amount of bond 2 than 3 is discharged. In this way, by making the inner diameter of the needle 24 larger than the other needles 23, the amount of the bond 2 applied can be adjusted. Therefore, by increasing the diameter of the nozzle corresponding to the position where a large amount of the bond 2 is desired to be applied, as shown in FIGS.
As shown in, the bond 2 can be applied to the substrate 1 in a matrix form by a single application operation (see arrow a). When the bond 2 is applied to the substrate 1, the collet 1 of the die bonder
The chip 3 vacuum-adsorbed by 6 is mounted on the bond 2 and bonded (see arrow b).

FIG. 6 is an explanatory view showing a third example of the chip bonding apparatus in one embodiment of the present invention. Figure 5
The same configurations as the structure shown in FIG. A nozzle 25 is provided with a single hollow needle 26. The bond application head 20 applies the bonds 2 one by one while moving the pitch as indicated by the arrow a. In a place where a large amount of the bond 2 is desired to be applied, the bond 2 is applied by prolonging the discharge time of the bond 2 or increasing the pressure of the compressed air applied to the syringe 21. In this way, from one needle 26 to the bond 2
Even in the case of applying, it is possible to apply in a matrix while adjusting the amount of the bond 2.

[0028]

As described above, according to the present invention, it is possible to suppress / eliminate the occurrence of voids inside the bond to be bonded to the chip substrate and bond the chip well.

When a transfer pin is used as the bond applying means, the application amount of a predetermined bond can be easily increased by simply changing the cross-sectional area and length of the transfer pin, and the bond application can be performed. The amount can be controlled accurately.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of a chip bonding method according to a first embodiment of the present invention.

FIG. 2 is an explanatory diagram of a chip bonding method according to a second embodiment of the present invention.

FIG. 3 is an explanatory diagram of a chip bonding method according to a third embodiment of the present invention.

FIG. 4 is an explanatory diagram showing a first example of a chip bonding apparatus according to an embodiment of the present invention.

FIG. 5 is an explanatory diagram showing a second example of a chip bonding apparatus according to an embodiment of the present invention.

FIG. 6 is an explanatory diagram showing a third example of a chip bonding apparatus according to an embodiment of the present invention.

FIG. 7 is an explanatory diagram of a conventional chip bonding method.

[Explanation of symbols]

 1 Substrate 2, 2a, 2b, 2c Bond 3 Chip 4 Void (Transfer) 11 Transfer Head 13, 14 Transfer Pin 20 Bond Application Head 23, 24, 26 Needle

Claims (3)

[Claims] 1. A bond of m × n spots on the upper surface of a substrate.
Is a chip bonding method in which a chip is mounted on this bond by applying it in the form of a matrix, and an even number of the m and n bonds are applied, and the central four application amounts are applied to other points. Chip bonding method characterized by more than 2. The bond is spotted on the upper surface of the substrate by m × n.
A chip bonding method in which the chips are mounted on the bond by applying the chips in a matrix form, and an odd number of m and n of the bonds are applied, and the application amount of one point in the center is applied to the other points. Chip bonding method characterized by more than 3. The bond is spotted on the upper surface of the substrate by m × n.
Is a chip bonding method in which a chip is mounted on the bond by applying it in a matrix form, in which one of m and n of the bond is applied in an even number and the other is applied in an odd number. A chip bonding method characterized in that the amount of application of dots is made larger than the amount of application of other points.