JPH0823048A - P/b-lcc type semiconductor device - Google Patents

P/b-lcc type semiconductor device

Info

Publication number
JPH0823048A
JPH0823048A JP15557694A JP15557694A JPH0823048A JP H0823048 A JPH0823048 A JP H0823048A JP 15557694 A JP15557694 A JP 15557694A JP 15557694 A JP15557694 A JP 15557694A JP H0823048 A JPH0823048 A JP H0823048A
Authority
JP
Japan
Prior art keywords
lcc
type semiconductor
electrode pads
electrode pad
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15557694A
Other languages
Japanese (ja)
Inventor
Toshiyuki Takahashi
敏幸 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Akita Electronics Systems Co Ltd
Original Assignee
Hitachi Ltd
Akita Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Akita Electronics Co Ltd filed Critical Hitachi Ltd
Priority to JP15557694A priority Critical patent/JPH0823048A/en
Publication of JPH0823048A publication Critical patent/JPH0823048A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps

Abstract

PURPOSE:To prevent the positional deviation of a plurality of PCB-LCC substrates to be mounted by a method wherein each electrode pad of a Print/ Board-Leadless Chip Carrier (P/B-LCC) type semiconductor device is formed into the shape with which they are fitted with each other. CONSTITUTION:A wiring and an electrode, on the side where a semiconductor chip is mounted, and a recessed electrode pad 2 (Cu) on the opposite side of the above-mentioned side, or a protruding electrode pad 4 (Cu) are provided respectively on a Print/Board-Leadless Chip Carrier (PCB-LCC) substrate 1. The protruding electrode pad 4 and the recessed electrode pad 2 are opposingly fitted, and they are connected by soldering. As above-mentioned, the electrode pads are fixed and connected by soldering when the PCB-LCC substrate 1 is mounted, and their positional deviation can be prevented.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、P/B−LCC(Pr
int/Board−Leadless Chip Ca
rrier)型半導体装置に関し、特に、P/B−LC
C基板に適用して有効な技術に関するものである。
The present invention relates to P / B-LCC (Pr
int / Board-Leadless Chip Ca
and a P / B-LC
The present invention relates to a technique effectively applied to a C substrate.

【0002】[0002]

【従来の技術】従来のP/B−LCC基板を図3及び図
4を用いて詳細に説明する。
2. Description of the Related Art A conventional P / B-LCC substrate will be described in detail with reference to FIGS.

【0003】図3は、P/B−LCC基板の電極用パッ
ドを説明するための俯瞰図であり、図4は、そのP/B
−LCC基板の電極用パッド間の半田接続を説明するた
めの図である。
FIG. 3 is a bird's-eye view for explaining the electrode pads of the P / B-LCC substrate, and FIG. 4 is the P / B thereof.
FIG. 6 is a diagram for explaining solder connection between electrode pads of an LCC substrate.

【0004】図3及び図4において、1はP/B−LC
C基板、3は半田、5は従来型電極パッドをそれぞれ示
す。
In FIGS. 3 and 4, 1 is a P / B-LC
C substrate, 3 is solder, and 5 is a conventional electrode pad, respectively.

【0005】従来のP/B−LCC基板における電極用
パッド3は、図3に示すように、チップ搭載面側と電気
的に接続するためのP/B−LCC基板を貫通したビア
ホールが電極用パッド3の一端から設けられており、そ
の電極用パッド3の半田接続部分は平面となっている。
As shown in FIG. 3, the electrode pad 3 in the conventional P / B-LCC substrate has a via hole for the electrode which penetrates the P / B-LCC substrate for electrically connecting to the chip mounting surface side. It is provided from one end of the pad 3, and the solder connection portion of the electrode pad 3 is flat.

【0006】また、積載時には、図4に示すように、互
いの電極用パッドの平面同士を半田で接続する。
Further, at the time of loading, as shown in FIG. 4, the flat surfaces of the electrode pads are connected to each other by soldering.

【0007】[0007]

【発明が解決しようとする課題】本発明者は、上記従来
技術を検討した結果、以下の問題点を見いだした。
DISCLOSURE OF THE INVENTION The present inventors have found the following problems as a result of examining the above prior art.

【0008】従来のP/B−LCC基板の電極用パッド
における半田接続部分は平面であり、積載時には、この
平面同士が半田接続されるため、位置ズレが生じるとい
う問題点があった。
There is a problem in that the solder connection portion of the electrode pad of the conventional P / B-LCC substrate is a flat surface, and the flat surfaces are solder-connected to each other at the time of loading, which causes a positional deviation.

【0009】本発明の目的は、積載する複数のP/B−
LCC基板における位置ズレを防止することが可能な技
術を提供することにある。
An object of the present invention is to load a plurality of P / B-
It is an object of the present invention to provide a technique capable of preventing positional deviation on an LCC substrate.

【0010】本発明の前記ならびにその他の目的と新規
な特徴は、本明細書の記述及び添付図面によって明らか
になるであろう。
The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

【0011】[0011]

【課題を解決するための手段】本願において開示される
発明のうち、代表的なものの概要を簡単に説明すれば、
下記のとおりである。
Of the inventions disclosed in the present application, a representative one will be briefly described below.
It is as follows.

【0012】プリント配線基板上に半導体チップが搭載
され、その搭載面と反対の面に電極用パッドが設けら
れ、前記電極用パッドの一端から前記プリント配線基板
を貫通する金属メッキされたビアホールを設けて前記チ
ップ搭載面の配線と電極用パッド間を電気的に接続した
P/B−LCC型半導体装置が複数個積載されたP/B
−LCC型半導体装置において、前記P/B−LCC型
半導体装置のそれぞれの電極用パッドを、互いに嵌合す
る形状にする。
A semiconductor chip is mounted on a printed wiring board, electrode pads are provided on the surface opposite to the mounting surface, and metal-plated via holes penetrating the printed wiring board from one end of the electrode pads are provided. P / B on which a plurality of P / B-LCC type semiconductor devices in which wirings on the chip mounting surface and electrode pads are electrically connected are stacked
-In the LCC type semiconductor device, the electrode pads of the P / B-LCC type semiconductor device are shaped to fit together.

【0013】[0013]

【作用】上述した手段によれば、プリント配線基板上に
半導体チップが搭載され、その搭載面と反対の面に電極
用パッドが設けられ、前記電極用パッドの一端から前記
プリント配線基板を貫通する金属メッキされたビアホー
ルを設けて前記チップ搭載面の配線と電極用パッド間を
電気的に接続したP/B−LCC型半導体装置が複数個
積載されたP/B−LCC型半導体装置において、積載
する複数の前記P/B−LCC型半導体装置のそれぞれ
の電極用パッドを、互いに嵌合する形状にすることによ
り、それらのP/B−LCC基板の電極用パッド同士が
嵌合して固定されて半田接続されるので、位置ズレを防
止することが可能となる。
According to the above means, the semiconductor chip is mounted on the printed wiring board, the electrode pad is provided on the surface opposite to the mounting surface, and the printed wiring board is penetrated from one end of the electrode pad. In a P / B-LCC type semiconductor device in which a plurality of P / B-LCC type semiconductor devices in which wirings on the chip mounting surface and electrode pads are electrically connected by mounting metal-plated via holes are loaded, By forming the electrode pads of each of the plurality of P / B-LCC semiconductor devices to be fitted to each other, the electrode pads of the P / B-LCC substrates are fitted and fixed. Since it is connected by soldering, it is possible to prevent positional deviation.

【0014】以下、本発明の構成について、実施例とと
もに説明する。
The structure of the present invention will be described below together with embodiments.

【0015】なお、実施例を説明するための全図におい
て、同一機能を有するものは同一符号を付け、その繰り
返しの説明は省略する。
In all the drawings for explaining the embodiments, parts having the same function are designated by the same reference numerals, and the repeated description thereof will be omitted.

【0016】[0016]

【実施例】図1は、本発明の一実施例である積層する二
つのP/B−LCC基板の電極用パッドを説明するため
の図である。図1において、1はP/B−LCC基板、
2は凹型電極用パッド(Cu)、4は凸型電極用パッド
(Cu)をそれぞれ示す。
FIG. 1 is a diagram for explaining electrode pads of two P / B-LCC substrates to be laminated, which is an embodiment of the present invention. In FIG. 1, 1 is a P / B-LCC substrate,
Reference numeral 2 denotes a concave electrode pad (Cu), and 4 denotes a convex electrode pad (Cu).

【0017】本実施例のP/B−LCC基板1は、図1
に示すように、半導体チップが搭載された側の配線及び
電極(図示せず)とその反対側に当たる面に電極用パッ
ド3とが設けられ、その電極用パッド3の形状は凸型2
と凹型4である。
The P / B-LCC substrate 1 of this embodiment is shown in FIG.
As shown in FIG. 3, wirings and electrodes (not shown) on the side on which the semiconductor chip is mounted and electrode pads 3 are provided on the surface opposite to the wirings and electrodes, and the electrode pads 3 have a convex shape 2
And the concave type 4.

【0018】この凸、凹電極用パッド4、2の形成方法
は、例えば、基板面に導電体を形成し、凸、凹の厚い部
分をエッチング等で形成しておき、薄い部分はマスクキ
ングを施し、メッキ等で形成する方法と、これとは逆
に、レジストでマスキングした後にエッチングで電極用
パッドの凸、凹の薄い部分を形成し、厚い部分をマスク
キングを施し、メッキする方法とが挙げられる。ただ
し、この方法だけに限定されない。
The method of forming the convex and concave electrode pads 4 and 2 is, for example, that a conductor is formed on the surface of the substrate, the thick portions of the convex and concave portions are formed by etching, and the thin portion is masked. In contrast to this method, the method of forming by plating and the like, and the opposite method of forming the convex and concave thin portions of the electrode pad by etching after masking with a resist and masking the thick portion and plating Can be mentioned. However, the method is not limited to this.

【0019】次に、本実施例のそれらP/B−LCC基
板1の電極用パッド間の半田接続について、図2を用い
て詳細に説明する。
Next, the solder connection between the electrode pads of the P / B-LCC substrate 1 of this embodiment will be described in detail with reference to FIG.

【0020】図2は、本実施例のP/B−LCC基板の
電極用パッド間の半田接続を説明するための部分拡大図
である。図2において、斜線で示した3は半田を示す。
FIG. 2 is a partially enlarged view for explaining the solder connection between the electrode pads of the P / B-LCC substrate of this embodiment. In FIG. 2, the shaded portion 3 indicates solder.

【0021】本実施例のP/B−LCC基板の電極用パ
ッドは、図1で示した凸型電極パッド4と凹型電極パッ
ド2を、図2に示すように、向かい合わせて嵌合して半
田接続を行う。
As the electrode pads of the P / B-LCC substrate of this embodiment, the convex electrode pads 4 and the concave electrode pads 2 shown in FIG. 1 are fitted face-to-face as shown in FIG. Make solder connections.

【0022】このときの半田接続は、例えば、予め上記
電極用パッドのいずれか一方に半田印刷を行い、リフロ
ー等で行う。
The solder connection at this time is performed, for example, by performing solder printing on one of the electrode pads in advance and by reflowing or the like.

【0023】このように、本実施例のP/B−LCC基
板1を積載するときに、それぞれの電極用パッドを互い
に嵌合する凸、凹型にすることにより、電極用パッドは
固定されて半田接続されるので、位置ズレを防止するこ
とができる。
As described above, when the P / B-LCC substrate 1 of this embodiment is loaded, the electrode pads are fixed by soldering by making the electrode pads into a convex shape and a concave shape in which they are fitted to each other. Since they are connected, it is possible to prevent positional deviation.

【0024】また、本実施例のP/B−LCC基板1に
おける凸、凹型電極用パッド4、2の半田接続は、図2
では、半田を接続面の全面に塗布した例を取り挙げた
が、半田量を減らし、凸、凹の中央部分にのみ半田を塗
布して接続することにより、半田流れが生じても周辺の
パッドへのショートを防止できる。
Further, the solder connection of the convex and concave electrode pads 4 and 2 on the P / B-LCC substrate 1 of this embodiment is as shown in FIG.
In the above, an example was given in which solder was applied to the entire connection surface, but by reducing the amount of solder and applying solder only to the central portions of the convex and concave parts to connect, even if solder flow occurs, the peripheral pads Can be prevented.

【0025】なお、本実施例におけるP/B−LCC基
板1における凸、凹型電極用パッド4、2の半田接続
は、パワーの大きいデバイスの場合には半田を全面に塗
布して接続し、リード(電極用パッド)ピッチが狭くな
る場合は、半田量を減らし、中央部のみ半田を塗布して
接続したほうがよい。
For the solder connection of the convex and concave electrode pads 4 and 2 on the P / B-LCC substrate 1 in the present embodiment, in the case of a device with high power, solder is applied to the entire surface to connect the leads. (Pad for electrode) When the pitch becomes narrow, it is better to reduce the amount of solder and apply solder only to the central portion for connection.

【0026】さらに、本発明におけるP/B−LCC基
板1では、積載時に、電極用パッドを立体的に接触させ
て半田接続することにより、従来よりも接触面積を大き
くすることができ、接続が強固になる。
Further, in the P / B-LCC substrate 1 according to the present invention, the contact area can be made larger than before by connecting the electrode pads in three-dimensional contact by soldering during loading. Become stronger.

【0027】以上、本発明者によってなされた発明を、
前記実施例に基づき具体的に説明したが、本発明は、前
記実施例に限定されるものではなく、その要旨を逸脱し
ない範囲において種々変更可能であることは勿論であ
る。
As described above, the invention made by the present inventor is
Although the present invention has been specifically described based on the above-mentioned embodiments, the present invention is not limited to the above-mentioned embodiments, and it goes without saying that various modifications can be made without departing from the scope of the invention.

【0028】[0028]

【発明の効果】本願において開示される発明のうち代表
的なものによって得られる効果を簡単に説明すれば、下
記のとおりである。
The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.

【0029】積載する複数のP/B−LCC型半導体装
置のそれぞれの電極用パッドを、互いに嵌合する形状に
することにより、それらのP/B−LCC基板の電極用
パッド同士が嵌合して固定されて半田接続されるので、
位置ズレを防止することが可能となる。
By forming the electrode pads of the plurality of P / B-LCC type semiconductor devices to be stacked with each other, the electrode pads of the P / B-LCC substrates are fitted together. Fixed and soldered,
It is possible to prevent positional deviation.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例であるP/B−LCC基板の
電極用パッドを説明するための図である。
FIG. 1 is a diagram for explaining an electrode pad of a P / B-LCC substrate which is an embodiment of the present invention.

【図2】本実施例のP/B−LCC基板の電極用パッド
間の半田接続を説明するための部分拡大図である。
FIG. 2 is a partially enlarged view for explaining solder connection between electrode pads of the P / B-LCC substrate of the present embodiment.

【図3】従来のP/B−LCC基板を説明するための俯
瞰図である。
FIG. 3 is an overhead view for explaining a conventional P / B-LCC substrate.

【図4】従来のP/B−LCC基板の電極用パッド間の
半田接続を説明するための図である。
FIG. 4 is a diagram for explaining solder connection between electrode pads of a conventional P / B-LCC substrate.

【符号の説明】[Explanation of symbols]

1…P/B−LCC基板、2…凸型電極用パッド、3…
半田、4…凹型電極用パッド、5…従来の電極用パッ
ド。
1 ... P / B-LCC substrate, 2 ... Convex electrode pad, 3 ...
Solder, 4 ... Recessed electrode pad, 5 ... Conventional electrode pad.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 プリント配線基板上に半導体チップが搭
載され、その搭載面と反対の面に電極用パッドが設けら
れ、前記電極用パッドの一端から前記プリント配線基板
を貫通する金属メッキされたビアホールを設けて前記チ
ップ搭載面の配線と電極用パッド間を電気的に接続した
P/B−LCC型半導体装置が複数個積載されたP/B
−LCC型半導体装置において、 前記P/B−LCC型半導体装置のそれぞれの電極用パ
ッドが、互いに嵌合する形状であることを特徴とするP
/B−LCC型半導体装置。
1. A semiconductor chip is mounted on a printed wiring board, an electrode pad is provided on a surface opposite to the mounting surface, and a metal-plated via hole penetrating the printed wiring board from one end of the electrode pad. P / B on which a plurality of P / B-LCC type semiconductor devices in which wirings on the chip mounting surface and electrode pads are electrically connected are stacked.
-The LCC type semiconductor device is characterized in that the electrode pads of the P / B-LCC type semiconductor device are shaped to fit with each other.
/ B-LCC type semiconductor device.
【請求項2】 前記請求項1に記載された積載P/B−
LCC型半導体装置において、前記嵌合する形状は、凸
及び凹であることを特徴とするP/B−LCC型半導体
装置。
2. The loading P / B- according to claim 1.
In the LCC type semiconductor device, the fitting shape is a convex shape and a concave shape, and the P / B-LCC type semiconductor device is characterized.
JP15557694A 1994-07-07 1994-07-07 P/b-lcc type semiconductor device Pending JPH0823048A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15557694A JPH0823048A (en) 1994-07-07 1994-07-07 P/b-lcc type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15557694A JPH0823048A (en) 1994-07-07 1994-07-07 P/b-lcc type semiconductor device

Publications (1)

Publication Number Publication Date
JPH0823048A true JPH0823048A (en) 1996-01-23

Family

ID=15609075

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15557694A Pending JPH0823048A (en) 1994-07-07 1994-07-07 P/b-lcc type semiconductor device

Country Status (1)

Country Link
JP (1) JPH0823048A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6818074B2 (en) 2001-06-06 2004-11-16 Jfe Steel Corporation High-ductility steel sheet excellent in press formability and strain age hardenability, and method for manufacturing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6818074B2 (en) 2001-06-06 2004-11-16 Jfe Steel Corporation High-ductility steel sheet excellent in press formability and strain age hardenability, and method for manufacturing the same

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