JPH08223029A - Duplex intergating counter device - Google Patents

Abstract

PURPOSE: To secure the continuous integrating counters and also to deal with the input of high frequency even if the duplex switching is applied to the different counters of a duplex integrating counter device for improvement of redundancy of a process input/output device. CONSTITUTION: The integrating counter devices 2A and 2B have the same constitution, and the same signals are always inputted to both counter devices. The devices 2A and 2B receive the signals from an input source 1 through the input circuits 3 and 3' and counts these signals by the counter devices 4 and 4'. The differences are calculated by the difference circuits 11 and 11' between the present and precedent count value of both devices 4 and 4'. Then the working counter device stores the calculated differences in the integrating counter registers 8 and 8' contained in its own device and also stores these differences in the integrating counter storage registers of the standby counter device via the control circuits 15 and 15'. In such a constitution, the continuous counting operations are carried on even when one of both devices 2A and 2B has a trouble. Then it is also possible to deal with even the input of high frequency.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a process input / output device and a computer system for performing process input / output.
The present invention relates to duplication of an integrating counter device.

[0002]

2. Description of the Related Art Regarding the duplication of a conventional integrating counter device, an apparatus as disclosed in Japanese Patent Laid-Open No. 3-122524 can be mentioned. The apparatus sets two integrating counter devices of the same configuration for the active system and the standby system, transfers the output of the integrating counter device of the active system to the control calculating unit via the bus, and further, the values thereof. Is transferred as a preset value to the two integrating counter devices of the active system and the standby system.

[0003]

However, in the above-mentioned conventional configuration, the output from the integration counter device is once transferred to the control calculation unit, and the value is re-transferred to the integration counter device as a preset value. When switching from the standby system to the active system, the preset value set in itself may not be the integrated value of the current cycle but the count value of the previous cycle, so it is possible to output an accurate integrated value. There wasn't. Further, in the conventional configuration, the count cannot be performed unless the cycle (pulse) of the frequency for driving the device is longer than the time for transferring the preset value as the integrated value. Didn't go.

An object of the present invention is to improve the redundancy of the process input / output device, and to make a continuous integration counter even if the different integration counters output from the dual integration counter device are switched to the dual mode. The present invention is to provide a double integration counter device that can handle high frequency input.

[0005]

The first feature of the present invention is to:
There are two integrating counter devices each having an integrating unit that integrates the input count value and a register that stores the integrated count value by the integrating unit, and allocate each to an active system and a standby system to perform an operation. When the counter device is an active system, the counter device transfers the integrated count value stored in the register in the device itself to the register in the other integrated counter device in the standby system, and the count value is transferred to the register. It is provided with a control means for performing control to store the value in preference to the value.

A second feature of the present invention is that each integrating counter device stores the integrated count value stored in the register of the integrating counter device, which is the operating system, in the register in the other integrating counter device, which is the standby system. It is provided with a first control means for transferring and storing the data to and from the self-diagnosis means, and a second control means for switching between the active system and the standby system in response to a signal indicating an abnormality from the self-diagnosis means.

A third feature of the present invention is a double integration counter having a first integration counter device, a second integration counter device, and a controller for controlling the first and second integration counter devices. In the device, the control unit stores first the count value output from the first integration counter device, and first calculates the difference between the stored count value and the newly output count value. , Sequentially storing the count value output from the second integration counter device,
A second calculation means for obtaining a difference between the stored count value and the newly output count value, and the difference count value obtained by the first or second calculation means,
And a means for adding and outputting the count value already stored.

[0008]

According to the present invention, for each integration counter device, the difference between the integrated value of this cycle and the integrated value up to the previous cycle is calculated, and the difference is added to the integrated value up to the previous time in the operating system. The integrated value of the output is used, and in the standby system, the integrated value up to the previous time is not added, but the integrated value of the operating system is directly transferred to the standby system and stored, and the outputs of both devices are made coincident.

As a result, even when the standby system is switched to the operating system, it is possible to output a continuous integrated value by adding the difference obtained by the device itself to the integrated value so far. Further, since the integrated value is not re-transferred from the computer system to the integration counter device, it is possible to configure the dual system with only the integration counter device.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which the present invention is used in an integrating counter device will be described with reference to FIGS.

FIG. 1 shows a control circuit 1 which is a feature of the present invention.
5 shows an example of a configuration in which the integration counter storage registers 8 and 8 ′ matched by 5 and 15 ′ are mounted in the integration counter devices 2A and 2B. Input signals are input from the input signal source 1 to the duplicated integration counter devices 2A and 2B, and the matched contents of the integration counter storage registers 8 and 8'are transferred to the bus interface circuits 9 and 9'and the I / O bus 10. It can be input to a computer system or the like via.

The input signal source 1 is converted into a digital signal by the input circuits 3 and 3 ', and the counter circuits 4 and 4'make a counter that counts ON / OFF state of the digital signal. The outputs of the counter circuits 4 and 4'become different values between the integration counter devices 2A and 2B due to the difference in the timing when the counting is started.

Now, assuming that the integration counter device 2A is an operating system (main system), the control circuit 15 receives the main system signal of the duplex control circuit 7, and receives the main system integration counter at a constant input cycle. The contents of the storage register 8 are stored in the integration counter storage register 8'through the control circuit 15 'of the integration counter device 2B, which is a standby system, to make them coincident. Next, the control circuit 15 controls the difference circuit 1 of the integration counter devices 2A and 2B.
Start 1, 11 '. The difference circuits 11 and 11 ′ calculate the difference between the count value of the current cycle output from the counter circuits 4 and 4 ′ and the counter value of the previous cycle stored in the previous counter storage registers 12 and 12 ′.
3 and 13 ', and the count value of the current cycle is stored in the previous counter storage registers 12 and 12'. Finally, the control circuit 15 activates the addition circuit 14 of the integration counter device 2A to add the integrated count value of the previous cycle of the matched integration counter storage register 8 and the value in the difference counter storage register 13 to add the integration counter. Store in the storage register 8.

The duplication control circuits 7 and 7'include the input circuit 3 and
When an abnormal signal indicating that an abnormality has occurred in the input circuit 3, 3'is received from the self-diagnosis circuit 5, 5'for detecting an abnormality in 3 ', or when the integration counter devices 2A and 2B themselves are stopped If it detects a failure of its own system and puts itself in a standby state, and if the other system is in a normal state, it performs switching control with the other system as the main system, and only one integration counter device Is controlled to be the main system state. Figure 2
FIG. 2 is a sequence diagram showing an operation example of a state change of the integration counter device when the present invention is applied in the integration counter device shown in FIG.

First, the integration counter devices 2A and 2B are
At the same time, the first cycle number when the counting is started is set to 1, and the subsequent input cycles are numbered 2, 3, 4, ...

When counting is started, the integration counter device 2A is the main system and the integration counter device 2B is the standby system.

In cycle numbers 1 and 2, the integration counter device 2
Since A and 2B started counting at the same time, the count values of the previous counter storage register and the counter circuit are the same.

In cycle numbers 3 and 4, the integration counter device 2
Since an abnormality has occurred in A, the main system and the standby system are switched by the function of the duplex control circuit. The previous counter storage register and the difference counter storage register in the integration counter device 2A are not functioning properly due to an abnormality in the device, but the integration counter storage register is written from the integration counter device 2B, which is the main system, at every cycle. Therefore, the correct count value is stored.

In the cycle numbers 5 and 6, the integration counter device 2
The abnormality of A is resolved and the counting is started again. Here, since the integration counter device 2B remains in the normal state, the master-slave state is not switched, and the integration counter device 2A remains in the standby system. Since the inside of the integration counter device 2A is in the initialized state, the values are different from the outputs of the previous counter storage register, the difference counter storage register, and the counter circuit in the integration counter device 2B. The values are the same because they are matched for each cycle.

In cycle number 7, since the abnormality of the integration counter device 2B has occurred, the integration counter device 2A is switched to the main system.

In this embodiment, even if an abnormality occurs in either of the integration counter devices and the master-slave state is switched, the count value is written from the master system to the standby system in each cycle in the integration counter register. Therefore, even when the device becomes normal, it is possible to continuously update the integrated count value by integrating the count value of the previous integration count register with the value of the difference count register.

Next, the case of using a duplicated integration counter device and a computer system according to another embodiment of the present invention will be described with reference to FIGS.

FIG. 3 is a block diagram of the present embodiment in which the integration counter input programs 18 to which the present invention is applied are mounted in the computer system 17 by combining the integration counter devices 16A and 16B having no control circuit in the device and the computer system 17. 2 illustrates an example configuration.

Integration counter input program 1 of the present embodiment
8 is performed as in the processing flowcharts shown in FIGS.

FIG. 4 shows an integration counter input program 18
Shows the overall configuration of. First, by inputting from the integration counter devices 16A and 16B, S1 and S
The difference between the input count values of the previous cycle and the current cycle is calculated by the process shown in 2. Details of S1 and S2 will be described later. Subsequently, in S3, the integration counter device 16A
It is determined whether or not the device status and the input are the first time.
If the integration counter device 16A is normal or is not the first input, the process proceeds to step S5, and the difference obtained in S1 is added to the integration counter in the computer system.

In step S3, the integration counter device 16A
Is abnormal or is the first input, the process proceeds to step S4, and in step 4, the device state of the integration counter device 16B and whether the input is the first input are determined. If the integration counter device 16B is normal or is not the first input, the process proceeds to step S6, and the difference obtained in S2 is added to the integration counter in the computer system. If the integration counter device 16B is abnormal or is the first input, step S7
Double fault processing is performed with.

Here, the processing of steps S1 and S2 will be described with reference to FIGS. First, in steps S11 and S21, the integration counter devices 16A and 16B are provided.
From the integration counter device is normal, and if normal, the process proceeds to steps S12 and S22 to determine whether or not the input from the integration counter device is the first time. In S13 and S23, the value of the difference counter in the computer system is set to 0, and the cumulative count value up to this time is stored in the previous cumulative counter. If it is not the first time, the difference from the previous value is stored in the difference counter in steps S14 and S24, and the integrated count value up to this time is stored in the previous integrated counter. Steps S11 and S21
If it is determined that the integration counter device is abnormal, the processing shown in FIG. 5 or 6 is not performed.

In the present embodiment, by using the normal count value of the integration counter device, the difference between the integration count value up to the previous time and the integration count value of this time is integrated, so that the system of the integration counter device that can be input Regardless of, it is possible to make the integration counter a continuous value.

FIG. 7 shows an embodiment in which the present invention is applied to a doubled integration counter device in which a matching function is added to a control circuit.
Will be explained.

FIG. 7 shows the integration counter storage registers 8 and 8'which are matched by the control circuit 20 which is a feature of the present invention.
The example of the structure mounted in the integration counter devices 19A and 19B is shown. The input signal of the input signal source 1 is simultaneously input to the duplicated integration counter devices 19A and 19B. In both integration counter devices, the contents of the integration counter storage registers 8 and 8'are made the same, and the bus interface circuit 9
Inputting data to a computer system or the like via the I / O bus 10 is as described in the first embodiment.

In the present embodiment, the integration counter device 19A starts counting first and then the integration counter device 19B.
Starts counting, i.e., when one device is replaced for repair or other reasons, and then restarted,
In the integration counter device 19A, the input signal from the input signal source 1 is converted into a digital signal by the input circuit 3, and the counter circuits 4, 4'count the ON / OFF state of the digital signal to create a count value. The created count value is integrated into the integration counter storage register 8 via the control circuit 20. The integration counter device 19B, which starts counting later, transfers the integration count value in the integration counter storage register 8 of the integration counter device 19A to the integration counter storage register 8'of the integration counter device 19B via the control circuits 20 and 20 '. The data is stored and matched. After that, the integrated counter is stored in the integrated counter storage register 8 in the same procedure as the integrated counter device 19A, so that the integrated counter storage register 8 of the integrated counter device 19A and the integrated counter device 19B can always have the same value. Becomes

[0032]

According to the present invention, in order to improve the redundancy of the process input / output device, even if the different integration counters output by the dual integration counter device are switched to the dual mode,
It is possible to provide a duplicated integration counter device that can be used as a continuous integration counter and can handle high-frequency input.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a duplicate integration counter device.

FIG. 2 is a time chart of the duplication integration counter device.

FIG. 3 is a configuration diagram of an integration counter device that is duplicated using a computer system.

FIG. 4 is a flowchart of an integration counter input program.

FIG. 5 is a flowchart of a difference counter 1 creation process.

FIG. 6 is a flowchart of a difference counter 2 creation process.

FIG. 7 is a configuration diagram of a double integration counter device in which a matching function is added to a control circuit.

[Explanation of symbols]

 1 ... Input signal source 2A, 2B ... Integrating counter device to which the present invention is applied 4, 4 '... Counter circuit 6, 6' ... Microprocessor 7, 7 '... Duplication control circuit 8, 8' .. Accumulation counter storage register 12, 12 '... Previous counter storage register 13, 13' ... Difference counter storage register 15, 15 '... Control circuit 16A, 16B ... Conventional integration counter device 18 ... Applied counter input program

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tetsuo Sato 5-2-1 Omika-cho, Hitachi-city, Ibaraki Hitachi Ltd. Omika factory

Claims (3)

[Claims] 1. An integrating unit for accumulating input count values, and two integrating counter devices each having a register for storing an integrated count value by the integrating unit, each of which is assigned to an active system and a standby system. In the double integration counter device, each of the integration counter devices, when the device itself is an active system, adds the integrated count value stored in the register in the device itself to the other integration device which is a standby system. A double integration counter device, comprising control means for performing control to transfer to the register in the counter device and store the count value in priority. 2. An integration unit for integrating an input count value, a register for storing an integration count value by the integration unit, and two integration counter devices having a self-diagnosis unit for detecting an abnormality in the device itself. In the dual integration counter device for allocating and operating each to an active system and a standby system, each of the integration counter devices stores an integrated count value stored in the register of the integration counter device that is an active system, A first control means for transferring and storing to the register in the other integration counter device which is a standby system, and a signal indicating an abnormality from the self-diagnosis means for switching between the operating system and the standby system. A duplicated integration counter device comprising two control means. 3. A double integration counter device comprising a first integration counter device, a second integration counter device, and a control unit for controlling the first and second integration counter devices, wherein the control unit is provided. First calculating means for sequentially storing count values output from the first integration counter device and obtaining a difference between the stored count value and a newly output count value; and the second integration counter. The method further comprises: second calculating means for sequentially storing the count value output from the apparatus and obtaining a difference between the stored count value and the newly output count value, the first or second calculating means And a means for adding the difference count value obtained by the above to the already stored count value and outputting it.