JPH08214555A - Method and apparatus for pulse-width-modulating three-phase voltage type inverter - Google Patents

Abstract

PURPOSE: To reduce the switching loss by so linearly signal processing the command phase voltages of three phases at each control period as not to exceed the amplitude of a modulation carrier signal, and using the carrier signal as the obtained intermediate phase voltage signals of the three phases. CONSTITUTION: A PWM apparatus 4 has a front stage processor 8 of a controller 5 side and a rear stage processor 9 of an inverter 2 side. The processor 8 executes such as degrades and biases as predetermined linear signal processing the command phase voltage received from the controller 5 at each control period, and outputs intermediate phase voltage signals Vut, Vvt, Vwt to the processor 9. The processor 9 PWM-processes the intermediate phase voltage signal received from the processor 8 by using a carrier signal linearly varying a triangular wave with the amplitude between peaks as DC power source voltage value, generates a pulselike switching signal, and outputs it to the inverter 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a PWM method and apparatus for a three-phase voltage source inverter, and is used for a so-called three-phase load that operates a load in three phases, such as a three-phase AC motor.

[0002]

2. Description of the Related Art Conventionally, a PWM (pulse width modulation) method using an inverter has been used in order to accurately and rapidly control the driving of a three-phase AC motor such as an induction motor or a synchronous motor used as an AC servo motor. Widely adopted.
FIG. 15 shows a typical PWM method configuration including a three-phase voltage source inverter used for driving a three-phase AC motor as a typical example of a three-phase load and its main related devices. . A DC power supply 1 of voltage E is connected to a three-phase AC motor 3 via an inverter 2 composed of switching elements S1 to S6. The PWM device 4 outputs a switching signal to each switching element of the inverter 2 based on command phase voltages Vu, Vv, Vw of U, V, W phases input from an external controller (not shown) in each control cycle. up, u
It outputs n, vp, vn, wp, wn.

The command phase voltage can generally take any waveform not limited to a sine wave, and PWM (pulse width modulation) is performed using a linearly changing carrier signal such as a sawtooth wave or a triangular wave. A pulsed switching signal is obtained by. For example, in FIG. 16, when a triangular wave having an amplitude of −E / 2 to E / 2 is used as a carrier signal for PWM modulation, a certain section t with respect to the input command phase voltage Vu.
= Modulated output up before and after = kTs to (k + 1) Ts,
indicates un. Here, the command phase voltage is the control cycle Ts.
It is updated every time and is constant within the control cycle.

As easily understood from the figure, the modulation output, that is, the switching signals up and un to the switching elements S1 and S2 of the inverter 2 are immediately determined by comparing the magnitude relationship between the input signal and the carrier signal. To be done. In addition, the signal un for the lower switching element S2
Is an inverted signal of the signal up for the upper switching element S1. Actually, in consideration of the turn-on and turn-off times of each switching element, the simultaneous off period is set in the switching signal in order to prevent simultaneous short circuit between them. Similar processing is performed for other command phase voltages.
In this way, the PWM method uses the command phase voltages Vu, Vv, Vw.
It is widely used because it has a feature that the process of obtaining a switching signal from the device is extremely simple.

Further, as can be seen from FIG. 16, the command phase voltage Vi (i = u, v, w) is linearly modulated with a carrier signal to output a switching signal. Amplitude of carrier signal −E / 2 to E /
Must be within the range of 2.

[0006]

[Equation 4]

However, in practice, the command phase voltage does not always satisfy the above equation (4). In such a case, conventionally, a non-linear limiter process shown in the following equation (5) is performed on the command phase voltage, and the command phase voltage Vi ^* (i = u, v, w) subjected to the limiter process is applied. The above PW
The switching signal is obtained by executing M.

[0008]

(Equation 5)

It is well known that in such a conventional carrier signal comparison type PWM system, the average voltage utilization efficiency is theoretically about 86% in the range where linearity is maintained. . That is, in FIG. 15, the average maximum value of the three-phase line voltage obtained by the switching signal generated while maintaining the relationship of the above equation (4) in the conventional PWM method is about 0.86E. In order to improve this voltage utilization efficiency, in the case of a sine wave signal in which each command phase voltage has a constant amplitude and angular frequency ω, and the phases are shifted by 2π / 3 (rad) from each other, the angle A method of superimposing a sine wave having a frequency of 3ω and an amplitude of 1/6 is generally adopted. That is, when a command phase voltage represented by the following equation (6) is given, this is converted into a phase voltage represented by the equation (7) and input to the PWM device.

[0010]

(Equation 6)

[0011]

(Equation 7)

However, in this conventional method, each command phase voltage keeps the angular frequency constant and the phases are 2π relative to each other.
Since it is limited to sine wave signals of the same amplitude shifted by / 3 (rad), there is a problem that it cannot be applied to a command phase voltage of any shape required for a motor or the like during acceleration / deceleration. Even if the command phase voltage conveniently satisfies the sine wave condition, in the conventional method, the above equation (6),
As shown in (7), since it is required to accurately generate a signal having an amplitude of 1/6 times and an angular frequency of 3 times based on the command phase voltage, a complicated device corresponding to this is added. It was necessary and practically difficult to realize.

Therefore, according to Japanese Patent Publication No. 6-81514, the instantaneous voltage command values Vu, Vv, Vw of each phase are compared so that the absolute values of the maximum value and the minimum value of them are always equal. , Or one half of the intermediate value is added to each original command phase voltage so that the sum of them is always constant, and these are compared as a modulation signal with a triangular wave carrier signal to obtain voltage utilization efficiency. A PWM method is disclosed to improve the. In this method, for example, when the intermediate value is Vv, the value expressed by the following equation (8) is added.

[0014]

(Equation 8)

According to this method, the same value as described above is added to the voltage command of each phase to reduce the voltage command of the phase in which the absolute value of the voltage command is maximum, so that the line voltage of the three phases is not changed. Since the peak value of the voltage command can be reduced, the fundamental wave component of the output voltage can be increased without increasing the harmonic component of the output voltage, and the pulsation of the generated torque can be reduced when driving the motor. It is a thing.

[0016]

However, in any of the above-mentioned conventional PWM systems, there are practically important problems such as dealing with an excessive command phase voltage and improving voltage utilization efficiency. That is, in the conventional limiter processing by the above equation (5), some of the command phase voltages of the three phases are subjected to the limiter processing and other are not. In the case illustrated in FIG. 17, the command phase voltage Vu of the U phase is subjected to limiter processing because it exceeds E / 2, whereas the command phase voltages of the other V and W phases are expressed by the formula (4). Since the condition of is satisfied, the limiter process is not performed. Since this limiter processing is a non-linear processing, even if the PWM processing, which is a linear processing, is similarly performed using the carrier signal for the phase voltage subjected to the non-linear processing,
It is impossible to obtain the optimum switching signal for the three-phase load. As a result, for example, when the three-phase load is a three-phase AC motor, there are problems such as pulsating rotation, generation of abnormal noise, and damage to the motor. Therefore, the output of the motor has to be suppressed in actual use, and there is a problem that the original performance of the motor cannot be sufficiently exhibited. Further, for that reason, a motor having an output larger than the originally required output must be used, which causes a problem that the motor itself becomes large and the cost becomes high.

Also in the case of the PWM method of Japanese Patent Publication No. 6-81514, the DC voltage value E for determining the amplitude of the carrier signal or this value is added to the value added to each command phase voltage as shown in the above equation (8). There is obviously the same problem because the element related to is not included. That is, the above-mentioned nonlinear limiter processing is required for the command phase voltage in which the line voltage exceeds the amplitude of the carrier signal. For example, in the servo drive of an AC motor with abrupt acceleration / deceleration, it is easy when the command phase voltage is not a sine wave as in Japanese Patent Publication No. 6-81514 and the line voltage exceeds the DC power supply voltage. Expected.

Further, such a conventional PWM method has a problem that switching loss is large. For example, as shown in FIG. 18, even when the command phase voltages Vu, Vv, Vw are all 0, the switching signals up, un, v of each phase are
Since p, vn, wp, and wn change twice during one cycle of the triangular wave of the carrier signal, the switching elements S1 to S6 of the inverter 2 in FIG. , Will operate twice each. This unnecessary switching operation is one of the causes of the inconvenient phenomenon that the motor hunts for a stop command when the motor or the like is used as a load.

Further, originally, the inverter can achieve the state of the voltage to be applied to the load only by changing the state of one set of the switching elements in the U, V and W phases. Even when the command phase voltage is other than 0, each switching element is always required to perform the switching operation twice during one cycle of the triangular wave. That is, there is a problem in that switching loss always occurs because all the switching operations that are not originally required are requested, and it is difficult to generate an optimum switching signal for the command phase voltage. In particular, it is extremely important to reduce switching gloss in an inverter for high switching rates of 10 kHz or more, which has been frequently used recently.

Therefore, the present invention has been made in order to solve the above-mentioned conventional problems, and an object thereof is to provide an excellent feature of simplicity of a conventional PWM method and apparatus using a carrier signal. By performing a relatively simple linear process on the command phase voltage while maintaining it, an optimum switching signal can be obtained even when the command phase voltage exceeds the level of the carrier signal, thereby allowing the three-phase AC motor to operate. When driven, there is no risk of causing undesirable behavior such as pulsation or damage, and, for example, with respect to the command phase voltage of an arbitrary waveform required for a three-phase load such as an AC motor during servo drive. The PWM method for a three-phase voltage source inverter, which can be applied in the same manner as above, improves the voltage utilization efficiency, and has high cost performance and excellent practicality. And to provide a fine device.

[0021]

The present invention has been made to achieve the above-mentioned object, and a PWM method for a three-phase voltage source inverter according to claim 1 is
PWM for converting a command phase voltage for generating three-phase power into a pulse signal for switching of a three-phase voltage source inverter having a DC power supply by comparing with a modulation carrier signal
(Pulse width modulation) method, in which U, V,
With respect to the command phase voltages Vu, Vv, and Vw of each W phase, the degeneration rate α (0 <α ≦) is constant at least during each control cycle.
1) and the following equation (1) represented by the bias value β,
By performing linear signal processing so as not to exceed the amplitude of the modulating carrier signal, and using the modulating carrier signal for the intermediate phase voltage signals Vut, Vvt, Vwt of the respective U, V, W phases obtained as a result, It is characterized in that a switching pulse signal is obtained.

[0022]

[Equation 9]

As described above, according to the present invention, when the command phase voltage of any of the three phases exceeds the level of the carrier signal,
Also, even when the maximum absolute value of the line voltage of the command phase voltage exceeds the amplitude of the carrier signal, for each intermediate layer voltage signal obtained by the signal processing of the above formula (1) for the command phase voltage, the above formula (4) It is possible to satisfy such a level condition as described above, and since this signal processing is linear processing similar to PWM control, it is possible to optimally generate a switching signal, and at every predetermined control cycle. Since it is a discrete-time digital control for processing, it can be applied without any trouble even when the command phase voltage has an arbitrary waveform other than a sine wave.

According to a second aspect of the PWM method, in addition to the characteristic features of the first aspect described above, each command phase voltage V is controlled every control cycle.
The maximum absolute value of the three-phase line voltage is calculated from u, Vv, and Vw,
The degeneration rate α is determined by comparing the maximum absolute value of the line voltage with the voltage value of the DC power supply. Furthermore, the PWM method according to claim 3 sets the bias value to β = 0,
In addition, the degeneration rate α is multiplied for each control cycle by each command phase voltage to generate the degeneration phase voltages α · Vu, α · Vv, α · Vw, and these degeneration phase voltages are used as the intermediate phase voltage signals to generate peaks for these. A switching pulse signal is obtained by using a carrier signal whose amplitude is equal to the DC power supply voltage value.

Here, in order to facilitate understanding of the present invention, the concept of the space vector will be described. The space vector X linearly corresponding to the command phase voltages Vu, Vv, Vw is expressed by the following equation. It is calculated as in (9). Here, S is a linear transformation matrix shown in the following equation (10).

[0026]

[Equation 10]

[0027]

[Equation 11]

On the other hand, the degeneration phase voltage obtained by multiplying each command phase voltage by the degeneration rate α determined by comparing the maximum absolute value of the three-phase command phase voltage between lines and the DC power supply voltage value for each control cycle. α ・
Space vector Xa corresponding to Vu, α · Vv, α · Vw
Is calculated as in the following equation (11).

[0029]

(Equation 12)

As shown in the equation (11), the space vector Xa corresponding to the degenerate phase voltage is obtained by multiplying the space vector X corresponding to the command phase voltage before degeneration by the degeneration rate α. That is, the space vector of the degenerate phase voltage obtained by multiplying each command phase voltage by the degeneracy rate α is oriented in the same direction as the space vector before the degeneracy, and according to the degeneration process, the two vectors are proportional to each other. The linear relationship will be preserved.

Carrier signal comparison type PW which is linear conversion
When the switching signal of the inverter is obtained by the M process, linearity is similarly preserved between the input signal and the output signal as long as the level condition of the input signal and the carrier signal as in the above formula (4) is satisfied. To be done. Therefore, the degeneracy rate α is selected so that the degenerate phase voltages α · Vu, α · Vv, and α · Vw are smaller than the amplitude of the carrier signal, that is, the level condition in the PWM processing as shown in Expression (4) is satisfied. If the pulse width modulation is performed on the degenerate phase voltage obtained thereby, linearity is preserved at the beginning and end of each signal processing of degeneration and modulation. By repeating this processing for each control cycle, when the present invention is applied to the control of the motor, even if an excessively large command phase voltage of an arbitrary shape is applied, switching that causes a torque unfavorable for driving the motor is performed. The generation of the pulse signal for use is eliminated, and pulsating rotation, generation of abnormal noise, and damage to the motor can be suppressed.

According to a fourth aspect of the PWM method, each command phase voltage is multiplied by the degeneracy rate α, and the degenerate phase voltages α · Vu, α · Vv,
.alpha..Vw is generated, and a constant bias value Vb is added to each degenerate phase voltage at least during each control period to generate degenerate bias phase voltages Vuab, Vvab, and Vwab. A switching pulse signal is obtained by using a carrier signal whose amplitude is a DC power supply voltage value.

The combination of the linear degeneracy process and the linear bias process for each control cycle in this manner will be briefly described below by utilizing the concept of the space vector. The space vector Xab that linearly corresponds to the degenerate bias phase voltage that satisfies the relationship of the above expression (1) is calculated as in the following expression (12).

[0034]

(Equation 13)

In the above equation, the space vector Xab of the degenerate bias phase voltage is the same as the space vector Xa of the degenerate phase voltage before the bias process (or the space vector X of the phase voltage before the degenerate process), in other words, , Shows that the space vector is not affected by the bias processing.
Considering the linear correspondence between the space vector and the switching pulse signal, this indicates that the phase voltages before and after the bias processing correspond to pulse signals having the same pulse width.

The reason why the voltage utilization efficiency in the conventional carrier signal comparison type PWM system remains at a maximum of about 86% is that the line voltage is E or less for the command phase voltage in order to avoid nonlinear limiter processing for the command phase voltage. This is because it is necessary to further satisfy the level condition of Expression (4). On the other hand, the PWM method according to the present invention attempts to obtain the switching pulse signal by performing the PWM processing on the degenerate bias phase voltage that satisfies the above line condition regardless of the command phase voltage. It is a thing. Therefore, even if the command phase voltage is excessive, the maximum absolute value of the line voltage formed by the degenerate phase voltage is kept within the level of the DC power supply voltage by the linear degeneration process for each control cycle, and the degeneration is performed. After that, the PWM processing is performed so that the degenerate bias phase voltage falls within the range of the carrier signal amplitude −E / 2 to E / 2, which is the level condition, by the linear bias processing performed in each control cycle. As a result, the utilization efficiency of the DC power supply voltage can be increased to 100% while maintaining the linearity, and at the same time, the switching loss can be reduced.

According to a fifth aspect of the PWM method, in addition to the characteristic points of the fourth aspect, the bias value Vb is determined based on the degenerate phase voltage. Further, in the PWM method according to claim 6, the bias value Vb is set to the maximum value Vmax or the minimum value Vmin of the degenerate phase voltage and the DC power supply voltage value E.
It is characterized in that it is determined based on the following equation (2) or (3) represented by

[0038]

[Equation 14]

The degenerate bias phase is determined by taking the states of the degenerate phase voltages of the U, V and W phases, such as the relative relationship, into account, and particularly by determining the bias value Vb based on the above equation (2) or (3). The voltage produces an optimal switching signal that simultaneously achieves improved voltage utilization efficiency and minimized switching loss. For example, using equation (2), V
When determining b, all command phase voltages are set to 0 (Vu = Vv
= Vw = 0), the degenerate bias phase voltage is given by the following equation (13) from the above equations (1) and (2).

[0040]

(Equation 15)

Amplitudes -E / 2 to E / are used as modulation signals.
FIG. 1 shows a state in which the carrier signal of No. 2 is modulated. As is clear from the figure, the switching signals up, vp, wp
Keeps the off state, and the switching signals un, vn, and wn, which are their inverted signals, keep the on state. That is, unlike the case of the conventional PWM described above, the switching elements S1 to S of the inverter are
Since 6 is not operated at all, it can be seen that the optimum switching signal can be obtained for the 0 command of the command phase voltage.

According to a seventh aspect of the PWM method, the bias phase voltages Vub, Vvb, Vbb, and Vbb are added by adding a constant bias value Vb to each command phase voltage at least during each control cycle.
Vwb is generated, the maximum absolute value of the three-phase line voltage is obtained from each command phase voltage or each bias phase voltage, and the maximum absolute value of the line voltage is compared with the voltage value of the DC power supply to determine the degeneration rate α. Then, each bias phase voltage is multiplied by the degeneracy rate α to generate the degenerate bias phase voltages Vuab, Vvab, Vwab, and these are used as intermediate phase voltage signals, and a carrier signal having a peak-to-peak amplitude as a DC power supply voltage value is used. It is characterized in that the switching pulse signal is obtained in accordance with.

Contrary to the PWM method according to the fourth aspect, a linear bias process is first performed in each control cycle, and the generated bias phase voltage is subjected to the degeneration process to finally obtain a desired degenerate bias phase voltage. I'm trying to get
Similarly, even if the command phase voltage is excessively large, it is possible to maintain the linearity in an optimum form and generate an optimum switching pulse signal capable of achieving 100% utilization efficiency of the power supply voltage and minimum switching loss. it can. This is apparent from the fact that the above equation (1) can be rewritten as the following equations (14) and (15).

[0044]

[Equation 16]

The PWM method according to claim 8 is characterized in that the shape of the carrier signal is controlled for each control cycle.

The optimum switching signal for PWM processing should satisfy the following three conditions. (A) The command phase voltage that is the input and the inverter generated voltage that is the output have the same corresponding space vectors in the time average of the control cycle. Further, when the line voltage value of the command phase voltage exceeds the DC voltage value of the inverter, the space vector corresponding to the output side achieves the generation limit, and its direction is the same as the space vector on the input side and the control cycle. They are the same in time average. (B) The switching states of the start point and the end point of the control cycle are
Both are in the zero state, and the residence times in these states are the same. (C) The transition of the switching state is executed with the minimum number of times of switching. As can be seen from the above description, the PWM method described in claims 1 to 7 completely satisfies the conditions (a) and (b), and at the same time aims to reduce the number of times of switching. However, the number of switching times is not the minimum. (C)
In order to satisfy the above condition, it is necessary to further control the carrier signal.

When the switching state of each phase of U, V and W is described with a three-dimensional space vector, if the ON state of each switching signal is 1 and the OFF state is 0, the terminal voltage is 0.
The zero state to be set is [up, vp, wp] = [0, 0,
0] or [up, vp, wp] = [1, 1, 1] 2
It is expressed in one form. The remaining switching signals un, v
n and wn are the inversions of up, vp, and wp.
The switching operation from the zero state [up, vp,
When transitioning to the state of wp] = [1,0,0], the zero state that is the starting point is optimally [0,0,0], which requires only one switching of the U phase. In addition, the switching operation from the zero state [up, vp, wp] =
When transitioning to the [1,1,0] state, the zero state that is the starting point is optimally [1,1,1], which requires only one switching of the W phase.

As can be seen from this example, in order to obtain the minimum number of switching operations, the zero state of the starting point must be controlled, which is achieved by controlling the shape of the carrier signal. FIG. 2 shows an example of a state in which the zero state at the starting point is changed according to the intermediate phase voltage signal Vit by controlling the shape of the carrier signal. That is, in a certain cycle kTs to (k + 1) Ts, a downwardly convex triangular wave is used as a carrier signal for an intermediate phase voltage signal whose minimum value is −E / 2, and the zero state is [up, v
p, wp] = [0,0,0]. In the next cycle (k + 1) Ts to (k + 2) Ts, the descending sawtooth signal is used as the carrier signal for the intermediate phase voltage signal that minimizes the maximum absolute value, and the zero state at the starting point is [u
When p, vp, wp] = [0,0,0], the zero state at the end point is achieved by [up, vp, wp] = [1,1,1]. Further, in the cycles (k + 2) Ts to (k + 3) Ts, an upward convex triangular wave signal is used for the intermediate phase voltage signal whose maximum value is E / 2, and the zero state is [up, vp, wp] =
Achieved in [1,1,1]. That is, the change of the zero state is efficiently achieved between the control cycle starting at time kTs and the control cycle starting at time (k + 2) Ts. In the carrier signal whose shape is controlled in this way, a signal having a waveform that linearly changes, such as a triangular wave or a sawtooth wave, is used as a basic signal, and according to conditions such as a control period and an intermediate phase voltage signal,
The frequency and phase are controlled and used.

As described above, by controlling the shape of the carrier signal for each control cycle, while maintaining a desired space vector between the input side and the output side, in addition to the improvement of the voltage utilization efficiency, the switching loss is increased. It is possible to generate a switching signal that is optimum for minimizing.

According to a ninth aspect of the present invention, there is provided a PWM device for a three-phase voltage source inverter, wherein a switching pulse signal for generating three-phase power by comparing a command phase voltage input from the outside with a modulation carrier signal. Which is output to a three-phase voltage source inverter having a DC power supply, and the command phase voltage Vu of each phase of U, V, W for each control cycle.
With respect to Vv and Vw, the amplitude of the modulation carrier signal is exceeded by using the following formula (1) represented by a constant degeneration rate α (0 <α ≦ 1) and a bias value β at least during each control cycle. Means for performing linear signal processing so as not to exist, and intermediate phase voltage signals Vut, V of U, V, W phases obtained from the means.
It is characterized by comprising a PWM processing means for generating a switching pulse signal by using a modulating carrier signal for vt and Vwt.

[0051]

[Equation 17]

As a result, even when an excessive command phase voltage is applied, the linear signal processing means linearly processes the command phase voltage before performing the PWM process, whereby the discrete time PWM according to the present invention according to claim 1. The method can be implemented relatively easily.

According to a tenth aspect of the present invention, in addition to the characteristic features of the ninth aspect of the invention, the linear signal processing means causes the maximum of the three-phase line voltage from each command phase voltage Vu, Vv, Vw for each control cycle. Means for obtaining the absolute value, means for determining the degeneration rate α by comparing the maximum absolute value of the line voltage obtained by the means and the voltage value of the DC power supply, and multiplying the degeneration rate α by each command phase voltage. The degenerate phase voltage of each phase of U, V and W is generated, and each degenerate phase voltage is output to the PWM processing means as an intermediate phase voltage signal.

As a result, even if an excessive command phase voltage is applied, the linearity is preserved at the beginning and end of the signal processing of degeneration and modulation. As a result, when it is used for driving a motor, generation of a switching pulse signal which is not preferable for the motor is eliminated, and pulsating rotation, generation of abnormal noise, and damage to the motor can be suppressed.

According to the eleventh aspect of the PWM apparatus, the linear signal processing means further comprises means for determining the bias value β for each control cycle. Further, claim 12
In the described PWM device, the bias value determining means comprises means for determining a constant bias value to be added to each degenerate phase voltage for each control cycle, and the linear signal processing means uses the bias value for each degenerate phase voltage. It further comprises means for adding to the voltage to generate the degenerate bias phase voltage, and outputs each degenerate bias phase voltage to the PWM processing means as an intermediate phase voltage signal.

Further, in the PWM apparatus according to the thirteenth aspect, the linear signal processing means determines a constant bias value to be added to each command phase voltage for each control cycle, and the bias value thus determined. Is added to each command phase voltage to generate a bias phase voltage, and a means for calculating the maximum absolute value of the three-phase line voltage from each command phase voltage or each bias phase voltage for each control cycle, Means for determining the degeneration rate α by comparing the maximum absolute value of the line voltage with the voltage value of the DC power supply; and the degenerate bias phase voltage of each phase of U, V and W by multiplying each degenerate rate α by each bias phase voltage. And outputting each degenerate bias phase voltage as an intermediate phase voltage signal to the PWM processing means.

According to the eleventh to thirteenth aspects, the linear degeneration process and the linear bias process can be appropriately combined and executed for each control cycle, whereby the command phase voltage is changed. Achieve 100% power supply voltage utilization efficiency while maintaining linearity
In addition, it is possible to generate an optimum switching pulse signal with less switching loss.

According to a fourteenth aspect of the present invention, there is provided the PWM device according to each of the above-mentioned aspects, further comprising means for controlling the shape of the carrier signal for each control cycle.

As a result, a linearly changing waveform signal such as a triangular wave or a sawtooth wave whose frequency and phase are appropriately controlled according to the state of the command phase voltage can be used as the carrier signal, and the transition of the switching state can be achieved. The required number of switching times can be minimized.

Further, a PWM device according to a fifteenth aspect is characterized in that, in the PWM device according to the above-mentioned respective claims, at least the linear signal processing means is integrated.

As a result, it is possible to obtain the effect that the PWM device can be easily incorporated into the system in a compact and highly reliable manner.

Further, a PWM device according to a sixteenth aspect is characterized in that a control section for generating each command phase voltage according to information input from the outside and outputting it to the linear signal processing means is integrated into an IC.

As a result, the discrete time type PWM control system using the PWM device according to the present invention can be implemented as software, and a more compact and inexpensive system with excellent cost performance and high reliability can be constructed. You can

[0064]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described in detail below with reference to the accompanying drawings. In the attached drawings, the same or similar components are designated by the same reference numerals.

FIG. 3 schematically shows the construction of a PWM control system according to the invention for controlling the drive of an induction motor as a three-phase load. In this embodiment, the DC power supply 1 uses a commercial AC power supply rectified by a converter, and is connected via an inverter 2 to a three-phase AC motor 3 which is an induction motor. In the inverter 2, as in the conventional PWM control system described with reference to FIG. 15,
A PWM device 4 for generating a switching signal to the inverter 2 is connected, and the PWM device 4 is connected to a controller 5 for controlling the drive of the induction motor. In this embodiment, the induction motor is torque-controlled by vector control, and an excitation current command and a torque current command are input to the controller 5 as control commands. In the vector control of the induction motor, motor rotation speed information and current information are required, and these are input to the controller 5 via each sensor such as the speed sensor 6 and the ammeter 7 attached to the motor 3. . The controller 5 outputs command phase voltages of three phases to the PWM device 4 based on these commands and information. Further, voltage information is input to the PWM device 4 from the DC power supply 1.

FIG. 4 shows the configuration of a preferred embodiment of the PWM device 4 according to the present invention, which comprises a pre-stage processing unit 8 on the controller 5 side and a post-stage processing unit 9 on the inverter 2 side.
The pre-stage processing unit 8 performs the required linear signal processing such as degeneration and bias according to the present invention on the command phase voltage received from the controller 5 for each control cycle, and outputs the intermediate phase voltage signal Vu.
It is output to the subsequent processing unit 9 as t, Vvt, and Vwt. The latter-stage processing unit 9 performs PWM processing on the intermediate-phase voltage signal received from the former-stage processing unit 8 by using a linearly changing carrier signal such as a triangular wave having a peak-to-peak amplitude as a DC power supply voltage value. , Pulse-shaped switching signal is generated and output to the inverter 2.

FIG. 5 is a flow chart showing a process when the degeneration process according to the present invention is executed in the pre-stage processing unit 8. First, in step Fa1, the command phase voltages Vu, Vv, and Vw are received from the controller 5 for each control cycle, and the maximum absolute value Emax of the three-phase line voltage that satisfies the following expression (16) is obtained.
Ask for.

[0068]

(Equation 18)

Next, in step Fa2, the degeneration rate α is determined by comparing the DC voltage value E of the inverter 2 with the maximum absolute value Emax of the line voltage. The degeneration rate α can be determined, for example, according to the condition of the following Expression (17).

[0070]

[Formula 19]

In step Fa3, each command phase voltage is multiplied by the degeneracy rate α determined in step Fa2 to obtain the degenerate phase voltage α.
Vu, αVv, and αVw are generated. Each degenerate phase voltage is sent to the post-stage processing unit 9 as the intermediate phase voltage signal. These processes are repeated every control cycle.

FIG. 6 is a block diagram specifically showing the structure of the pre-stage processing unit 8 for realizing the degeneration process shown in FIG. The pre-stage processing unit 8 receives the command phase voltage from the controller 5 for each control cycle, and the maximum absolute value Emax of the three-phase line voltage.
Means 10 for determining and Emax input from means 10
In addition to receiving the voltage information E of the DC power supply 1, for example, the means 11 for determining the degeneration rate α according to the equation (17), and the degeneration rate by multiplying each command phase voltage from the controller 5 by the degeneration rate input from the means 11. And a multiplication means 12 for generating a phase voltage.

As described above, since the degeneration process is performed on each command phase voltage in the pre-stage processing unit 8 and the degenerate phase voltage obtained thereby is used as a new command voltage, linearity is always maintained. Thus, an optimum switching signal can be obtained when driving the three-phase AC motor 3. Therefore, it is possible to prevent the pulsating rotation of the motor 3, the generation of abnormal noise, the damage, and the like even with respect to an excessive command phase voltage.

According to the present invention, in addition to the above-mentioned degeneration process, a bias process for adding the same value to each command phase voltage is combined to improve the voltage utilization efficiency.
Switching loss can be reduced. FIG.
A process for executing both the degeneracy and bias processes by another embodiment of the pre-processing unit 8 is shown in a flowchart.

In this embodiment, similarly to the embodiment of FIG. 5, first, the maximum absolute value Emax of the three-phase line voltage is determined so as to satisfy the equation (16) (step Fb1), and then this is determined. The degeneration rate α is determined by comparing with the DC voltage E of the inverter (step Fb2). In the present embodiment, the degeneracy rate α may be determined in accordance with the condition of the following equation in consideration of the addition of the bias processing.

[0076]

(Equation 20)

In the next step Fb3, each command phase voltage is multiplied by the degeneracy rate α determined in step Fb2 to generate degenerate phase voltages αVu, αVv, αVw. In step Fb4, the bias value Vb to be added to the degenerate phase voltage is determined based on the degenerate phase voltage. To determine the bias value Vb, for example, the equation (2) using the minimum value of the degenerate phase voltage and the DC voltage value E, or the equation (3) using the maximum value of the degenerate phase voltage and the DC voltage value E is used. ) Can be used. Further, the bias value Vb can be determined by the following equation using the intermediate value Vamid of the degenerate phase voltage.

[0078]

[Equation 21]

Finally, in step Fb5, the bias value Vb determined in step Fb4 is added to each of the degenerate phase voltages generated in step Fb3 to generate the degenerate bias phase voltages Vuab, Vvab, Vwab, and the post-stage processing unit 9 Output to. These processes are repeatedly executed in each control cycle as in each of the above embodiments.

FIG. 8 is a block diagram showing a configuration for realizing the pre-stage processing unit 8 which executes both the degeneracy and bias processing shown in FIG. The pre-stage processing unit 8 of this embodiment is similar to that of FIG.
Similar to the embodiment described above, it has Emax determining means 10 and degeneracy rate determining means 11, and the degeneracy rate α output from the degeneracy rate determining means 11 is sent to the degenerate bias phase voltage generating means 16. The degenerate bias phase voltage generation means 16 includes a multiplication means 1
2 and the adding means 14 are connected. Multiplication means 12
Multiplies each command phase voltage by the degeneracy rate α to generate a degenerate phase voltage, and outputs these to the adding means 14 and the bias determining means 17. The bias determining means 17 generates a constant bias value Vb to be uniformly added to each degenerate phase voltage received from the multiplying means 12, for example, according to the above formula (2) or formula (3). The bias value Vb is output to the adding means 14 where it is added to each degenerate phase voltage from the multiplying means 12 and output as the degenerate bias phase voltages Vuab, Vvab, Vwab.

FIGS. 9 (a) and 9 (b) are still another embodiments of the pre-stage processing section 8, respectively, and are flowcharts showing the steps for executing both the degeneracy and bias processing according to the present invention. There is. In the embodiment of FIG. 9A, the command phase voltages Vu, Vv, Vw are received from the controller 5 for each control cycle in step Fc1 as in the embodiment of FIG. 5, and the maximum absolute value of the three-phase line voltage is received. Find Emax. Next, at step Fc2, the DC voltage E of the inverter 2 is compared with the maximum absolute value Emax of the line voltage to determine the degeneration rate α.

At step Fc3, a constant bias value V
Determine b. The bias value Vb is determined based on the command phase voltage. For example, the following equation (2) using the maximum value or the minimum value of the command phase voltage and the DC voltage value E is used.
0) or (21) may be used. It is also possible to use the intermediate value of the command phase voltage.

[0083]

[Equation 22]

In the next step Fc4, the bias value Vb determined in step Fc3 is added to each command phase voltage in accordance with the equation (15), and the bias phase voltages Vub, Vvb, V are added.
Generate wb. Further, in step Fc5, step F
By multiplying the bias phase voltage generated in c4 by the degeneration rate α determined in step Fc2 according to equation (14),
The degenerate bias phase voltages Vuab, Vvab, Vwab are generated. The generated degenerate bias phase voltage is sent to the post-stage processing unit 9 as the intermediate phase voltage signal and processed. These series of processes are repeatedly executed.

In the embodiment shown in FIG. 9B, as in the embodiment shown in FIG. 9A, the degeneration process and the bias process are executed in each control cycle in the pre-stage processing unit 8, but the processing procedure is slightly different. Be different. In this modified example, as can be seen from the flowchart of FIG. 9B, the bias value Vb is determined in step Fd1, the bias phase voltage is generated in step Fd2, and then the maximum absolute value Emax of the line voltage is calculated in step Fd3. Then, the degeneration rate α is determined (step Fd4), and the degenerate bias phase voltage is generated by multiplying this by the bias phase voltage (step Fd5). Degeneration rate α
Is the command phase voltage Vu, V as in the embodiment of FIG.
The maximum absolute value Emax of the three-phase line voltage can be obtained from v and Vw, and can be determined by comparing this with the DC voltage E of the inverter 2, and the maximum absolute value of the three-phase line voltage can be determined from the bias phase voltages. Even if the value Emax is obtained and compared with the DC voltage E of the inverter 2, the same value can be obtained.

FIG. 10 is a block diagram showing a configuration for realizing the pre-stage processing unit 8 which executes both the degeneracy and bias processing shown in FIG. The pre-processing unit 8 of the present embodiment receives the command phase voltage from the controller 5 for each control cycle and determines the maximum absolute value Emax of the three-phase line voltage, as in the embodiments of FIGS. 6 and 8. And receiving the maximum absolute value of the line voltage and the voltage information of the DC power source 1 from the means 10,
And means 11 for determining the degeneracy rate α. Degeneration rate α
Is determined, for example, according to the equation (18). Further, as in the embodiment shown in FIG. 8, the pre-stage processing unit 8 receives the command phase voltage from the controller 5 for each control cycle and determines the degeneration ratio 11.
Input a degeneracy rate α from, and add a constant bias value V
Means 13 for generating b are provided.

Similarly, the bias value Vb can be calculated by, for example, the equation (2)
0) or (21). The degeneration rate determining means 11 and the bias generating means 13 are composed of an adding means 14 and a multiplying means 12 similar to those in FIG. 8, and are connected to a means 15 for generating a degenerate bias phase voltage. The adding means 14 adds the bias value determined by the bias generating means 13 to the original command phase voltage to generate a bias phase voltage, and the multiplying means 12 calculates the degeneration rate determined by the degeneration rate determining means 11 by the bias phase voltage. And outputs the generated degenerate bias phase voltage to the post-stage processing unit 9.

As can be seen from the above embodiments, the linear signal processing for the command phase voltage in the pre-processing unit 8 of the PWM device 4 of the present invention can be expressed in a general form by the following equation. According to the present invention, the degeneration process and the bias process are performed in combination for each control cycle as described above, so that when the command phase voltage is maximum, the line of the degeneration phase voltage is maintained while maintaining the linearity. The maximum absolute value of the inter-voltage is kept within the range of the DC power supply voltage E, and it is possible to eliminate the switching loss while achieving a voltage utilization efficiency of 100%.

[0089]

(Equation 23)

FIG. 11 shows the configuration of a preferred embodiment of the post-stage processing section 9 in the PWM device 4. As described above, the intermediate phase voltage signal V input from the pre-processing unit 8 in various forms
ut, Vvt, and Vwt are calculated by the signal normalization unit 18,
It is divided by the DC power supply voltage value E, normalized, and sent to the pulse signal generation unit 19. By performing the normalization processing in this way, the subsequent processing in the pulse signal generation unit 19 can easily cope with the fluctuation of the DC power supply voltage. The carrier signal generation unit 20 receives information such as the frequency of the carrier signal from the outside and the phase signal from the signal normalization unit 18, and a carrier whose amplitude between peaks is normalized to 1, such as a triangular wave or a sawtooth wave, changes linearly. A signal is generated and output to the pulse signal generation unit 19. The pulse signal generation unit 19 compares the three phase signals input from the signal normalization unit 18 with the carrier signal from the carrier signal generation unit, and the switching pulse signal u
Generate p, un, vp, vn, wp, wn. Both the phase signal and the carrier signal have the same DC power supply voltage value E.
Since it has been normalized by, it is possible to obtain the same pulse signal as in the case where normalization processing is not performed.

As described above, in the present embodiment, the carrier signal generation unit 20 determines the basic shape of the carrier signal based on the phase voltage signal input from the signal normalization unit 18, such as a triangular wave or a sawtooth wave, In addition, the frequency of the carrier signal is determined based on the information from the outside of the post-stage processing unit 9. Further, the phase of the carrier signal can be selected to be upwardly convex or downwardly convex for each control cycle if it is a triangular wave, or can be selected to be a descending type or an ascending type if it is a sawtooth wave. In this way, by controlling the shape of the carrier signal according to the modulation signal for each control cycle, the optimum pulse signal is obtained,
It is possible to realize high-level PWM processing that minimizes switching loss while achieving 100% voltage utilization efficiency.

Further, in another embodiment, the carrier signal generator 20 can be made to receive all the information necessary for generating the above-mentioned carrier signal from the outside, and in that case, the same effect can be obtained. can get. Further, when only the triangular wave signal is used as the carrier signal, the optimality of the pulse signal finally obtained is somewhat impaired, but the structure of the carrier signal generation unit can be simplified and the cost can be reduced. There is. Needless to say, even in this case, there is no influence on the above-described essential function and effect of the present invention.

Generally, a short-circuit prevention period is set in the pulse signal in consideration of turn-on and turn-off characteristics of each switching element of the inverter 2. Various known methods can be used for this. For example, in FIG. 9, a signal required for such processing is input to the pulse signal generation unit 19 by a vector signal line 21 shown by a broken line for reference.

In each of the above-described embodiments, the signal normalization section 18 as shown in FIG. 11 is arranged on the post-processing section 9 side, but in another embodiment, the signal normalization section is arranged on the pre-processing section 8 side. be able to. That is, the pre-stage processing unit 8 can execute the degeneracy process and the normalization process at the same time, thereby improving the processing efficiency. In this case, for example, with respect to the embodiments of FIGS. 5 and 6, the degeneration rate α may be selected as in the following equation.

[0095]

[Equation 24]

Further, regarding the embodiments of FIGS. 7 to 10, the degeneration rate α can be selected as in the following equation.

[0097]

(Equation 25)

The entire PWM device 4 described above can be realized by a single IC. The structure of a preferred embodiment of such an IC is schematically shown in FIG.
In the figure, the IC 22 includes a PWM unit 23 corresponding to the PWM device and an interface unit 24 thereof. The interface unit 24 is added to transmit necessary signals to the PWM unit 23 when the PWM device is integrated into an IC, and has an interface 25 with the outside.
And registers 26 and 27 for temporarily storing the signal input via the interface. The register 26 stores the command phase voltages Vu, Vv, and Vw in the register 2
7 stores information such as a DC voltage value other than the command phase voltage. These signals are output to the PWM unit 23, and the PWM
The section 23 outputs six switching pulse signals to the inverter 2.

In another embodiment, for example, the PWM device 4 and the inverter 2 shown in FIG. 3 can be realized by one IC. A preferred embodiment of such an IC is shown schematically in FIG. In the IC 28 of this embodiment, as in the embodiment of FIG. 12, the PWM unit 23 corresponding to the PWM device 4, its interface unit 24, and the inverter 2 are partially I.
It has a C-shaped inverter unit 29. Inverter part 2
9 includes an interface unit 30 with the PWM unit 23, a base amplifier unit 31, and a power transistor unit 32.

The six switching signals output from the PWM unit 23 are input to the base amplifier unit 31 via the high breakdown voltage interface unit 30, and the power transistor unit 3
After being amplified to a level sufficient to drive the power transistors such as the IGBT and the MOSFET that form the circuit 2, the power is output to the power transistor unit 32. The power transistor unit 32 performs a switching operation according to a signal input from the base amplifier unit, converts DC power supplied from the DC power supply 1 into AC power, and supplies the AC power to the three-phase load 33.

FIG. 14 shows a PWM device according to the present invention with one I.sub.2.
9 shows still another embodiment realized in C. The IC 34 of the present embodiment includes, for example, a P corresponding to the PWM device 4 of FIG.
A WM unit 23 and a control unit 35 corresponding to the controller 5 are mounted. Further, the IC 34 has an I of PWM device.
Corresponding to the conversion to C, various necessary information is input from the outside to be supplied to the PWM unit and the control unit, and an interface unit 36 is provided to output a part of the information from the control unit 35 to the outside. Has been.

Although the PWM control method and device of the present invention have been described in detail with reference to the preferred embodiments, the present invention is not limited to the above embodiments, as will be apparent to those skilled in the art. Various modifications and changes can be made and implemented within the technical scope.

[0103]

Since the present invention is constructed as described above, it has the following remarkable effects.

P for the three-phase voltage source inverter of the present invention
According to the WM method, linear change occurs by performing predetermined discrete-time linear signal processing for each control cycle before PWM processing of the command phase voltage to generate a switching pulse signal to the inverter. Even if the command phase voltage exceeds the level of the carrier signal, the PWM can be used reasonably without compromising the linearity, while taking advantage of the superiority of the conventional PWM method that uses a carrier signal such as a triangular wave or sawtooth wave. Processing can be performed. Especially when it is used for driving a motor or the like, there is no risk of causing inconvenient behavior or damage to the motor, and the command phase voltage of any shape required for a three-phase load such as a servo drive motor is applied. The present invention can be applied without any problem, and an optimal switching signal with theoretical voltage utilization efficiency of 100% and less switching loss can be generated. That is, according to the present invention, it is possible to solve the above-mentioned various problems of the conventional technique and realize a PWM method for a three-phase voltage source inverter which is extremely simple in processing and has high practicability and reliability.

Further, according to the PWM device of the present invention, it is possible to make a slight modification to the conventional PWM device with a relatively simple structure without requiring complicated equipment and facilities.
The discrete-time PWM method of the present invention described above can be realized, and can be easily incorporated and used in various existing systems. In particular, the PWM device of the present invention is
It is suitable for C conversion, whereby higher reliability can be secured, and further downsizing and cost reduction can be achieved.

[Brief description of drawings]

FIG. 1 is a waveform diagram showing an example of a switching signal generated when each command phase voltage is 0 in PWM processing according to the present invention.

FIG. 2 is a waveform diagram showing an example of how the shape of a carrier signal is controlled for each control cycle in the PWM processing according to the present invention.

FIG. 3 is a block diagram showing a configuration of a servo system for driving and controlling an induction motor as a three-phase load using the discrete-time PWM device according to the present invention.

FIG. 4 is a block diagram showing a configuration of the PWM device of FIG.

FIG. 5 is a flowchart showing a signal processing process in a pre-stage processing unit according to the first embodiment of the PWM device.

FIG. 6 is a block diagram showing a configuration of a pre-stage processing unit of the PWM device according to the first embodiment of FIG.

FIG. 7 is a flowchart showing a signal processing process in a pre-stage processing unit according to the second embodiment of the PWM device.

8 is a block diagram showing a configuration of a pre-stage processing unit of the PWM device according to the second embodiment of FIG.

9A and 9B are flow charts showing a signal processing process in a pre-stage processing unit according to the third embodiment of the PWM device.

10 is a block diagram showing a configuration of a pre-stage processing unit of the PWM device according to the third embodiment of FIG.

FIG. 11 is a block diagram showing a configuration of a post-processing unit of the PWM device.

FIG. 12 is a block diagram showing a configuration of an IC equipped with a PWM device.

FIG. 13 is a block diagram showing the configuration of an IC equipped with a PWM device and an inverter.

FIG. 14 is a block diagram showing the configuration of an IC equipped with a PWM device and a controller.

FIG. 15 is a circuit diagram showing a configuration of a system including a conventional three-phase voltage source inverter and a PWM device for driving and controlling a three-phase AC motor.

FIG. 16 is a diagram showing a state in which a switching signal is generated from a command phase voltage by comparison with a triangular wave signal as a carrier signal using a conventional technique.

FIG. 17 is a waveform diagram showing a case where the command phase voltages of three phases are limiter-processed by the conventional technique.

FIG. 18 is a waveform diagram showing generation of a switching signal when each command phase voltage is 0 in the conventional triangular wave comparison type PWM.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 DC power supply 2 Inverter 3 3-phase AC motor 4 PWM device 5 Controller 6 Speed sensor 7 Ammeter 8 Pre-stage processing section 9 Post-stage processing section 10 Emax determining means 11 Degeneration rate determining means 12 Multiplication means 13 Bias generating means 14 Addition means 15 Degenerate bias phase voltage generating means 16 Degenerate bias phase voltage generating means 17 Bias determining means 18 Signal normalizing section 19 Pulse signal generating section 20 Carrier signal generating section 21 Vector signal line 22 IC 23 PWM section 24 Interface section 25 Interface 26, 27 registers 28 IC 29 Inverter section 30 Interface section 31 Base amplifier section 32 Power transistor section 33 Three-phase load 34 IC 35 Control section 36 Interface section

Claims (16)

[Claims] 1. A PWM (pulse width modulation) for converting a command phase voltage into a pulse signal for switching of a three-phase voltage source inverter having a DC power supply by comparing a command phase voltage with a carrier signal for modulation in order to generate three-phase power. And a command phase voltage Vu, Vv of each phase of U, V, W for each control cycle.
The amplitude of the modulation carrier signal is not exceeded with respect to Vw by using the following equation (1) represented by a constant degeneration rate α (0 <α ≦ 1) and a bias value β at least during each control cycle. The linear signal processing is performed as described above, and the intermediate phase voltage signals Vut, Vvt, and Vw of the U, V, and W phases obtained as a result are obtained.
A PWM method for a three-phase voltage source inverter, wherein the pulse signal for switching is obtained by using the carrier signal for modulation for t. [Equation 1] 2. The command phase voltages Vu, V for each control cycle
2. The degeneration rate α is determined by obtaining the maximum absolute value of the three-phase line voltage from v and Vw and comparing the maximum absolute value of the line voltage with the voltage value of the DC power supply. A PWM method for a described three-phase voltage source inverter. 3. The degenerate phase voltage α · Vu, α · Vv, α · Vw is generated by setting the bias value β = 0, and multiplying each of the command phase voltages by the degeneration rate α for each control cycle. The degeneration phase voltage is used as the intermediate phase voltage signal, and the switching pulse signal is obtained by using the carrier signal in which the peak-to-peak amplitude is equal to the DC power supply voltage value. A PWM method for a three-phase voltage source inverter according to claim 2. 4. A degenerate phase voltage α · Vu, α · Vv, α · Vw is generated by multiplying each of the command phase voltages by the degeneration rate α.
A degenerate bias phase voltage Vuab, Vv is obtained by adding a constant bias value Vb to each degenerate phase voltage at least during each control period.
ab and Vwab are generated, and the switching pulse signal is obtained by using the carrier signal having the peak-to-peak amplitude as the DC power supply voltage value using these as the intermediate-phase voltage signals. Claim 1
Or P for the three-phase voltage source inverter according to claim 2
WM method. 5. The PWM method for a three-phase voltage source inverter according to claim 4, wherein the bias value Vb is determined based on the degenerate phase voltage. 6. The bias value Vb is determined based on the following equation (2) or (3) represented by the maximum value Vmax or the minimum value Vmin of the degenerate phase voltage and the DC power supply voltage value E. 6. A PWM method for a three-phase voltage source inverter according to claim 4 or claim 5. [Equation 2] 7. A bias value Vb, which is constant during at least each control cycle, is added to each command phase voltage for each control cycle to generate bias phase voltages Vub, Vvb, Vwb, and each command phase voltage or each command phase voltage is generated. The maximum absolute value of the three-phase line voltage is obtained from the bias phase voltage, and the maximum absolute value of the line voltage is compared with the voltage value of the DC power supply to determine the degeneration rate α,
The degenerate bias phase voltages Vuab, Vvab, and Vwab are generated by multiplying the bias phase voltages by the degeneration rate α, and the carrier signals having the peak-to-peak amplitude as the DC power supply voltage value are generated as the intermediate phase voltage signals. 2. The PWM method for a three-phase voltage source inverter according to claim 1, wherein the switching pulse signal is obtained by using the. 8. The PWM method for a three-phase voltage source inverter according to claim 1, wherein the shape of the carrier signal is controlled every control cycle. 9. In order to generate three-phase electric power, a command phase voltage input from the outside is converted into a switching pulse signal by comparison with a modulation carrier signal and output to a three-phase voltage source inverter having a DC power supply. A PWM (pulse width modulation) device for controlling the command phase voltages Vu, Vv of U, V, W phases for each control cycle.
The amplitude of the modulation carrier signal is not exceeded with respect to Vw by using the following equation (1) represented by a constant degeneration rate α (0 <α ≦ 1) and a bias value β at least during each control cycle. Means for performing linear signal processing, and by using the modulating carrier signal for the intermediate phase voltage signals Vut, Vvt, Vwt of the U, V, W phases obtained from the means, the switching pulse signal is A PWM device for a three-phase voltage source inverter, comprising: a PWM processing means for generating. (Equation 3) 10. The linear signal processing means obtains the maximum absolute value of the three-phase line voltage from the command phase voltages Vu, Vv, Vw for each control cycle, and the line voltage obtained by the means. Means for comparing the maximum absolute value and the voltage value of the DC power supply to determine the degeneration rate α, and multiplying the degeneration rate α by each command phase voltage to obtain the degeneration phase voltage of each of U, V and W phases. 10. The PWM device for a three-phase voltage source inverter according to claim 9, further comprising: means for generating, and outputting each of the degenerate phase voltages as the intermediate phase voltage signal to the PWM processing means. 11. The PWM device for a three-phase voltage source inverter according to claim 10, wherein the linear signal processing means further includes means for determining the bias value β for each control cycle. 12. The bias value determining means comprises means for determining a constant bias value to be added to each of the degenerate phase voltages in each control cycle, and the linear signal processing means further includes the determined bias value. 2. A means for adding a value to each of the degenerate phase voltages to generate a degenerate bias phase voltage, and outputting each of the degenerate bias phase voltages as the intermediate phase voltage signal to the PWM processing means.
A PWM device for the three-phase voltage source inverter according to 1. 13. The linear signal processing means determines a constant bias value to be added to each command phase voltage for each control cycle, and the bias value thus determined is used as each command phase voltage. To generate a bias phase voltage, a means for obtaining the maximum absolute value of the three-phase line voltage from the command phase voltage or the bias phase voltage for each control cycle, and the line spacing thus obtained. Means for determining the degeneration rate α by comparing the maximum voltage absolute value with the voltage value of the DC power supply; and degenerate bias phase voltage for each phase of U, V and W by multiplying each bias phase voltage by the degeneration rate α. 10. The P for a three-phase voltage source inverter according to claim 9, wherein the degenerate bias phase voltage is output to the PWM processing means as the intermediate phase voltage signal.
WM device. 14. The PWM processing means includes means for controlling the shape of the carrier signal for each control cycle, as claimed in claim 9.
PWM device for phase voltage source inverter. 15. At least the linear signal processing means I
The PWM device for a three-phase voltage source inverter according to any one of claims 9 to 14, wherein the PWM device is C-type. 16. The control unit for generating each command phase voltage according to information input from the outside and outputting the command phase voltage to the linear signal processing means is integrated into an IC.
A PWM device for the three-phase voltage source inverter according to claim 5.