US20020121875A1 - Method and apparatus for pulse width modulation - Google Patents
Method and apparatus for pulse width modulation Download PDFInfo
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- US20020121875A1 US20020121875A1 US09/756,410 US75641001A US2002121875A1 US 20020121875 A1 US20020121875 A1 US 20020121875A1 US 75641001 A US75641001 A US 75641001A US 2002121875 A1 US2002121875 A1 US 2002121875A1
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B11/00—Automatic controllers
- G05B11/01—Automatic controllers electric
- G05B11/26—Automatic controllers electric in which the output signal is a pulse-train
- G05B11/28—Automatic controllers electric in which the output signal is a pulse-train using pulse-height modulation; using pulse-width modulation
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- the present invention relates generally to a method and apparatus for pulse width modulation, and more particularly, to a method and apparatus for pulse width modulation for an inverter circuit of a motor.
- PWM Pulse width modulation
- Sine-triangle PWM is one of the simplest to implement. In sine-triangle PWM a desired voltage waveform is compare to a triangle waveform, called the carrier signal. The pulse width is determined by the intersection of the two signals as shown in FIG.
- the maximum line-to-line voltage produced by Sine-Triangle PWM is 0.866 VDC or 86% of the DC supply. It has been shown that adding triplen harmonics to the phase voltage commands increases the line-to-line output voltage possible, without adding harmonic distortion to the machine.
- the Space Vector PWM is a PWM method that is equivalent to adding the triplen harmonics to the phase voltages.
- the SVPWM method is based on a complex voltage vector or voltage space vector.
- a voltage space vector represents a voltage distributed sinusoidally in space.
- An inverter feeding a machine with three equally, sinusoidally distributed windings can produce six non-zero space vectors and two zero space vectors.
- Each vector has an associated switching state, with “ ⁇ ” representing an open inverter switch and “+” meaning the switch is closed.
- the non-zero vectors form six sectors within a hexagon.
- the first task in realizing a given voltage space vector is to determine which sector the vector resides.
- the given space vector Ua is spatially located between the vectors of switching states ⁇ + ⁇ and ⁇ ++ ⁇ .
- the space vector Ua can be represented by projections, Ua1 and Ua2, onto the two switching state vectors.
- the inverter must divide the time spent in each switching state for a given time period. By toggling between states ⁇ , ⁇ + ⁇ , ⁇ ++ ⁇ , and ⁇ +++ ⁇ for specific time duration, an average value of Ua is produced.
- SVPWM method is more complex than the sine-triangle PWM method.
- the benefit of SVPWM is a greater potential output voltage.
- the two circular trajectories inscribed in the hexagon represent the maximum peak voltage space vectors for the two PWM methods mentioned while in the linear modulation region.
- the maximum fundamental peak phase voltage is equal to half of the DC bus voltage.
- the addition of the triplen harmonics in SVPWM results in a greater maximum fundamental peak phase voltage of V dc ⁇ square root ⁇ square root over (v3) ⁇ . Due to the improved utilization of the DC voltage supply, the SVPWM method is the preferred PWM method, despite its computational complexity.
- FIGS. 5 a - 6 d shows examples of the offset voltage for SVPWM and three types of discontinuous PWM.
- the addition of the offset voltage to the phase voltage can be performed in either one of two ways.
- the digital hardware could have an arithmetic logic unit (ALU), which would sequentially add the offset to each of the reference voltages.
- ALU arithmetic logic unit
- the addition of an ALU to any hardware design adds complexity.
- the addition of the offset to each of the phase voltages could be processed simultaneously.
- An up/down counter 10 is coupled to a signal equal to the period divided by two. By counting the signal and coupling it to comparators 12 , comparators 12 generate the desired pulses for each phase.
- the advantage of this parallel processing design is decreased computational time and a less complex, combinatorial design.
- the disadvantage of this implementation is the hardware cost of the n Full Adder units.
- a circuit for pulse width modulating a motor having n phase windings where n is greater than one includes an adder for adding a voltage offset signal and a carrier timing signal to form an offset carrier timing signal.
- a plurality of comparators equal to the number of phases are coupled to the adder and one of the n phase voltage signals.
- the n comparators form respective n output pulses corresponding to n phases in response to the offset carrier timing signal.
- a method of providing pulse width modulation for a motor controller having n phase windings comprises the steps of:
- One advantage of the invention is that the present invention may be implemented in analog circuitry, digital circuitry, and in software. Another advantage of the invention is that nearly all known forms of pulse width modulation may be implemented easily using the same basic software or hardware.
- Another advantage of the invention is that in a digital or analog hardware implementation, a significant reduction in hardware complexity and cost is achieved.
- the reduction in hardware complexity makes the pulse width modulation circuit more economically practical particularly in automotive applications.
- Another advantage of the invention is that the software implementation has a significant reduction in computational complexity. The reduction in computational complexity results in more efficient use of the microprocessor and potentially lower cost since a lower performance processor may be used.
- FIG. 1 is a plot of a pulse width modulation signal formed according to a sine-triangle pulse width modulation according to the prior art.
- FIG. 2 is a plot of potential voltage vectors of an inverter corresponding to the inverter switching states according to the prior art.
- FIG. 3 is a vector plot of adjacent inverter voltage vectors according to the prior art.
- FIG. 4 is a maximum fundamental peak voltage plot illustrating two circular trajectories inscribed in a hexagon to represent the maximum peak voltage space vectors for two pulse width modulation methods according to the prior art.
- FIG. 5 is a plot of adjustment of phase voltage by adding an offset voltage resulting in space vector pulse width modulation according to the prior art.
- FIGS. 6 a - 6 d illustrate four types of offset signals used for space vector pulse width modulation and three discontinuous types of PWM according to the prior art.
- FIG. 7 is a schematic of a digital implementation of sine-triangle pulse width modulation width offset voltage addition according to the prior art.
- FIG. 8 is an adjustment of carrier signal by the offset voltage calculated for the implementation of space vector pulse width modulation according to the present invention.
- FIG. 9 is a schematic of an analog implementation of a pulse width modulation circuit according to the present invention.
- FIG. 10 is a schematic of an digital implementation of a pulse width modulation circuit according to the present invention.
- the present invention adds the offset voltage to the carrier waveform instead of adjusting each phase voltage command by the addition of an offset voltage as is described in the Background.
- FIG. 8 a plot illustrating a carrier signal 30 which is offset by an amount 32 corresponding to the offset voltage calculation for space vector pulse width modulation.
- the phase voltage signals V a , V b , and V c remain positioned relatively the same while the carrier signal is offset by the offset voltage 32 .
- the maximum voltage point of the carrier signal is V dc/2 +V offset .
- a carrier wave calculator 36 is coupled to an offset calculator 38 .
- the offset calculator 38 generates an offset signal which is coupled to the carrier wave signal generated by the carrier wave calculator 36 .
- the carrier wave signal and the offset calculator signal are coupled to an adder 40 where they are added together to form an offset carrier wave signal.
- the offset carrier wave signal is supplied to each of the plurality of adders 42 a , 42 b , and 42 c corresponding to the phase voltage signals V a , V b , and V c .
- the adders 42 a , 42 b , and 42 c add the offset carrier wave signal to the phase voltage signals.
- a plurality of comparators 44 a , 44 b , and 44 c receive the signal from adders 42 a , 42 b , and 42 c .
- the comparators 44 a - 44 c are coupled to the gate drive circuitry of inverter 46 .
- the output of the comparators 44 a - 44 c provide pulses to control the switching of inverter 46 .
- Inverter 46 is coupled to a motor 48 in a conventional manner. Thus, each of the switches are controlled by the pulse widths generated by circuit 34 .
- an offset voltage V offset is coupled to an adder 52 .
- a signal equivalent to half the period (T/2) is coupled to an up/down counter 54 which has a signal which is coupled to adder 52 .
- the output of counter 54 is the carrier signal which is added to the voltage offset at adder 52 to provide the offset carrier signal.
- the offset carrier signal is coupled to a plurality of comparators 52 a , 52 b , and 52 n , where n is the number of phase voltage signals.
- each of the outputs of comparators 52 a - 52 n produce a pulse width that is coupled to the inverter 46 and motor 48 in a similar manner to that illustrated in FIG. 9.
- the voltage offset combined with the type of carrier signal used will determine the type of pulse width modulation used
- the present invention may accommodate various types of pulse width modulation including space vector pulse width modulation, discontinuous pulse width modulation, and sine-triangle modulation.
- the digital design may be integrated into a motor control processor chip such as a digital signal processor or microcontroller.
- the design may also be incorporated into an application specific integrated circuit (ASIC).
- ASIC application specific integrated circuit
- the stand alone device may receive voltage commands from a variety of sources including general microprocessors or digital signal microprocessors depending on performance needs.
- the offset voltage calculation could also be implemented in hardware, further reducing the load on the microcontroller processor.
- the present invention reduces the number of lines of codes which increases the operational efficiency of the device. When used in a greater than three-phase system, the present invention results in almost no increase in hardware complexity due to the additional phases.
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Abstract
Description
- The present invention relates generally to a method and apparatus for pulse width modulation, and more particularly, to a method and apparatus for pulse width modulation for an inverter circuit of a motor.
- Most adjustable speed and torque drives are powered by an inverter. An inverter converts DC voltage or current to an AC waveform. The inverter consists of a DC source supplying voltage or current to a number of controllable switches. Pulse width modulation (PWM) is a method of controlling the inverter switching pattern to produce the desired amplitude and frequency of the output voltage or current. There are numerous forms of PWM. Sine-triangle PWM is one of the simplest to implement. In sine-triangle PWM a desired voltage waveform is compare to a triangle waveform, called the carrier signal. The pulse width is determined by the intersection of the two signals as shown in FIG.
- For a three-phase system, the maximum line-to-line voltage produced by Sine-Triangle PWM is 0.866 VDC or 86% of the DC supply. It has been shown that adding triplen harmonics to the phase voltage commands increases the line-to-line output voltage possible, without adding harmonic distortion to the machine.
- The Space Vector PWM (SVPWM) is a PWM method that is equivalent to adding the triplen harmonics to the phase voltages. However, instead of phase voltages, the SVPWM method is based on a complex voltage vector or voltage space vector. A voltage space vector represents a voltage distributed sinusoidally in space. An inverter feeding a machine with three equally, sinusoidally distributed windings can produce six non-zero space vectors and two zero space vectors. Each vector has an associated switching state, with “−” representing an open inverter switch and “+” meaning the switch is closed. As shown in FIG. 2, the non-zero vectors form six sectors within a hexagon.
- The first task in realizing a given voltage space vector, is to determine which sector the vector resides. In FIG. 3, the given space vector Ua is spatially located between the vectors of switching states {+−−} and {++−}. The space vector Ua can be represented by projections, Ua1 and Ua2, onto the two switching state vectors. However, to physically realize Ua, the inverter must divide the time spent in each switching state for a given time period. By toggling between states {−−−}, {+−−}, {++−}, and {+++} for specific time duration, an average value of Ua is produced.
-
- Computationally, SVPWM method is more complex than the sine-triangle PWM method. However, the benefit of SVPWM is a greater potential output voltage. As shown in FIG. 4, the two circular trajectories inscribed in the hexagon represent the maximum peak voltage space vectors for the two PWM methods mentioned while in the linear modulation region. For sine-triangle PWM, the maximum fundamental peak phase voltage is equal to half of the DC bus voltage. The addition of the triplen harmonics in SVPWM, results in a greater maximum fundamental peak phase voltage of Vdc{square root}{square root over (v3)}. Due to the improved utilization of the DC voltage supply, the SVPWM method is the preferred PWM method, despite its computational complexity.
- Recently, a method has been developed that eliminates the need for the trigonometric calculations in the SVPWM algorithm. In addition, this method simplifies the implementation of other forms of PWM such as 60° and 120° discontinuous, and allows for simplified overmodulation strategies. The method is based on the sine-triangle PWM, either discrete or analog, and realizes the other forms of PWM by adding an identical offset voltage (zero sequence voltage) to each of the phase voltage commands. An equivalent of SVPWM can be realized by using an offset voltage equal to the average of the maximum and minimum phase voltages as shown in FIG. 5. The addition of the offset centers the phase voltages between +/− Vdc/2. As a result, the phase voltages can be increased beyond the maximum magnitude possible when using the sine-triangle PWM alone. This method implicitly adds the triplen harmonics to the phase voltages by adjusting those voltages relative to the DC bus voltage limits.
- The calculation of the offset voltage and its addition to the phase voltage commands can be easily implemented in a microprocessor, using only addition, multiplication, and compare instructions. For a three-phase system, a total of three add instructions are needed to shift the phase voltages. FIGS. 5a-6 d shows examples of the offset voltage for SVPWM and three types of discontinuous PWM.
- For a digital hardware implementation, the addition of the offset voltage to the phase voltage can be performed in either one of two ways. The digital hardware could have an arithmetic logic unit (ALU), which would sequentially add the offset to each of the reference voltages. However, the addition of an ALU to any hardware design adds complexity. Instead of an ALU, the addition of the offset to each of the phase voltages could be processed simultaneously. For every n phases, there would be n adder units10 coupled to n comparator circuits 12, which adjust each phase voltage in parallel as shown in FIG. 7. An up/down counter 10 is coupled to a signal equal to the period divided by two. By counting the signal and coupling it to comparators 12, comparators 12 generate the desired pulses for each phase. The advantage of this parallel processing design is decreased computational time and a less complex, combinatorial design. The disadvantage of this implementation is the hardware cost of the n Full Adder units.
- It is desirable to reduce costs particularly in high volume automotive applications by reducing the amount of components when implemented in the hardware used for providing pulse width modulation for a motor. When implemented in software it is desirable to reduce the number of computational steps to improve the efficiency of the microprocessor.
- It is therefore an object of the invention to improve the system efficiency of a pulse with modulating circuit.
- In one aspect of the invention, a circuit for pulse width modulating a motor having n phase windings where n is greater than one includes an adder for adding a voltage offset signal and a carrier timing signal to form an offset carrier timing signal. A plurality of comparators equal to the number of phases are coupled to the adder and one of the n phase voltage signals. The n comparators form respective n output pulses corresponding to n phases in response to the offset carrier timing signal.
- In another aspect of the invention, a method of providing pulse width modulation for a motor controller having n phase windings comprises the steps of:
- generating a voltage offset;
- adding the voltage offset to a carrier timing signal to form an offset carrier timing signal; and
- controlling the operation of each phase of the motor as a function of the offset carrier timing signal.
- One advantage of the invention is that the present invention may be implemented in analog circuitry, digital circuitry, and in software. Another advantage of the invention is that nearly all known forms of pulse width modulation may be implemented easily using the same basic software or hardware.
- Another advantage of the invention is that in a digital or analog hardware implementation, a significant reduction in hardware complexity and cost is achieved. The reduction in hardware complexity makes the pulse width modulation circuit more economically practical particularly in automotive applications. Another advantage of the invention is that the software implementation has a significant reduction in computational complexity. The reduction in computational complexity results in more efficient use of the microprocessor and potentially lower cost since a lower performance processor may be used.
- Other objects and features of the present invention will become apparent when viewed in light of the detailed description of the preferred embodiment when taken in conjunction with the attached drawings and appended claims.
- FIG. 1 is a plot of a pulse width modulation signal formed according to a sine-triangle pulse width modulation according to the prior art.
- FIG. 2 is a plot of potential voltage vectors of an inverter corresponding to the inverter switching states according to the prior art.
- FIG. 3 is a vector plot of adjacent inverter voltage vectors according to the prior art.
- FIG. 4 is a maximum fundamental peak voltage plot illustrating two circular trajectories inscribed in a hexagon to represent the maximum peak voltage space vectors for two pulse width modulation methods according to the prior art.
- FIG. 5 is a plot of adjustment of phase voltage by adding an offset voltage resulting in space vector pulse width modulation according to the prior art.
- FIGS. 6a-6 d illustrate four types of offset signals used for space vector pulse width modulation and three discontinuous types of PWM according to the prior art.
- FIG. 7 is a schematic of a digital implementation of sine-triangle pulse width modulation width offset voltage addition according to the prior art.
- FIG. 8 is an adjustment of carrier signal by the offset voltage calculated for the implementation of space vector pulse width modulation according to the present invention.
- FIG. 9 is a schematic of an analog implementation of a pulse width modulation circuit according to the present invention.
- FIG. 10 is a schematic of an digital implementation of a pulse width modulation circuit according to the present invention.
- In the following figures, the same reference numerals will be used to illustrate the same components in the various views. An implementation of the present invention in analog circuitry, and digital circuitry is illustrated. The steps of the present invention suitable for a software implementation are also described.
- The present invention adds the offset voltage to the carrier waveform instead of adjusting each phase voltage command by the addition of an offset voltage as is described in the Background.
- Referring now to FIG. 8, a plot illustrating a carrier signal30 which is offset by an amount 32 corresponding to the offset voltage calculation for space vector pulse width modulation. As can be seen, the phase voltage signals Va, Vb, and Vc remain positioned relatively the same while the carrier signal is offset by the offset voltage 32. Each of the implementations illustrated below provide the same result. Thus, the maximum voltage point of the carrier signal is Vdc/2+Voffset.
- Referring now to FIG. 9, an analog circuit34 for implementing the present invention is illustrated. In this embodiment, a carrier wave calculator 36 is coupled to an offset calculator 38. The offset calculator 38 generates an offset signal which is coupled to the carrier wave signal generated by the carrier wave calculator 36. The carrier wave signal and the offset calculator signal are coupled to an adder 40 where they are added together to form an offset carrier wave signal. The offset carrier wave signal is supplied to each of the plurality of adders 42 a, 42 b, and 42 c corresponding to the phase voltage signals Va, Vb, and Vc. Thus, the adders 42 a, 42 b, and 42 c add the offset carrier wave signal to the phase voltage signals.
- A plurality of comparators44 a, 44 b, and 44 c receive the signal from adders 42 a, 42 b, and 42 c. The comparators 44 a-44 c are coupled to the gate drive circuitry of inverter 46. The output of the comparators 44 a- 44 c provide pulses to control the switching of inverter 46. Inverter 46 is coupled to a motor 48 in a conventional manner. Thus, each of the switches are controlled by the pulse widths generated by circuit 34.
- Referring now to FIG. 10, a digital circuit50 for implementing the present invention is illustrated. In this embodiment, an offset voltage Voffset is coupled to an adder 52. Also, a signal equivalent to half the period (T/2) is coupled to an up/down counter 54 which has a signal which is coupled to adder 52. The output of counter 54 is the carrier signal which is added to the voltage offset at adder 52 to provide the offset carrier signal. The offset carrier signal is coupled to a plurality of comparators 52 a, 52 b, and 52 n, where n is the number of phase voltage signals. In this embodiment, each of the outputs of comparators 52 a-52 n produce a pulse width that is coupled to the inverter 46 and motor 48 in a similar manner to that illustrated in FIG. 9.
- In operation, the voltage offset combined with the type of carrier signal used will determine the type of pulse width modulation used The present invention may accommodate various types of pulse width modulation including space vector pulse width modulation, discontinuous pulse width modulation, and sine-triangle modulation.
- To obtain the various types of PWM such as those described in the Background, the various offset signals are modified. Various types of offset signals suitable for the present invention are illustrated in FIG. 6.
- When implemented in digital hardware, a reduction in complexity and costs is achieved by reducing the number of adders. The digital design may be integrated into a motor control processor chip such as a digital signal processor or microcontroller. The design may also be incorporated into an application specific integrated circuit (ASIC). The stand alone device may receive voltage commands from a variety of sources including general microprocessors or digital signal microprocessors depending on performance needs. In addition to implementing the actual pulse width modulation in hardware, the offset voltage calculation could also be implemented in hardware, further reducing the load on the microcontroller processor. When implemented in software, the present invention reduces the number of lines of codes which increases the operational efficiency of the device. When used in a greater than three-phase system, the present invention results in almost no increase in hardware complexity due to the additional phases.
- While particular embodiments of the invention have been shown and described, numerous variations and alternate embodiments will occur to those skilled in the art. Accordingly, it is intended that the invention be limited only in terms of the appended claims.
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US20060192522A1 (en) * | 2005-02-28 | 2006-08-31 | Rockwell Automation Technologies, Inc. | Modulation methods and apparatus for reducing common mode voltages |
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KR100425851B1 (en) * | 2001-05-10 | 2004-04-03 | 엘지산전 주식회사 | Method for measuring three-phase current with single current sensor |
US7334510B2 (en) * | 2003-07-24 | 2008-02-26 | Hunter Engineering Company | Vehicle brake lathe with variable speed motor |
KR20070072088A (en) * | 2005-12-30 | 2007-07-04 | 엘지전자 주식회사 | Apparatus and method for conrolling inverter |
US7679310B2 (en) * | 2007-10-24 | 2010-03-16 | Gm Global Technology Operations, Inc. | Method and system for controlling pulse width modulation in a power inverter in electric drives |
CN104737439B (en) | 2012-08-22 | 2018-11-13 | 开利公司 | The system and method for carrying out space vector pwm switch using charging circuit |
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DE3573497D1 (en) | 1984-03-08 | 1989-11-09 | Meidensha Electric Mfg Co Ltd | DIGITAL PWMED PULSE GENERATOR |
US4875448A (en) * | 1988-09-23 | 1989-10-24 | Briggs & Stratton Corporation | Cyclic responding electronic speed governor |
US4939633A (en) * | 1989-02-03 | 1990-07-03 | General Signal Corporation | Inverter power supply system |
US5121043A (en) * | 1990-09-28 | 1992-06-09 | Allen-Bradley Company, Inc. | PWM control in the pulse dropping region |
US5650708A (en) * | 1992-12-08 | 1997-07-22 | Nippondenso Co., Ltd. | Inverter control apparatus using a two-phase modulation method |
KR0166112B1 (en) * | 1993-06-30 | 1999-03-20 | 다까노 야스아끼 | Power circuit amplifier circuit and hybrid integrated circuit apparatus |
JP3395920B2 (en) * | 1994-07-05 | 2003-04-14 | 株式会社デンソー | Inverter control device |
JPH08340691A (en) | 1995-06-08 | 1996-12-24 | Nippondenso Co Ltd | Inverter controller |
US5648705A (en) * | 1995-09-05 | 1997-07-15 | Ford Motor Company | Motor vehicle alternator and methods of operation |
US5933453A (en) * | 1997-04-29 | 1999-08-03 | Hewlett-Packard Company | Delta-sigma pulse width modulator control circuit |
JP3346223B2 (en) | 1997-06-10 | 2002-11-18 | 株式会社日立製作所 | Motor control method and motor control system |
US6023417A (en) * | 1998-02-20 | 2000-02-08 | Allen-Bradley Company, Llc | Generalized discontinuous pulse width modulator |
US5905644A (en) * | 1998-07-31 | 1999-05-18 | Allen-Bradley Company, Llc | DC bus voltage controller |
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US20060192522A1 (en) * | 2005-02-28 | 2006-08-31 | Rockwell Automation Technologies, Inc. | Modulation methods and apparatus for reducing common mode voltages |
US7164254B2 (en) * | 2005-02-28 | 2007-01-16 | Rockwell Automation Technologies, Inc. | Modulation methods and apparatus for reducing common mode voltages |
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