JPH08205543A - Apparatus for parallel inverter operation - Google Patents

Apparatus for parallel inverter operation

Info

Publication number
JPH08205543A
JPH08205543A JP7011645A JP1164595A JPH08205543A JP H08205543 A JPH08205543 A JP H08205543A JP 7011645 A JP7011645 A JP 7011645A JP 1164595 A JP1164595 A JP 1164595A JP H08205543 A JPH08205543 A JP H08205543A
Authority
JP
Japan
Prior art keywords
zero
inverter
signal
parallel operation
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7011645A
Other languages
Japanese (ja)
Inventor
Yoshinori Ishimoto
孔律 石本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yuasa Corp
Original Assignee
Yuasa Corp
Yuasa Battery Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yuasa Corp, Yuasa Battery Corp filed Critical Yuasa Corp
Priority to JP7011645A priority Critical patent/JPH08205543A/en
Publication of JPH08205543A publication Critical patent/JPH08205543A/en
Pending legal-status Critical Current

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  • Supply And Distribution Of Alternating Current (AREA)
  • Inverter Devices (AREA)

Abstract

PURPOSE: To eliminate the phase difference when a parallel operation is started by establishing the voltage waveform of an inverter according to a waveform correction signal, correcting a reference pulse from a PLL circuit according to the signal, and operating the inverters in parallel. CONSTITUTION: A zero-crossing detector 15 for forming a zero-crossing signal of a sine wave formed by a sine wave generator 12 is provided in the control circuit 10 of an inverter 1, and a zero-crossing detector 25 for forming a zero- crossing signal of a sine wave formed by a sine wave generator 22 is provided in the control circuit 20 of an inverter 2. The zero-crossing signals are input to a phase corrector 40 in a parallel operation control board 4 to form a phase correction signal, which is input to PLL circuits 11, 21 in the circuits 10, 20 to correct the reference pulses. Accordingly, the phase difference when the parallel operation is started can be eliminated, and a cross current or the distortion of the voltage waveform of the inverter can be prevented.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はインバータの並列運転装
置に関するもので、さらに詳しく言えば、並列運転開始
時に各インバータ間の位相差を補正する機能を設けたイ
ンバータの並列運転装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter parallel operation system, and more particularly to an inverter parallel operation system provided with a function of correcting a phase difference between the inverters at the start of parallel operation. .

【0002】[0002]

【従来の技術】近年、(並列数−1)台分の容量の負荷
に電力を供給しながら1台の点検や修理を行うことがで
きる並列冗長方式によるインバータの並列運転が普及
し、種々の並列運転装置が知られている。
2. Description of the Related Art In recent years, parallel operation of inverters by a parallel redundancy system has become widespread, in which one unit can be inspected or repaired while supplying electric power to a load having a capacity of (parallel number-1) units. Parallel operating devices are known.

【0003】上記した並列冗長方式によってインバータ
を並列運転する場合には、各インバータ間の出力電圧
差、周波数偏差、位相差、極性の差異をなくし、各イン
バータ間に横流が流れないようにしている。
When the inverters are operated in parallel by the parallel redundancy method described above, the output voltage difference, frequency deviation, phase difference, and polarity difference between the inverters are eliminated to prevent a cross current from flowing between the inverters. .

【0004】また、上記した並列冗長方式によって並列
運転されるインバータは、過負荷時や事故時に無瞬断で
商用電源への切り替えが行えるようにし、その信頼性を
高めるようにしている。
Further, the above-mentioned inverters which are operated in parallel by the parallel redundancy system are designed so that they can be switched to a commercial power source without interruption in the event of overload or an accident, and their reliability is improved.

【0005】上記した条件を満足させるためには、各イ
ンバータを同期運転させる必要があり、各インバータ出
力と商用電源とを同期させる必要がある。
In order to satisfy the above conditions, it is necessary to operate each inverter synchronously, and it is necessary to synchronize the output of each inverter and the commercial power source.

【0006】上記したインバータの並列運転装置の従来
例としては、図2に示した如く、インバータ1の制御回
路10およびインバータ2の制御回路20内に設けた、
同期元信号に対応した基準パルスを作成するPLL回路
11,21、この基準パルスに対応した正弦波を作成す
る正弦波発生回路12,22、この正弦波に基づいてイ
ンバータの電圧波形歪を補正する波形補正信号を作成す
る波形補正回路13,23によって各インバータの同期
運転が確立されてから並列運転を開始するようにしたも
のである。
As a conventional example of the above-mentioned inverter parallel operation apparatus, as shown in FIG. 2, the inverter is provided in the control circuit 10 of the inverter 1 and the control circuit 20 of the inverter 2.
PLL circuits 11 and 21 that generate a reference pulse corresponding to the synchronization source signal, sine wave generation circuits 12 and 22 that generate a sine wave corresponding to the reference pulse, and correct the voltage waveform distortion of the inverter based on the sine wave. The parallel operation is started after the synchronous operation of each inverter is established by the waveform correction circuits 13 and 23 that create the waveform correction signal.

【0007】なお、前記同期元信号としては、商用電源
3からの商用ゼロクロス信号または制御回路10,20
内の基準発振器14,24からの基準ゼロクロス信号の
いずれか一方が送出されるように構成され、商用電源3
の停電による商用ゼロクロス信号の喪失時に前記基準発
振器14,24からの基準ゼロクロス信号が同期元信号
として送出される機能を有している。
As the synchronization source signal, a commercial zero-cross signal from the commercial power source 3 or the control circuits 10 and 20 is used.
One of the reference zero-cross signals from the reference oscillators 14 and 24 in the internal power source 3 is transmitted.
The reference zero-cross signal from the reference oscillators 14 and 24 is transmitted as a synchronization source signal when the commercial zero-cross signal is lost due to the power failure.

【0008】[0008]

【発明が解決しようとする課題】上記した従来のインバ
ータの並列運転装置では、商用電源3の定常的な周波数
変動のため、同期元信号としての商用ゼロクロス信号に
よって各インバータの同期運転が確立されてから並列運
転が開始されるまでの間に位相差が生じることがあり、
それによって横流が流れたり、インバータの電圧波形に
歪が生じるという問題があった。
In the above-mentioned conventional inverter parallel operation system, the synchronous operation of each inverter is established by the commercial zero-cross signal as the synchronization source signal because of the steady frequency fluctuation of the commercial power supply 3. Phase difference may occur between the start of parallel operation and
As a result, there is a problem that a cross current flows and the voltage waveform of the inverter is distorted.

【0009】[0009]

【課題を解決するための手段】上記課題を解決するた
め、本発明は、制御回路を有する複数台のインバータ
と、これらのインバータの並列運転を制御するための並
列運転制御盤とからなるインバータの並列運転装置にお
いて、前記制御回路は同期元信号に対応した基準パルス
を作成するPLL回路と、この基準パルスに対応した正
弦波を作成する正弦波発生回路と、この正弦波に基づい
てインバータの電圧波形歪を補正する波形補正信号を作
成する波形補正回路と、前記正弦波のゼロクロス信号を
作成するゼロクロス検出回路とを有し、前記並列運転制
御盤は並列運転開始前に一つのインバータの制御回路内
のゼロクロス検出回路からのゼロクロス信号の位相と他
のインバータの制御回路内のゼロクロス検出回路からの
ゼロクロス信号の位相とを一致させるような位相補正信
号を送出し、並列運転開始後は前記位相補正信号を停止
する機能を備えた位相補正回路を有し、前記波形補正信
号によってインバータの電圧波形を確立させるととも
に、前記位相補正信号によって前記PLL回路からの基
準パルスを補正してインバータの並列運転を行うように
したことを特徴とするものである。
In order to solve the above problems, the present invention relates to an inverter comprising a plurality of inverters having a control circuit and a parallel operation control panel for controlling parallel operation of these inverters. In the parallel operation device, the control circuit includes a PLL circuit that creates a reference pulse corresponding to the synchronization source signal, a sine wave generation circuit that creates a sine wave corresponding to the reference pulse, and a voltage of an inverter based on the sine wave. A waveform correction circuit that creates a waveform correction signal that corrects waveform distortion, and a zero-cross detection circuit that creates the zero-cross signal of the sine wave are provided, and the parallel operation control panel is a control circuit for one inverter before the start of parallel operation. Phase of the zero-cross signal from the zero-cross detection circuit in the inverter and the phase of the zero-cross signal from the zero-cross detection circuit in the control circuit of the other inverter A phase correction circuit that has a function of sending the phase correction signal that causes the phase correction signal to stop after the parallel operation is started, and establishes the voltage waveform of the inverter by the waveform correction signal. The reference pulse from the PLL circuit is corrected by the phase correction signal so that the inverters are operated in parallel.

【0010】[0010]

【作用】本発明によれば、一つのインバータの制御回路
内のゼロクロス検出回路によって作成した同期元信号に
対応した正弦波のゼロクロス信号と他のインバータの制
御回路内のゼロクロス検出回路によって作成した同期元
信号に対応した正弦波のゼロクロス信号とを位相補正回
路に送出し、この位相補正回路によって作成した位相補
正信号によってPLL回路からの基準パルスを補正して
いるから、並列運転が開始される時の位相差をなくすこ
とができ、それによって流れる横流やそれによって生じ
るインバータの電圧波形の歪を防止することができる。
According to the present invention, the sine wave zero-cross signal corresponding to the synchronization source signal created by the zero-cross detection circuit in the control circuit of one inverter and the synchronization created by the zero-cross detection circuit in the control circuit of another inverter. When the parallel operation is started, the sine wave zero-cross signal corresponding to the original signal is sent to the phase correction circuit, and the reference pulse from the PLL circuit is corrected by the phase correction signal created by this phase correction circuit. It is possible to eliminate the phase difference between the two, and it is possible to prevent the cross current flowing therethrough and the resulting distortion of the voltage waveform of the inverter.

【0011】[0011]

【実施例】以下、本発明を実施例によって説明する。EXAMPLES The present invention will be described below with reference to examples.

【0012】図1は本発明のインバータの並列運転装置
のブロック図で、図2と同じ機能を有する部分には同じ
符号を付して以下の説明を省略する。
FIG. 1 is a block diagram of a parallel operating apparatus for inverters according to the present invention. The parts having the same functions as those in FIG.

【0013】本発明の特徴は、インバータ1の制御回路
10内に正弦波発生回路12によって作成された正弦波
のゼロクロス信号を作成するゼロクロス検出回路15を
設けるとともに、インバータ2の制御回路20内に正弦
波発生回路22によって作成された正弦波のゼロクロス
信号を作成するゼロクロス検出回路25を設け、各ゼロ
クロス信号を並列運転制御盤4内の位相補正回路40に
入力して位相補正信号を作成し、この位相補正信号を制
御回路10,20内のPLL回路11,21に入力して
PLL回路11,21から送出される基準パルスを補正
するようにしたものである。
A feature of the present invention is that the control circuit 10 of the inverter 1 is provided with the zero-cross detection circuit 15 for producing the zero-cross signal of the sine wave produced by the sine-wave generation circuit 12, and the control circuit 20 of the inverter 2 is provided. A zero-cross detection circuit 25 that creates a sine-wave zero-cross signal created by the sine-wave generation circuit 22 is provided, and each zero-cross signal is input to the phase correction circuit 40 in the parallel operation control panel 4 to create a phase correction signal, This phase correction signal is input to the PLL circuits 11 and 21 in the control circuits 10 and 20 to correct the reference pulse sent from the PLL circuits 11 and 21.

【0014】前記並列運転制御盤4は、インバータ1,
2の並列運転開始前に上記した動作によって位相補正回
路40から位相補正信号を送出し、この位相補正信号に
よってPLL回路11,21から送出される基準パルス
を補正し、この基準パルスに対応した正弦波を作成し、
この正弦波に基づいてインバータの電圧波形歪を補正す
る波形補正信号を作成し、この波形補正信号によってイ
ンバータの電圧波形を確立させ、インバータ1,2の並
列運転開始後に前記位相補正信号の送出を停止する動作
をする。
The parallel operation control panel 4 includes inverters 1,
Before the parallel operation of No. 2 is started, a phase correction signal is sent from the phase correction circuit 40 by the above-described operation, the reference pulse sent from the PLL circuits 11 and 21 is corrected by this phase correction signal, and the sine corresponding to this reference pulse is corrected. Create waves,
A waveform correction signal for correcting the voltage waveform distortion of the inverter is created based on this sine wave, the voltage waveform of the inverter is established by this waveform correction signal, and the phase correction signal is transmitted after the parallel operation of the inverters 1 and 2 is started. Operates to stop.

【0015】なお、前記ゼロクロス検出回路15,25
によって作成された正弦波のゼロクロス信号は絶縁形信
号伝達回路16,26を介して位相補正回路40に入力
されるように構成され、この位相補正回路40から送出
される位相補正信号は絶縁形信号伝達回路17,27を
介してPLL回路11,21に入力されるように構成さ
れている。
The zero-cross detection circuits 15 and 25 are
The sine wave zero-cross signal generated by the above is configured to be input to the phase correction circuit 40 via the isolated signal transmission circuits 16 and 26, and the phase correction signal sent from the phase correction circuit 40 is an isolated signal. It is configured to be input to the PLL circuits 11 and 21 via the transmission circuits 17 and 27.

【0016】また、本発明では、商用電源3の停電時や
商用電源3の周波数精度が低い場合には制御回路10,
20内の基準発振器14,24からの基準ゼロクロス信
号を同期元信号として用いるようにしているが、基準発
振器14からの基準ゼロクロス信号と基準発振器24か
らの基準ゼロクロス信号との間に微小な位相差があって
も位相補正回路40によって補正することができるの
で、インバータの並列運転を安定に行うことができる。
Further, according to the present invention, the control circuit 10, when the commercial power source 3 has a power failure or when the frequency accuracy of the commercial power source 3 is low,
Although the reference zero-cross signals from the reference oscillators 14 and 24 in 20 are used as the synchronization source signals, the phase difference between the reference zero-cross signal from the reference oscillator 14 and the reference zero-cross signal from the reference oscillator 24 is small. Even if there is, it can be corrected by the phase correction circuit 40, so that the parallel operation of the inverters can be stably performed.

【0017】[0017]

【発明の効果】上記したとおりであるから、本発明のイ
ンバータの並列運転装置は、各インバータの並列運転を
安定に行うことができるだけでなく、並列運転の開始時
に横流が流れたり、インバータの電圧波形に歪が生じた
りするという問題を解消することができる。
As described above, the inverter parallel operation apparatus of the present invention can not only stably perform the parallel operation of each inverter, but also cause a cross current at the start of the parallel operation or the inverter voltage. The problem that the waveform is distorted can be solved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明のインバータの並列運転装置のブロック
図である。
FIG. 1 is a block diagram of an inverter parallel operation device of the present invention.

【図2】従来のインバータの並列運転装置のブロック図
である。
FIG. 2 is a block diagram of a conventional inverter parallel operation device.

【符号の説明】[Explanation of symbols]

1,2 インバータ 10,20 制御回路 11,21 PLL回路 12,22 正弦波発生回路 13,23 波形補正回路 14,24 基準発振器 15,25 ゼロクロス検出回路 4 並列運転制御盤 40 位相補正回路 1, 2 Inverter 10, 20 Control circuit 11, 21 PLL circuit 12, 22 Sine wave generation circuit 13, 23 Waveform correction circuit 14, 24 Reference oscillator 15, 25 Zero cross detection circuit 4 Parallel operation control panel 40 Phase correction circuit

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 制御回路を有する複数台のインバータ
と、これらのインバータの並列運転を制御するための並
列運転制御盤とからなるインバータの並列運転装置にお
いて、前記制御回路は同期元信号に対応した基準パルス
を作成するPLL回路と、この基準パルスに対応した正
弦波を作成する正弦波発生回路と、この正弦波に基づい
てインバータの電圧波形歪を補正する波形補正信号を作
成する波形補正回路と、前記正弦波のゼロクロス信号を
作成するゼロクロス検出回路とを有し、前記並列運転制
御盤は並列運転開始前に一つのインバータの制御回路内
のゼロクロス検出回路からのゼロクロス信号の位相と他
のインバータの制御回路内のゼロクロス検出回路からの
ゼロクロス信号の位相とを一致させるような位相補正信
号を送出し、並列運転開始後は前記位相補正信号を停止
する機能を備えた位相補正回路を有し、前記波形補正信
号によってインバータの電圧波形を確立させるととも
に、前記位相補正信号によって前記PLL回路からの基
準パルスを補正してインバータの並列運転を行うように
したことを特徴とするインバータの並列運転装置。
1. In an inverter parallel operation apparatus comprising a plurality of inverters having a control circuit and a parallel operation control panel for controlling parallel operation of these inverters, the control circuit corresponds to a synchronization source signal. A PLL circuit that creates a reference pulse, a sine wave generation circuit that creates a sine wave corresponding to this reference pulse, and a waveform correction circuit that creates a waveform correction signal that corrects the voltage waveform distortion of the inverter based on this sine wave. , A zero-crossing detection circuit for creating the zero-crossing signal of the sine wave, the parallel operation control panel is the phase of the zero-crossing signal from the zero-crossing detection circuit in the control circuit of one inverter and the other inverter before the start of parallel operation. The phase correction signal that matches the phase of the zero-cross signal from the zero-cross detection circuit in the control circuit of After the start, it has a phase correction circuit having a function of stopping the phase correction signal, establishes the voltage waveform of the inverter by the waveform correction signal, and corrects the reference pulse from the PLL circuit by the phase correction signal. A parallel operation device for inverters, characterized in that the inverters are operated in parallel.
JP7011645A 1995-01-27 1995-01-27 Apparatus for parallel inverter operation Pending JPH08205543A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7011645A JPH08205543A (en) 1995-01-27 1995-01-27 Apparatus for parallel inverter operation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7011645A JPH08205543A (en) 1995-01-27 1995-01-27 Apparatus for parallel inverter operation

Publications (1)

Publication Number Publication Date
JPH08205543A true JPH08205543A (en) 1996-08-09

Family

ID=11783696

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7011645A Pending JPH08205543A (en) 1995-01-27 1995-01-27 Apparatus for parallel inverter operation

Country Status (1)

Country Link
JP (1) JPH08205543A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001103763A (en) * 1999-09-30 2001-04-13 Kokusan Denki Co Ltd Engine driven inverter generator
US6281664B1 (en) 1999-01-13 2001-08-28 Honda Giken Kogyo Kabushiki Kaisha Generator and generator apparatus
JP2006174530A (en) * 2004-12-13 2006-06-29 Nissan Motor Co Ltd Pwm driving circuit and method
JP2006311734A (en) * 2005-04-28 2006-11-09 Origin Electric Co Ltd Operating method of power supply device and power supply device
US7602627B2 (en) 2005-04-28 2009-10-13 Origin Electric Company, Limited. Electrical power source, operational method of the same, inverter and operational method of the same
US8039992B2 (en) 2008-10-09 2011-10-18 Honda Motor Co., Ltd. Series connection apparatus for generators
JP2015100009A (en) * 2013-11-19 2015-05-28 株式会社東芝 Phase estimation device, signal generation device, synchronization system and signal processing device
JP2017123781A (en) * 2012-01-17 2017-07-13 インフィネオン テクノロジーズ オーストリア アクチエンゲゼルシャフト Power converter circuit and power supply system

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6281664B1 (en) 1999-01-13 2001-08-28 Honda Giken Kogyo Kabushiki Kaisha Generator and generator apparatus
JP2001103763A (en) * 1999-09-30 2001-04-13 Kokusan Denki Co Ltd Engine driven inverter generator
JP2006174530A (en) * 2004-12-13 2006-06-29 Nissan Motor Co Ltd Pwm driving circuit and method
JP2006311734A (en) * 2005-04-28 2006-11-09 Origin Electric Co Ltd Operating method of power supply device and power supply device
US7602627B2 (en) 2005-04-28 2009-10-13 Origin Electric Company, Limited. Electrical power source, operational method of the same, inverter and operational method of the same
US7889527B2 (en) 2005-04-28 2011-02-15 Origin Electric Company, Limited Electrical power source, operational method of the same, inverter and operational method of the same
US8039992B2 (en) 2008-10-09 2011-10-18 Honda Motor Co., Ltd. Series connection apparatus for generators
JP2017123781A (en) * 2012-01-17 2017-07-13 インフィネオン テクノロジーズ オーストリア アクチエンゲゼルシャフト Power converter circuit and power supply system
JP2015100009A (en) * 2013-11-19 2015-05-28 株式会社東芝 Phase estimation device, signal generation device, synchronization system and signal processing device

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