JPH0818454A - Analog/digital converter - Google Patents

Abstract

PURPOSE:To perform the analog/digital conversion of plural analog signals without lowering the conversion frequency of the respective analog signals by providing plural analog/digital conversion circuits. CONSTITUTION:This converter is provided with the plural analog/digital conversion circuits 10 and 50 for digital-converting the analog signals selected among the plural analog signals and a set of analog/digital conversion registers 52-55 for storing digital data digital-converted in the circuits 10 and 50. The selection of the analog signals, the storage of the digital data to the specified analog/ digital conversion registers and the start of digital conversion are controlled by plural control circuits 11 and 20 for the respective analog/digital conversion circuits 10 and 50.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog / digital converter for converting an analog voltage into a digital value with respect to a reference voltage.

[0002]

2. Description of the Related Art FIG. 6 shows a conventional analog / digital converter, in which AN0-AN3 are analog input terminals for analog signal input, SW00-SW03 are analog input terminals AN0-AN3 and an analog-digital converter circuit. Switch circuit for connecting the
On the other hand, the analog / digital conversion circuit converts an analog signal input from the analog input terminals AN0 to AN3 selected by the switch circuits SW00 to SW03 into a digital value.

Reference numerals 52 to 55 are analog input terminals AN.
An analog / digital conversion register for storing digital data which is each analog / digital conversion result of 0 to AN3, 20 generates a control signal for selecting an analog input signal and a conversion start signal 56a for operating the analog / digital conversion circuit 50 The control circuit 56b is an analog / digital conversion end signal generated when the analog / digital conversion circuit 50 completes the analog / digital conversion.

Further, S00 to S04 are control circuits 2 described above.
0, and the switch circuits SW00 to SW03
One control signal for controlling ON and OFF of each of the control signals 57, and 57 for the control circuit 20 and the analog / digital conversion register 52 to
55 is the bus to which it is connected. An analog / digital converter is configured by the above components.

FIG. 7 is a block diagram showing the internal structure of the control circuit 20. Reference numeral 60 is a 1-bit analog / digital conversion operation selection register, 61 is a 2-bit analog input terminal selection register, and 62 is a 2-bit analog input. A decoding circuit for decoding the contents of the terminal selection register 61.

Reference numerals 63 to 66 denote tristate buffers which output the contents of the decoding circuit 62 as control signals S00 to S03 when the contents of the analog / digital conversion operation selection register 60 are "1".

Further, 71 is 4 according to the contents of the decoding circuit 62 and the analog / digital conversion end signal 56b.
Shift register circuits that generate two outputs, 67 to 70 are tristate buffers that output the output signals of the shift register circuit 71 as control signals S00 to S03 when the content of the analog / digital conversion operation selection register 60 is "0", Reference numeral 72 is an analog / digital conversion start flag for starting the operation of the analog-digital conversion circuit 50.

Next, the operation will be described. First, the control circuit 20 controls selection of the analog input terminal of the analog / digital conversion device, start of analog / digital conversion, etc., and sets “1” to the analog / digital conversion operation selection register 60 of the control circuit 20 from the bus 57. To do.

As a result, the tri-state buffer 63
To 66 operate to output signals obtained by decoding the contents of the analog input terminal selection register 61 by the decoding circuit 62 as control signals S00 to S03.

That is, if the content set in the analog input terminal selection register 61 from the bus 57 is "00h", the control signal S00 is "1", the control signals S01 to S03 are "0", and the analog input terminal selection register 61 is set. If the content is "01h", S00 is "0", control signal S0
1 becomes "1", and the control signals S02 and S03 become "0".

Further, the analog input terminal selection register 61
If the content set in is 10h, the control signals S00, S
01 is "0", control signal S02 is "1", control signal S0
If 3 is "0" and the content set in the analog input terminal selection register 61 is "11h", the control signals S00 to S02 are set to "0" and the control signal S03 is set to "1".

That is, according to the contents set in the analog input terminal selection register 61, the switch circuits SW00 to SW00
One of the SW03 is turned on, and one of the analog input terminals is connected to the analog / digital conversion circuit 50. Next, by setting the analog / digital conversion start flag 72, the conversion start signal 56a is output and the analog / digital conversion circuit 50 starts its operation.

Therefore, the analog / digital conversion circuit 50 digitally converts the selected analog input signal corresponding to the reference voltage 51, and the analog / digital conversion registers 52 to 5 corresponding to the selected analog input signal.
The conversion result is stored in any one of 5.

When the analog / digital conversion is completed, the analog / digital conversion circuit 50 generates an analog / digital conversion end signal 56b for notifying the control circuit 20 that the analog / digital conversion is completed, and then the next signal. Repeat the analog / digital conversion of the analog input terminal selected for.

On the other hand, when "0" is set in the analog / digital conversion operation selection register 60 of the control circuit 20 from the bus 57, the tri-state buffers 67 to 70 operate and the contents of the analog input terminal selection register 61 are decoded. The signal decoded in 62 is output as the control signals S00 to S03 via the shift register circuit 71.

FIG. 8 shows signals of various parts of the circuit showing this state. If the content set in the analog input terminal selection register 61 from the bus 57 is "00h", the control signal S00 is "1" and the control signals S01 to S03. Is initialized to "0", the shift register circuit 71 operates every time the analog / digital conversion end signal 56b is generated, and the control signal S0
0 and S01 repeat "1" alternately.

If the content set in the analog input terminal selection register 61 from the bus 57 is "01h", the control signal S02 is "1" and the control signals S00, S01, S03.
Is initially set to "0", the shift register circuit 71 operates every time the analog / digital conversion end signal 56b is generated, and the control signals S02 and S03 alternately repeat "1".

Further, if the content set in the analog input terminal selection register 61 from the bus 57 is "10h", the control signal S00 is initialized to "1" and the control signals S01 to S03 are initialized to "0", and the analog / digital The shift register circuit 71 operates each time the conversion end signal 56b is generated, and the control signals S00, S01, and S02 repeat "1" in order.

If the content set in the analog input terminal selection register 61 from the bus 57 is "11h", the control signal S00 is "1" and the control signals S01, S02, S03.
Is initialized to "0", the shift register circuit 71 operates every time the analog / digital conversion end signal 56b is generated, and the control signals S00, S01, S02, S03 repeat "1" in order.

That is, according to the contents set in the analog input terminal selection register 61, the control signals S00 to S03
Occurs, one of the switch circuits SW00 to SW03 is turned on, and the analog input terminals AN0 to AN3 are connected to the analog / digital conversion circuit 50.

Next, by setting the analog / digital conversion start flag 72, the analog / digital conversion circuit 50 starts its operation in response to the conversion start signal 56a.
The voltage of the selected analog input terminal with respect to the reference voltage 51 is digitally converted, and the conversion result is stored in the analog / digital conversion register corresponding to the selected analog input terminal.

When the analog / digital conversion is completed in this way, the analog / digital conversion circuit 50 generates an analog / digital conversion end signal 56b for notifying the outside of the analog / digital conversion device that the analog / digital conversion is completed. Thus, the analog / digital conversion of the next selected analog input terminal is repeated.

[0023]

Since the conventional analog / digital conversion device is constructed as described above, when a plurality of analog input terminals are selected, one analog / digital conversion circuit 50 outputs a plurality of analog inputs. Terminal A
Since analog signals from N0 to AN3 are switched at each analog / digital conversion and analog / digital conversion is performed, (time required for one analog / digital conversion) x (number of selected analog input terminals) every time Since analog / digital conversion is repeated, it is impossible to always select a specific analog input terminal for analog / digital conversion.

In applying the analog / digital converter, it is sometimes desired to increase the conversion frequency of only a specific analog signal among a plurality of analog signals. For example, in controlling an automobile engine, the access pedal is depressed. For sensors, knocking sensors that detect abnormal combustion of the engine, and sensors that monitor the temperature of the engine, always perform analog / digital conversion of the sensor output that requires stepping on the access pedal as fast as possible. In order to detect abnormal combustion, the output with or without knocking is converted from analog to digital, while the output of the engine temperature is occasionally monitored. In this case, a specific analog signal such as a signal for detecting the depression of the access pedal is used. Signal is always analog / digital There is a problem such as not being able to conversion.

The present invention has been made in order to solve the above-mentioned problems. Even if the number of analog input terminals increases, a plurality of analog / digital conversion circuits are provided so that the conversion frequency of each analog signal can be improved. You can perform analog / digital conversion of multiple analog signals without dropping,
An object of the present invention is to obtain an analog / digital conversion device capable of simultaneously performing analog / digital conversion on a plurality of analog signals.

By providing an analog / digital conversion register for each analog / digital conversion circuit,
A plurality of analog / digital conversion circuits that simultaneously perform analog / digital conversion of the same analog signal can be held separately in each analog / digital conversion register, and as a result, the reliability of the conversion result can be improved. The purpose is to obtain an analog / digital converter.

Another object of the present invention is to obtain an analog / digital conversion device which can apparently increase the analog / digital conversion speed by giving a time difference to the analog / digital conversion by each analog / digital conversion circuit.

[0028]

SUMMARY OF THE INVENTION An analog / digital converter according to the present invention includes a plurality of analog / digital conversion circuits for digitally converting selected analog signals from a plurality of analog signals from a plurality of analog input terminals. , A set of analog / digital conversion registers common to each of the analog / digital conversion circuits, which stores digital data digitally converted by each of the analog / digital conversion circuits. The analog signal is selected, the digital data is stored in the specific analog / digital conversion register, and the digital conversion is started.
The control is performed for each digital conversion circuit.

Further, the analog / digital conversion apparatus according to the present invention comprises a plurality of sets of analog / digital conversion registers provided for each analog / digital conversion circuit for storing digital data obtained by analog / digital converting an analog signal. And controlling a plurality of control circuits to select the analog signal, store the digital data in a specific analog / digital conversion register, and start digital conversion for each analog / digital conversion circuit. Is.

Further, the analog / digital conversion device according to the present invention comprises a delay circuit for providing a time difference between the start timings of analog / digital conversion of the same analog signal by a plurality of analog / digital conversion circuits.

[0031]

The analog / digital converter according to the present invention converts the analog signal from the analog input terminal selected by each of the plurality of control circuits for each corresponding analog / digital converter into digital data, and converts each conversion result into digital data. By storing them in the analog / digital conversion registers respectively corresponding to, the analog / digital conversion of a plurality of analog signals can be performed without reducing the conversion frequency of the above signals.

The analog / digital converter according to the present invention holds an analog / digital converter which holds each digital data converted by each analog / digital converter.
By providing the digital conversion register, the reliability of the analog / digital converted digital data can be improved by calculating the average value of the digital data of the same analog signal.

Further, in the analog / digital conversion device according to the present invention, the apparent analog / digital conversion speed can be obtained when the same analog signal is selected by giving a time difference to the analog / digital conversion operation of the analog signal. Be able to raise.

[0034]

【Example】

Example 1. An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, 50 and 10 are analog / digital conversion circuits, and these are a plurality of analog input terminals A.
Of the plurality of analog signals from N0 to AN3, the switch circuits SW00 to SW03 and the switch circuit SW10
The analog signal selected by turning on any of the switches SW13 to SW13 is converted into a digital signal.

Reference numerals 20 and 11 denote selection of the analog signal, storage of the digitally converted digital data in specific analog / digital conversion registers 52 to 55, and start of the digital conversion by the analog / digital conversion circuits 50. , A plurality of control circuits (two in this embodiment) for controlling each of the control circuits. Reference numeral 58 is an analog / digital conversion end signal output from the analog / digital conversion circuit 10. The analog / digital conversion circuit 10 and the control circuit 11 have the same configuration and operation as the analog / digital conversion circuit 50 and the control circuit 20 described with reference to FIGS. 6 and 7, respectively.

Further, S10 to S13 are control signals outputted from the control circuit 11 for controlling on / off of the switch circuits SW10 to SW13, and the other components same as those shown in FIG. 6 are the same. The reference numerals are given and the duplicated explanation is omitted.

Next, the operation will be described. First, the control circuit 20 and the control circuit 11 cause the analog / digital conversion circuits 50 and 10 to select the analog / digital conversion operation and the analog input terminals AN0 to AN3, respectively. For example, the content of the analog / digital conversion operation selection register 60 as shown in FIG. 7 is set to “0”, and the analog / digital conversion circuit 5 as shown in FIG.
0 is set to repeat conversion of analog signals from the analog input terminals AN0 to AN3, and the analog / digital converter 1
When 0, the analog signals of the analog input terminals AN2 and AN3 are repeatedly converted.

Then, by setting the analog / digital conversion start flag 72, the conversion start signal 56a becomes "1", and the analog signal inputted to the analog input terminals AN0-AN2 in the analog / digital conversion circuit 50 is converted into the analog signal. Performs analog / digital conversion. Then, the conversion result is stored in the analog / digital conversion registers 52 to 55 corresponding to the analog input terminals AN0 to AN3.

Further, the analog / digital conversion circuit 10
Analog-to-digital conversion of the analog input terminals AN2, AN3 is performed with, and the conversion result is the analog input terminal AN2,
Analog / digital conversion register 5 corresponding to AN3
It is stored in 4, 55. In FIG. 4, the contents of the analog / digital conversion operation selection register 60 are "0", and the contents of the analog input terminal selection register 61 of the control circuits 20 and 11 are "10h" and "01h", respectively.
The state of each control signal S00-S03, S10-S13 in the case of is shown.

In this way, when a plurality of analog input terminals AN0 to AN3 are selected because one analog / digital conversion circuit switches a plurality of analog input terminals at each completion of analog / digital conversion to perform analog / digital conversion. , (Conversion time required for one analog / digital conversion) × (number of selected analog input terminals AN0 to AN3) is set as one cycle, and the analog / digital conversion is repeated, so that a plurality of analog input terminals AN0 to AN3. If is selected, the frequency of performing analog / digital conversion when analog / digital conversion of only an analog signal of a specific analog input terminal is attempted is reduced.

However, according to the present invention, even if the number of analog input terminals is increased, by having a plurality of (here, two) analog / digital conversion circuits 50 and 10,
A plurality of analog signals can be converted from analog to digital without reducing the conversion frequency of each analog input terminal AN0 to AN3. In addition, analog signals from a plurality of analog input terminals can be simultaneously analog / digital converted.

Example 2. FIG. 2 shows another embodiment of the present invention. Since the analog / digital conversion operation of this embodiment is the same as that described in the first embodiment, the duplicated description will be omitted here. In this embodiment, two analog / digital conversion circuits 50, 10 and two sets of analog / digital conversion result registers 52-55, 12-15 are provided for the four analog input terminals AN0-AN3.
Is provided.

Therefore, in this embodiment, the individual analog /
Operation of digital conversion circuits 50 and 10 and control signal S
The analog signal conversion operation based on 00 to S03 and S10 to S13 is the same as that of the first embodiment, but the analog / digital conversion registers 52 to 55 and 12 to 15 corresponding to the analog input terminals AN0 to AN3 are converted from analog to digital. Since each of the circuits 50 and 10 has one, even when the analog signals of the same analog input terminal are simultaneously analog-to-digital converted by the two analog-to-digital conversion circuits 50 and 10, the conversion result is converted into each analog-to-digital conversion register. 52-55, 12-15.

As described above, in this embodiment, the same operation as that of the first embodiment is performed, and the results can be held in the analog / digital conversion registers 52 to 55 and 12 to 15 for each of the analog / digital converters 50 and 10. By doing so, the reliability of the analog / digital conversion result can be improved. For example, it is effective when analog / digital conversion of the same analog input terminal is performed and the average value of the obtained conversion results is calculated. is there.

Example 3. FIG. 3 shows still another embodiment of the present invention, and FIG. 5 shows a timing chart of signals of respective blocks of a typical analog / digital converter according to this embodiment. The basic operation of the analog / digital conversion of this embodiment is the same as that described in the first and second embodiments.

In this embodiment, two analog / digital conversion circuits 50, 10 and two sets of analog / digital conversion registers 52-55, 12-15 are provided for the four analog input terminals AN0-AN3. A delay circuit 17 is provided between the control circuit 20 and the analog / digital conversion circuit 10 to provide a time difference between the start of analog / digital conversion between the analog / digital conversion circuit 50 and the analog / digital conversion circuit 10.

Therefore, the operation and control signals 00 to S03, S of the individual analog / digital conversion circuits 50, 10 are controlled.
The operation of selecting an analog signal by 10 to S13 is the same as that in the first embodiment described above, but the analog input terminals AN0 to AN are used.
3 corresponding to the analog / digital conversion register 52 to
55, 12 to 15 are analog / digital conversion circuits 5
0 and 10 are provided, and analog / digital conversion by these two analog / digital conversion circuits 50 and 10 is started with a time difference.

For example, the content of the analog / digital conversion operation selection register 60 as shown in FIG. 7 is set to "1", and the analog / digital conversion circuit 50 sets the repeated conversion of the analog signal of the analog input terminal AN0. In the analog / digital conversion circuit 10, the analog input terminal A
By setting the repeated conversion of the analog signal of N0 and further setting the analog / digital conversion start flag 72, the conversion start signal 56a becomes "1" as shown in FIG.
Then, the analog / digital conversion circuit 50 repeatedly performs analog / digital conversion of the analog signal at the analog input terminal AN0, and the conversion result is stored in the analog / digital conversion register 52 corresponding to the analog input terminal AN0.

On the other hand, the delay circuit 17 delays the conversion start signal 56a by the time T and the analog / digital conversion start signal 59 becomes "1", and the analog / digital conversion circuit 10 converts the analog signal from analog / digital. Repeatedly, the conversion result is analog input terminal AN
It is stored in the analog / digital conversion register 12 corresponding to 0.

In FIG. 5, when the content of the analog / digital conversion operation selection register is "1", each analog input terminal selection register 61 of the control circuits 20 and 11 is shown.
Of each control signal S0 when the content of each is "00h"
The states of 0 and S10 are shown. Here, S01, S02, S
03, S11, S12, and S13 are always off.

Therefore, according to this embodiment, in addition to the operation similar to that of the first embodiment, the analog / digital conversion registers 52 to 55 corresponding to the analog input terminals AN0 to AN3 are provided.
12 to 15 are analog / digital conversion circuits 50 and 10
Since the two analog / digital conversions are started with a time difference, the apparent analog / digital conversion speed can be obtained when the same analog input terminal is selected by the two analog / digital conversion circuits 50 and 10. Can be fast

In this embodiment, the description has been given of the one provided with the four analog input terminals AN0 to AN3 and the two analog / digital conversion circuits 50 and 10, but the number of analog input terminals and the number of analog / digital conversion circuits are not limited. The number may be more than that, and the same effect as that of the above-described embodiment can be obtained.

[0053]

As described above, according to the invention of claim 1, a plurality of analog / digital conversion circuits for digitally converting an analog signal selected from a plurality of analog signals from a plurality of analog input terminals, Each analog /
A plurality of control circuits are provided with a set of analog / digital conversion registers common to each of the analog / digital conversion circuits, which stores digital data digitally converted by the digital conversion circuit. Since the storage of the digital data in the specific analog / digital conversion register and the start of the digital conversion are controlled for each of the analog / digital conversion circuits, even if the number of analog input terminals increases, By having a plurality of digital conversion circuits, it is possible to perform analog / digital conversion of a plurality of analog signals without lowering the conversion frequency of each analog signal, and to obtain an effect of simultaneously converting a plurality of analog signals. is there.

According to the invention of claim 2, a plurality of sets of analog / digital conversion registers provided for each analog / digital conversion circuit for storing digital data obtained by analog / digital conversion of an analog signal are provided,
Since a plurality of control circuits are configured to control the selection of the analog signal, the storage of the digital data in the specific analog / digital conversion register, and the start of the digital conversion for each analog / digital conversion circuit, A plurality of the above-mentioned digital-to-digital conversion circuits can simultaneously hold the analog-to-digital conversion of the same analog signal in each analog-to-digital conversion register, and as a result, the reliability of the conversion result can be improved. There is an effect that can be obtained.

According to the third aspect of the invention, since the delay circuit is provided for providing a time difference between the start timings of analog / digital conversion of the same analog signal by the plurality of analog / digital conversion circuits, the analog / digital conversion speed is apparently set. There is an effect that something that can speed up is obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing an analog circuit according to an embodiment of the invention of claim 1;
It is a block diagram which shows a digital converter.

FIG. 2 is an analog circuit according to an embodiment of the invention of claim 2;
It is a block diagram which shows a digital converter.

FIG. 3 is an analog circuit according to an embodiment of the invention of claim 3;
It is a block diagram which shows a digital converter.

FIG. 4 is a timing chart of signals in each part of the circuit of the analog / digital conversion device in FIG.

5 is a timing chart of signals in each circuit portion of the analog / digital conversion device in FIG.

FIG. 6 is a configuration diagram showing a conventional analog / digital conversion device.

7 is a circuit diagram showing a control circuit in FIG.

8 is a timing chart of signals in each circuit portion of the analog / digital conversion device in FIG.

[Explanation of symbols]

AN0 to AN3 analog input terminal, 10,50 analog / digital conversion circuit, 11,20 control circuit, 1
2 to 15, 52 to 55 analog / digital conversion register, 17 delay circuit.

Claims (3)

[Claims] 1. A plurality of analog / digital conversion circuits for digitally converting an analog signal selected from a plurality of analog signals from a plurality of analog input terminals, and digital signals digitally converted by the respective analog / digital conversion circuits. A set of analog / digital conversion registers common to each of the analog / digital conversion circuits for storing data, selection of the analog signal, storage of the digital data in a specific analog / digital conversion register, and digital conversion. An analog / digital conversion device having a plurality of control circuits for controlling the start of each of the above analog / digital conversion circuits. 2. A plurality of analog / digital conversion circuits for converting an analog signal selected from a plurality of analog signals from a plurality of analog input terminals into digital signals, and digital signals digitally converted by the respective analog / digital conversion circuits. A plurality of sets of analog / digital conversion registers provided for each of the analog / digital conversion circuits for storing data, selection of the analog signal, storage of the digital data in the specific analog / digital conversion register, and the above An analog / digital conversion device comprising a plurality of control circuits for controlling the start of digital conversion for each of the analog / digital conversion circuits. 3. A plurality of analog / digital conversion circuits for digitally converting an analog signal selected from a plurality of analog signals from a plurality of analog input terminals, and digital signals digitally converted by the respective analog / digital conversion circuits. A set of analog / digital conversion registers common to each of the analog / digital conversion circuits for storing data, selection of the analog signal, storage of the digital data in a specific analog / digital conversion register, and digital conversion. A plurality of control circuits for controlling the start of each of the analog / digital conversion circuits, and a delay circuit for providing a time difference between the start timings of analog / digital conversion of the same analog signal by the plurality of analog / digital conversion circuits. Analog / Digi Tal converter.