JPH0818342A - Waveform generator with arbitrary parameter sweep function - Google Patents

Abstract

PURPOSE:To stably sweep the frequency, the amplitude, and the offset with a high precision by adding a D/A converter for amplitude sweep and that for offset sweep. CONSTITUTION:The waveform signal which is outputted from a waveform memory 5 and is converted by a D/A converter 6 is outputted through a multiplier 8 and an adder 10. The multiplier 8 multiplies the output of a D/A converter 7 for amplitude sweep by it to change the amplitude of the waveform. The adder 10 adds it to the output of a D/A converter 9 for offset sweep to add the offset to the waveform signal outputted through the multiplier 8. When the frequency of the output waveform is changed, sweep data in a sweep memory 3 is given to an address generator G20 for a memory 5, and fixed values are given to converters 7 and 9. When the amplitude of the output waveform is changed, data in the memory 3 is given to the converter 7, and fixed values are given to the generator G20 and the converter 9. When the offset is changed, data in the memory 3 is given to the converter 9, and fixed values are given to the generator G20 and the converter 7.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a waveform generator, and more particularly to an improvement for easily realizing a sweep of amplitude and offset in addition to frequency sweep.

[0002]

2. Description of the Related Art Conventionally, a function generator is one of the waveform generators. This function generator usually has a function of sweeping the frequency of an output signal, and generally, a voltage / frequency conversion circuit using an analog circuit is used to change the reference voltage to sweep the frequency.

[0003]

However, this type of function generator has a problem that only frequency sweeping is possible and amplitude and offset cannot be swept. Further, since each element of the analog circuit such as the voltage / frequency conversion circuit lacks stability against temperature, it is not possible to perform a highly accurate frequency sweep, and the operating speed is slow and a wide band sweep cannot be performed.

In view of the above points, an object of the present invention is to realize a waveform generator with an arbitrary parameter sweep function which can perform not only frequency sweep but also amplitude or offset sweep stably and with high accuracy. .

[0005]

In order to achieve such an object, according to the present invention, there is provided a first address generator which generates an address signal which changes corresponding to input frequency data in synchronization with a reference clock. Waveform data is stored, and a waveform memory configured to read the waveform data stored at the address when an address is specified from the first address generator, and output data of the waveform memory are converted into analog data. When an address is designated by a DA converter and a means for generating an address signal that stores arbitrary sweep data and changes at a predetermined rate, or an AD converter that digitally converts an external input signal, the sweep stored at the address Sweep memory configured to read data and analog data for amplitude sweep The first of the DA for amplitude sweep to conversion
A converter, a second DA converter for offset sweep that converts the data for offset sweep to analog, and output data of the sweep memory according to the sweep mode for the first address generator or the first DA for amplitude sweep. A first DA converter for sweeping the output of the DA converter and the amplitude sweep, and a sweep controller for supplying one of the converter and the second DA converter for offset sweep, and a fixed value for the other two. It is characterized by comprising a multiplier for multiplying the output of the converter and an adder for adding the output of the multiplier and the output of the second DA converter for offset sweep.

[0006]

The waveform signal outputted from the waveform memory and DA-converted is outputted through the multiplier and the adder. The multiplier changes the amplitude of the waveform by multiplying it with the output of the first DA converter for amplitude sweep. The adder adds the output of the second DA converter for offset sweep and adds an offset to the waveform signal output through the multiplier. When changing the frequency of the output waveform, the sweep data of the sweep memory is given as frequency data to the first address generator for generating an address for the waveform memory. Fixed values are given to the other first and second DA converters. When changing the amplitude of the output waveform, the output data of the sweep memory is supplied to the first DA converter for amplitude sweep. Fixed values are given to the first address generator and the second DA converter. When changing the offset of the output waveform, output the output data of the sweep memory to the second D for offset sweep.
It is given to the A converter. Fixed values are given to the first address generator and the first DA converter.

[0007]

The present invention will be described in detail below with reference to the drawings.
FIG. 1 is a block diagram showing an embodiment of a waveform generator with an arbitrary parameter sweep function according to the present invention. In the figure,
1 is an analog-to-digital converter that digitally converts an external input signal (analog signal) (hereinafter analog-to-digital conversion is referred to as AD conversion), 2 is a switch, 3 is a sweep memory in which sweep data is stored, 4 is a type of sweep A sweep controller that controls three outputs according to
5 waveform data storing waveform data, 6 a digital-analog converter for converting the waveform data read from the waveform memory 5 to analog (hereinafter digital-analog conversion
A conversion), 7 is a first DA converter for amplitude sweep for analog-converting magnification data at the time of amplitude sweep, 8
Is a multiplier, and 9 is a second D for offset sweep for converting the offset data during the offset sweep into analog form.
A converter, 10 is an adder, 11 is a control arithmetic circuit for writing data to the sweep memory 3 and the waveform memory 5, etc., 20 is a first address generator for generating an address for the waveform memory 5, 30 Is a second address generator that generates an address for the sweep memory 3.

The output of the AD converter 1 and the output of the second address generator 30 are selectively selected by the switch 3 and serve as an address for the sweep memory 3. Sweep data is stored in advance in the sweep memory 3,
The contents of the specified address are output. The sweep controller 4 outputs the output data of the sweep memory 3 in association with the frequency sweep, the amplitude sweep, or the offset sweep to the first address generator 20, the first DA converter 7, or the second DA converter. Allocate to any of 9. In addition, fixed values are given to other items that were not assigned.

The first address generator 20 receives the frequency data (M) from the sweep controller 4,
Data that increases by M is generated as an address for the waveform memory 5. The first address generator 2
Details of 0 will be described later. The waveform memory 5 outputs the content (waveform data) of the designated address. This data is guided to the DA converter 6 and DA converted.

The first DA converter 7 for amplitude sweep is
The data supplied from the sweep controller 4 is converted into analog data and sent to the multiplier 8. The multiplier 8 calculates the product of the output of the DA converter 6 and the output of the first DA converter 7.
The second DA converter 9 for offset sweep converts the data supplied from the sweep controller 4 into an analog signal and sends it to the multiplier 8. The adder 10 adds the output of the second DA converter 9 to the output of the multiplier 8.

The configuration of the first address generator 20 will be described. The second address generator 3
Since 0 also has the same configuration as the first address generator 20, the description of the configuration of the second address generator 30 will be omitted. FIG. 2 is a configuration diagram of the first address generator 20. In the figure, 21 is an adder, 22
Is a latch. The output of the adder 21 is input to the latch 22, and the output of the latch 22 is returned to the adder 21 again.
The adder 21 adds the frequency data M and the output of the latch 22. The latch 22 latches the input signal in synchronization with the clock (the clock oscillator is not shown).
As a result, the latch 12 generates an address that increases by M each time a clock pulse is input.

In the second address generator 30, not the frequency data M but the entire time N is input to the adder, and the address increasing by N is output from the latch.

In FIG. 1, the portion consisting of the first address generator 20, the waveform memory 5 and the DA converter 6 is
This is a waveform generation circuit part called a direct digital synthesizer (DDS) system. In this portion, the time of one cycle of the output waveform (in other words, the frequency) can be changed by changing the frequency data M.

The operation in such a configuration will be described below. First, the sweep mode will be described. The following three sweeps can be realized depending on the output destination of the data stored in the sweep memory 3. First address generator 20 as frequency data
If output to the first DA converter 7 for frequency sweep and amplitude sweep,
Amplitude sweep Offset sweep if output to the second DA converter 9 for offset sweep

On the other hand, the sweep includes an internal sweep and an external sweep. When the output of the second address generator 30 is selected by the switch 2, the internal sweep is performed, and when the output of the AD converter 1 is selected, the external sweep is performed.

(1) In case of internal sweep The switch 2 connects the output of the second address generator 30 to the sweep memory 3. The portion including the second address generator 30 and the sweep memory 3 determines the time of one cycle of sweep data, that is, the sweep time. When N is input to the second address generator 30 as the total time, N, 2N, 3N ,. ． ． And an address increasing by N are output. If log data is stored in the sweep memory 3, for example, sweep data that changes logarithmically is output from the sweep memory 3.

Now, it is assumed that sweep data (log data) is stored in the sweep memory 3 at addresses A to 9A. When N = A, as shown in FIG. 3A, sweep data (log data) is repeatedly output every 9 clocks. When N = 3A, the sweep data is repeatedly output every 3 clocks as shown in FIG.

The sweep data output in this manner includes a first address generator 20, a first DA converter 7 for amplitude sweep, and a second D converter for offset sweep.
It is distributed to one of the A converters 9. The sweep controller 4 performs the distribution. The sweep controller 4 determines the distribution destination based on the designated sweep mode. For example, when the amplitude sweep is designated as the sweep mode, the sweep controller 4 selects the first DA converter 7 for the amplitude sweep as a distribution destination and gives the sweep data. On the other hand, fixed values are given to the remaining first address generator 20 and the second DA converter 9 for offset sweep so that the frequency and offset of the output waveform do not change.

The multiplier 8 multiplies the output value of the first DA converter 7 by the waveform data value of the DA converter 6. The multiplied data is added to the second DA converter 9 in the adder 10.
Output of (in this case a fixed offset, usually 0)
Is added and output. In this way, the amplitude of the waveform read from the waveform memory 5 changes according to the sweep data input to the first DA converter 7, and the adder 1
A waveform whose amplitude is swept is obtained from the output terminal of 0.

When performing the offset sweep, the sweep data is given to the second DA converter 9 for offset sweep, and the other first address generator 20 and the first address generator 20 are provided.
A fixed value is given to the DA converter 7 of. When performing frequency sweep, sweep data is given to the first address generator 20, and fixed values are given to the other DA converters 7 and 9. As a result, a frequency-swept waveform is obtained.

(2) In case of external sweep The output of the AD converter 1 is selected by the switch 2 and input to the sweep memory 3. Except that the address for the sweep memory 3 is not from the second address generator 30 but from an external input signal, the above (1)
The operation is the same as for the internal sweep of.

[0022]

As described above, the present invention has the following effects. By changing the data stored in the sweep memory, various sweeps can be supported. The first address generator, the first DA converter, the data in the sweep memory by the sweep controller,
By distributing to the second DA converter, frequency sweep, amplitude sweep, and offset sweep can be realized arbitrarily. The accuracy of the sweep time depends only on the reference clock used, and has the advantage that it is not affected by variations in other elements. Since the sweep by the external input signal is once converted into a digital value, it depends on the performance of the AD converter, but recently, many of them operate at a high speed (100 KHz or more), and a wide band sweep is possible.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of a waveform generator with an arbitrary parameter sweep function according to the present invention.

FIG. 2 is a configuration diagram showing an example of a first address generator.

FIG. 3 is a diagram for explaining changes in sweep data in a sweep memory.

[Explanation of symbols]

 1 AD converter 2 Switch 3 Sweep memory 4 Sweep controller 5 Waveform memory 6 DA converter 7 First DA converter for amplitude sweep 8 Multiplier 9 Second DA converter for offset sweep 10 Adder 11 Control operation Circuit 20 First address generator 21 Adder 22 Latch 30 Second address generator

Claims (1)

[Claims] 1. A first signal generator for generating an address signal, which changes corresponding to frequency data inputted, in synchronization with a reference clock.
Address generator, waveform data is stored, and when the address is designated from the first address generator, the waveform data stored at the address is read out, and output data of the waveform memory When an address is specified by a DA converter that converts analog data and a means that generates an address signal that stores arbitrary sweep data and that changes at a predetermined ratio, or an AD converter that digitally converts an external input signal, A sweep memory configured to read the stored sweep data, a first DA converter for amplitude sweep that performs analog conversion of data for amplitude sweep, and an offset sweep that performs analog conversion of data for offset sweep The second DA converter of, and the output of the sweep memory. Data is given to one of the first address generator or the first DA converter for amplitude sweep or the second DA converter for offset sweep according to the sweep mode, and the other two have fixed values. A sweep controller for giving, a multiplier for multiplying the output of the DA converter and the output of the first DA converter for amplitude sweep, and the output of this multiplier and the second DA for offset sweep.
Waveform generation with an arbitrary parameter sweep function, characterized by comprising an adder for adding the output of the converter, and being configured to arbitrarily obtain a frequency-swept, amplitude-swept or offset-swept waveform from the adder vessel.