JPH08181342A - Solar cell - Google Patents

Solar cell

Info

Publication number
JPH08181342A
JPH08181342A JP6321841A JP32184194A JPH08181342A JP H08181342 A JPH08181342 A JP H08181342A JP 6321841 A JP6321841 A JP 6321841A JP 32184194 A JP32184194 A JP 32184194A JP H08181342 A JPH08181342 A JP H08181342A
Authority
JP
Japan
Prior art keywords
semiconductor layer
solar cell
ceramic substrate
cell element
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6321841A
Other languages
Japanese (ja)
Other versions
JP3103737B2 (en
Inventor
Kenji Fukui
健次 福井
Michihiro Takayama
道寛 高山
Katsuhiko Shirasawa
勝彦 白沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP06321841A priority Critical patent/JP3103737B2/en
Publication of JPH08181342A publication Critical patent/JPH08181342A/en
Application granted granted Critical
Publication of JP3103737B2 publication Critical patent/JP3103737B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/546Polycrystalline silicon PV cells

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  • Photovoltaic Devices (AREA)

Abstract

PURPOSE: To make it possible to use effectively light incident on a semiconductor layer by installing a semiconductor layer having a semiconductor junction part on the front surface or the rear surface of a white-colored ceramic board which forms a large number of Via holes and installing an electrode on both the front and rear surfaces of the semiconductor layer. CONSTITUTION: On a light receiving surface side of a semiconductor layer 2 there are installed a light receiving surface electrode 3 which is made of silver (g), for example and a reflection preventive film 6 which comprises a nitriding silicon film, for example on the rear surface side of the semiconductor layer 2. On the rear surface side of the semiconductor layer 2, there is installed a silver-made rear surface electrode 4, to which aluminum is added, for example. Since a white colored-ceramic board 1 is used so as to support the semiconductor layer 2, almost all light penetrating the semiconductor layer 2 is not being absorbed in the white colored ceramic board 1, and it is reflected on the surface of the white colored ceramic board 1 and returns to the semiconductor layer 2 once again. It is, therefore, possible to use effectively the light which enters the semiconductor layer 2 in this solar cell, thereby producing a highly efficient solar cell.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は太陽電池素子に関し、特
に白色系のセラミック基板上に半導体接合部を有する半
導体層を設けた太陽電池素子に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solar cell element, and more particularly to a solar cell element provided with a semiconductor layer having a semiconductor junction on a white ceramic substrate.

【0002】[0002]

【従来の技術】近時、安価で高効率な太陽電池素子を得
るために、例えばセラミック基板上に単結晶若しくは多
結晶の半導体層を形成した太陽電池素子が提案されてい
る。
2. Description of the Related Art Recently, in order to obtain an inexpensive and highly efficient solar cell element, for example, a solar cell element having a monocrystalline or polycrystalline semiconductor layer formed on a ceramic substrate has been proposed.

【0003】単結晶または多結晶の半導体層は、CVD
法、液相成長法、固相成長法などで形成される。このう
ち、CVD法と固相成長法は、低温で成膜できることか
ら、ガラス基板を用いることができるが、得られる結晶
は品質が悪く、高効率な太陽電池素子を得ることはでき
ない。
Single crystal or polycrystalline semiconductor layers are formed by CVD.
Method, liquid phase growth method, solid phase growth method, or the like. Of these, the CVD method and the solid phase growth method can use a glass substrate because they can form a film at a low temperature, but the obtained crystal is of poor quality and a highly efficient solar cell element cannot be obtained.

【0004】一方、液相成長法によれば、高品質な半導
体膜が得られ、高効率な太陽電池素子を期待できるが、
基板としてセラミクなどの高融点材料のものを用いなけ
ればならない。
On the other hand, according to the liquid phase growth method, a high quality semiconductor film can be obtained, and a highly efficient solar cell element can be expected.
A high melting point material such as ceramic must be used as the substrate.

【0005】例えばセラミック基板を用いた太陽電池素
子として、図6に示すような太陽電池素子が報告されて
いる(例えば、23rd IEEE PVSC, 1993. P214参照) 。図
6に示す太陽電池素子において、11はテープ成型法な
どで成型した後に焼成して形成したセラミック基板、1
2はセラミック基板11上に形成した多結晶シリコンな
どから成る半導体層である。
For example, as a solar cell element using a ceramic substrate, a solar cell element as shown in FIG. 6 has been reported (for example, see 23rd IEEE PVSC, 1993. P214). In the solar cell element shown in FIG. 6, reference numeral 11 denotes a ceramic substrate which is formed by molding with a tape molding method and then firing.
Reference numeral 2 is a semiconductor layer formed on the ceramic substrate 11 and made of polycrystalline silicon or the like.

【0006】半導体層12は、p型不純物を含有する層
12aとn型不純物を含有する層12bで構成されてい
る。また、この半導体層12は、溝13によって小区画
ごとに切り離され、隣接する半導体12同志は、p型不
純物を含有する層12aとn型不純物を含有する層12
bが接続材14でそれぞれ接続されている。なお、セラ
ミック基板11上には、セラミック基板11から半導体
層12に不純物が混入するのを防止するためのバリア層
15が設けられている。このバリア層15は例えば金属
酸化物などで形成される。
The semiconductor layer 12 is composed of a layer 12a containing p-type impurities and a layer 12b containing n-type impurities. Further, the semiconductor layer 12 is separated into small sections by the groove 13, and the adjacent semiconductors 12 include the layer 12a containing the p-type impurity and the layer 12 containing the n-type impurity.
b are connected by the connecting member 14. A barrier layer 15 for preventing impurities from being mixed into the semiconductor layer 12 from the ceramic substrate 11 is provided on the ceramic substrate 11. The barrier layer 15 is formed of, for example, a metal oxide.

【0007】[0007]

【発明が解決しようとする課題】ところが、この従来の
太陽電池素子では、半導体層12をセラミック基板11
上で小区画ごとに切り離しているが、この溝部分のピッ
チが特性に重要な影響を及ぼす。すなわち、シリーズ抵
抗を下げるためにピッチを狭くしてコンタクト面積を増
やすと光発電領域の減少により短絡電流が低下し、特性
が低下するという問題が発生する。
However, in this conventional solar cell element, the semiconductor layer 12 is formed on the ceramic substrate 11.
Although the above is divided into small sections, the pitch of this groove portion has an important influence on the characteristics. That is, if the pitch is narrowed to increase the contact area in order to reduce the series resistance, the short-circuit current is reduced due to the reduction of the photovoltaic region, which causes a problem that the characteristics are degraded.

【0008】なお、図7に示すように、セラミック基板
11の表面にp層側の電極17を形成して、このp層側
の電極17上に半導体接合部を有する半導体層12と受
光面側電極16を順次形成することも考えられるが、半
導体層12を形成する前に、p層側の電極17を形成す
ると半導体層12はCVD法などの低温工程で形成しな
ければならず、高効率な太陽電池素子は得られない。
As shown in FIG. 7, the p-layer side electrode 17 is formed on the surface of the ceramic substrate 11, and the semiconductor layer 12 having a semiconductor junction portion on the p-layer side electrode 17 and the light receiving surface side. Although it is possible to sequentially form the electrodes 16, if the electrode 17 on the p-layer side is formed before forming the semiconductor layer 12, the semiconductor layer 12 must be formed by a low temperature process such as a CVD method, which results in high efficiency. It is impossible to obtain a good solar cell element.

【0009】また、図8に示すように、基板11として
半導体や導電性セラミックなどの導電性基板11を用
い、この導電性基板11上に良質な半導体層を得ること
ができる液相成長法で半導体層12を形成し、導電性基
板11の裏面側と半導体層12上に電極16、17を形
成することも考えられるが、これらの導電性基板11
は、黒色系の色彩を呈することから、反射率が低く半導
体層12内に侵入した光を吸収し、光の利用率が悪く
て、高効率な太陽電池素子は得られないと共に、基板1
1として半導体基板を用いる場合は、高価になるという
問題があった。
Further, as shown in FIG. 8, a conductive substrate 11 such as a semiconductor or a conductive ceramic is used as the substrate 11, and a liquid crystal growth method capable of obtaining a good quality semiconductor layer on the conductive substrate 11 is obtained. It is conceivable that the semiconductor layer 12 is formed and the electrodes 16 and 17 are formed on the back surface side of the conductive substrate 11 and on the semiconductor layer 12.
Exhibits a black color, has a low reflectance and absorbs light that has entered the semiconductor layer 12, and the utilization rate of light is poor, so that a highly efficient solar cell element cannot be obtained and the substrate 1
When a semiconductor substrate is used as No. 1, there is a problem that it becomes expensive.

【0010】[0010]

【発明の目的】本発明はこのような従来技術の問題点に
鑑みて発明されたものであり、高効率で安価な太陽電池
素子を提供することを目的とする。
SUMMARY OF THE INVENTION The present invention has been invented in view of the above problems of the prior art, and an object of the present invention is to provide a highly efficient and inexpensive solar cell element.

【0011】[0011]

【課題を解決するための手段】上記目的を達成するため
に、請求項1に記載した太陽電池素子では、多数の透孔
が形成された白色系セラミック基板の表面若しくは表面
から裏面にかけて半導体接合部を有する半導体層を設
け、この半導体層の表裏面に電極を設けて成る。
In order to achieve the above object, in the solar cell element according to claim 1, a semiconductor junction is formed from the front surface or the front surface to the back surface of a white ceramic substrate in which a large number of through holes are formed. Is provided, and electrodes are provided on the front and back surfaces of the semiconductor layer.

【0012】また、請求項2に記載した太陽電池素子で
は、多数の透孔が形成された白色系セラミック基板の表
面に半導体接合部を有する半導体層を設け、この半導体
層の表面側に受光面電極を設け、前記白色系セラミック
基板の透孔部分に裏面電極を設けて成る。
Further, in the solar cell element according to the second aspect, a semiconductor layer having a semiconductor junction is provided on the surface of the white ceramic substrate having a large number of through holes, and the light receiving surface is provided on the surface side of the semiconductor layer. An electrode is provided, and a back electrode is provided in the through hole portion of the white ceramic substrate.

【0013】[0013]

【作用】上記のように構成すると、半導体層を形成する
ための基板として、安価で反射率の大きな白色系セラミ
ック基板を用いることができる。また、上記のように構
成すると、半導体層を形成した後に電極を形成できるこ
とから、半導体層は高品質な半導体層が得られる液相成
長で形成できると共に、反射率の大きな白色系セラミッ
ク基板を用いることができ、高効率な太陽電池を得るこ
とができる。
With the above structure, a white ceramic substrate which is inexpensive and has a large reflectance can be used as the substrate for forming the semiconductor layer. Further, with the above configuration, since the electrode can be formed after the semiconductor layer is formed, the semiconductor layer can be formed by liquid phase growth to obtain a high quality semiconductor layer, and a white ceramic substrate having a large reflectance is used. It is possible to obtain a highly efficient solar cell.

【0014】[0014]

【実施例】以下、本発明の実施例を添付図面に基づき詳
細に説明する。図1は、請求項1に記載した発明に係る
太陽電池素子の一実施例を示す図であり、1は白色系セ
ラミック基板、2は半導体層、3は受光面電極、4は裏
面電極である。
Embodiments of the present invention will now be described in detail with reference to the accompanying drawings. FIG. 1 is a diagram showing an embodiment of the solar cell element according to the invention described in claim 1, 1 is a white ceramic substrate, 2 is a semiconductor layer, 3 is a light receiving surface electrode, and 4 is a back surface electrode. .

【0015】白色系セラミック基板1は、薄板状に形成
され、ほぼ全面にわたって表面側から裏面側に連通する
透孔1aが形成されている。このセラミック基板1は、
半導体層2を所定形態に維持するためだけのものであ
り、厚みは例えば1〜数mm程度に形成される。透孔1
aは、半導体層2内でのキャリアの移動を考慮して例え
ば全面積の1〜8%程度に相当するように設ける。ま
た、半導体層2内でのキャリアの移動を考慮して、例え
ば数十μm〜数百μmのピッチで設ける。
The white ceramic substrate 1 is formed in a thin plate shape, and has a through hole 1a which is communicated from the front surface side to the back surface side over substantially the entire surface. This ceramic substrate 1
It is only for maintaining the semiconductor layer 2 in a predetermined shape, and has a thickness of, for example, about 1 to several mm. Through hole 1
In consideration of carrier movement in the semiconductor layer 2, a is provided so as to correspond to, for example, about 1 to 8% of the total area. Further, in consideration of carrier movement in the semiconductor layer 2, the layers are provided at a pitch of, for example, several tens μm to several hundreds μm.

【0016】この白色系セラミック基板1は、例えばア
ルミナ(Al2 3 )を主成分とするセラミック基板な
どで構成される。すなわち、アルミナを主成分として、
シリカ(SiO2 )、マグネシア(MgO)、カルシア
(CaO)などの焼結助剤を少量含有したセラミック基
板1などで構成される。このような薄板状の白色系セラ
ミック基板1は、例えば加圧成型法やテープ成型法など
で薄板状の生成型体を形成した後に、1400〜150
0℃程度で焼結させることにより形成される。
The white ceramic substrate 1 is composed of, for example, a ceramic substrate containing alumina (Al 2 O 3 ) as a main component. That is, with alumina as the main component,
The ceramic substrate 1 contains a small amount of a sintering aid such as silica (SiO 2 ), magnesia (MgO), and calcia (CaO). Such a thin plate-shaped white ceramic substrate 1 is formed into a thin plate-shaped molding die by, for example, a pressure molding method or a tape molding method, and then 1400 to 150
It is formed by sintering at about 0 ° C.

【0017】加圧成型法で生成型体を形成する場合は、
透孔1aは加圧成型時に同時に形成され、テープ成型法
で形成する場合は透孔1aはテープ状に成型した後に形
成される。また、アルミナを主成分とする白色系セラミ
ック基板1は、例えば3000Kg/cm2 程度の曲げ
強度、3.8×106 Kg/cm2 程度のヤング率、お
よび1014Ω・cm以上の体積固有抵抗を有する。
When the green body is formed by the pressure molding method,
The through holes 1a are formed at the same time as the pressure molding, and when formed by the tape molding method, the through holes 1a are formed after being molded into a tape shape. A white ceramic substrate 1 composed mainly of alumina, for example 3000 Kg / cm 2 of about flexural strength, 3.8 × 10 6 Kg / cm 2 of about Young's modulus, and 10 14 Ω · cm or more volume Have resistance.

【0018】白色系セラミック基板1の表面には、半導
体層2が形成されている。また、白色系セラミック基板
1の透孔1a部分にも半導体材料が充填されるように半
導体層2が形成されている。この半導体層2は、例えば
多結晶シリコンなどで構成され、液相成長法などで形成
される。すなわち、シリコンの溶融液中に白色系セラミ
ック基板1を浸漬して引き上げながら徐冷することによ
り、透孔1a部分にも半導体材料が充填された半導体層
2を形成する。この場合、シリコンの溶融液中にボロン
(B)などのp型不純物を含有させておく。このような
半導体層2は、例えば5〜100μm程度の厚みに形成
される。
A semiconductor layer 2 is formed on the surface of the white ceramic substrate 1. Further, the semiconductor layer 2 is formed so that the semiconductor material is filled also in the through hole 1a portion of the white ceramic substrate 1. The semiconductor layer 2 is made of, for example, polycrystalline silicon or the like, and is formed by a liquid phase growth method or the like. That is, the white ceramic substrate 1 is dipped in a melt of silicon and gradually cooled while being pulled up to form the semiconductor layer 2 in which the semiconductor material is also filled in the through holes 1a. In this case, p-type impurities such as boron (B) are contained in the molten silicon. Such a semiconductor layer 2 is formed to have a thickness of, for example, about 5 to 100 μm.

【0019】半導体層2の受光面側には、リン(P)な
どのn型不純物を含有するn層2aを0.3〜1μm程
度の厚みに形成する。また、半導体層2の裏面側には、
p型不純物を多量に含有するp+ 層2bを形成する。
On the light-receiving surface side of the semiconductor layer 2, an n layer 2a containing an n-type impurity such as phosphorus (P) is formed with a thickness of about 0.3 to 1 μm. Further, on the back surface side of the semiconductor layer 2,
P + layer 2b containing a large amount of p-type impurities is formed.

【0020】n型不純物を含有するn層2aは、例えば
オキシ塩化リン(POCl3 )を拡散源として気相反応
によりリン(P)を半導体層2中の0.3〜1μmの深
さまで拡散することにより形成される。また、p+ 層2
bは、例えばアルミニウム粉末を主成分とする金属ペー
ストを半導体層2の裏面側に塗布して焼成することによ
り、アルミニウムを半導体層2中の1〜10μmの深さ
まで拡散させることにより形成される。
The n layer 2a containing n-type impurities diffuses phosphorus (P) to a depth of 0.3 to 1 μm in the semiconductor layer 2 by a gas phase reaction using phosphorus oxychloride (POCl 3 ) as a diffusion source. It is formed by Also, p + layer 2
b is formed by diffusing aluminum to a depth of 1 to 10 μm in the semiconductor layer 2 by applying a metal paste containing aluminum powder as a main component to the back surface side of the semiconductor layer 2 and baking it.

【0021】半導体層2の受光面側には、例えば銀(A
g)などから成る受光面電極3と、例えば窒化シリコン
膜などから成る反射防止膜5が設けられており、半導体
層2の裏面側には、例えばアルミニウムが添加された銀
などから成る裏面電極4が設けられている。なお、この
裏面電極4はp+ 層部分だけでなく、白色系セラミック
基板1の裏面側全面に設けてもよい。
On the light-receiving surface side of the semiconductor layer 2, for example, silver (A
g) and the anti-reflection film 5 made of, for example, a silicon nitride film, and the back surface electrode 4 made of, for example, silver doped with aluminum is provided on the back surface side of the semiconductor layer 2. Is provided. The back surface electrode 4 may be provided not only on the p + layer portion but also on the entire back surface side of the white ceramic substrate 1.

【0022】上記太陽電池素子における集電の様子を図
2に示す。受光面側から入射した光がpn接合部(半導
体接合部)に到達すると電子・正孔対が生成され、再結
合することなく空乏層領域へ到達し、強い電界に引かれ
て電子はn層2aへ、正孔はp層2bへ流入する。この
時に受光面電極3と裏面電極4を短絡しておくとn層2
aへ流入した電子は受光面電極3へ到達し、p層2へ流
入した正孔は半導体層2のセラミック基板1に形成した
透孔1a部分とp+層を経由して裏面電極4に到達し、
外部回路(不図示)には入射光量に比例した光電流が流
れる。
The state of current collection in the solar cell element is shown in FIG. When the light incident from the light-receiving surface side reaches the pn junction (semiconductor junction), an electron-hole pair is generated, reaches the depletion layer region without recombination, and is attracted to a strong electric field, so that the electron is n layer. 2a and holes flow into the p-layer 2b. At this time, if the light-receiving surface electrode 3 and the back surface electrode 4 are short-circuited, the n-layer 2
The electrons flowing into a reach the light-receiving surface electrode 3, and the holes flowing into the p layer 2 reach the back surface electrode 4 via the through hole 1a formed in the ceramic substrate 1 of the semiconductor layer 2 and the p + layer. Then
A photocurrent proportional to the amount of incident light flows through an external circuit (not shown).

【0023】図3は本発明に係る太陽電池素子における
光閉じ込めの様子を示す図である。
FIG. 3 is a diagram showing how light is confined in the solar cell element according to the present invention.

【0024】本発明に係る太陽電池素子は、半導体層2
を支持するための基板として白色系セラミック基板1を
用いていることから、半導体層2に侵入した殆どの光
は、白色系セラミック基板1に吸収されることなく、白
色系セラミック基板1の表面で反射して再び半導体層2
内に戻る。もって、本発明の太陽電池素子では半導体層
に入射した光を有効に利用することができ、高効率の太
陽電池素子となる。
The solar cell element according to the present invention comprises a semiconductor layer 2
Since the white ceramic substrate 1 is used as a substrate for supporting the light, most of the light that has entered the semiconductor layer 2 is not absorbed by the white ceramic substrate 1 and the surface of the white ceramic substrate 1 is not absorbed. The semiconductor layer 2 is reflected again
Return to inside. Therefore, in the solar cell element of the present invention, the light incident on the semiconductor layer can be effectively used, and the solar cell element has high efficiency.

【0025】なお、セラミック基板1と半導体層2との
間に、例えば窒化シリコン膜や二酸化シリコン膜などか
らなる透明絶縁膜を入れてもよい。このように、セラミ
ック基板1と半導体層2との間に透明絶縁膜を入れる
と、半導体層2の底面部分での反射率を上げることがで
き、より有効に光閉じ込めを行うことができる。
A transparent insulating film made of, for example, a silicon nitride film or a silicon dioxide film may be inserted between the ceramic substrate 1 and the semiconductor layer 2. In this way, when the transparent insulating film is inserted between the ceramic substrate 1 and the semiconductor layer 2, the reflectance at the bottom portion of the semiconductor layer 2 can be increased, and light can be more effectively confined.

【0026】図4は他の実施例を示す図である。この実
施例でも、白色系セラミック基板1に多数の透孔1aを
形成して、この白色系セラミック基板1の表面に半導体
層2を形成した点は先の実施例と同様であるが、この実
施例では、半導体層2を白色系セラミック基板1の表面
側だけでなく、裏面側にも設けている。したがって、こ
の実施例に係る太陽電池素子でも先の実施例と同様に高
効率な太陽電池素子を得ることができるが、この実施例
ではp+ 層2bが半導体層2の裏面側の全面に設けられ
ていることから、裏面電極4を形成する精度に余裕がで
きる。
FIG. 4 is a diagram showing another embodiment. This embodiment is similar to the previous embodiment in that a large number of through holes 1a are formed in the white ceramic substrate 1 and the semiconductor layer 2 is formed on the surface of the white ceramic substrate 1, but this embodiment is the same. In the example, the semiconductor layer 2 is provided not only on the front surface side of the white ceramic substrate 1 but also on the back surface side. Therefore, even with the solar cell element according to this example, a highly efficient solar cell element can be obtained as in the previous example, but in this example, the p + layer 2b is provided on the entire back surface side of the semiconductor layer 2. Therefore, the accuracy of forming the back surface electrode 4 can be increased.

【0027】図5は請求項3に記載した発明に係る太陽
電池素子の実施例を示す図である。
FIG. 5 is a view showing an embodiment of the solar cell element according to the invention described in claim 3.

【0028】この太陽電池素子でも、白色系セラミック
基板1に多数の透孔1aを形成して、この白色系セラミ
ック基板1の表面に半導体層2を形成した点は、請求項
1に記載した太陽電池素子と同様であるが、この発明で
は半導体層2を白色系セラミック基板1の表面側のみに
形成して、白色系セラミック基板1の透孔1a近傍部に
+ 層2bを形成し、透孔1aに裏面電極4を形成して
いる。このような太陽電池素子は、白色系セラミック基
板1の透孔1a部分にはシリコン溶融液の表面張力で半
導体層が充填されないように形成し、この透孔1a部分
からアルミニウムを拡散してp+ 層2bを形成し、セラ
ミック基板1の透孔1a部分に裏面電極4を埋め込んで
形成する。
Also in this solar cell element, a large number of through holes 1a are formed in the white ceramic substrate 1 and the semiconductor layer 2 is formed on the surface of the white ceramic substrate 1, so that the solar cell according to claim 1 is formed. Similar to the battery element, in the present invention, the semiconductor layer 2 is formed only on the front surface side of the white ceramic substrate 1, and the p + layer 2b is formed in the vicinity of the through hole 1a of the white ceramic substrate 1 to form a transparent layer. The back surface electrode 4 is formed in the hole 1a. Such a solar cell element is formed so that the semiconductor layer is not filled in the through hole 1a portion of the white ceramic substrate 1 by the surface tension of the silicon melt, and aluminum is diffused from this through hole 1a portion to p + The layer 2b is formed, and the back surface electrode 4 is embedded in the through hole 1a portion of the ceramic substrate 1.

【0029】[0029]

【発明の効果】以上詳述したように、請求項1に記載し
た太陽電池素子によれば、多数の透孔が形成された白色
系セラミック基板の表面若しくは表面から裏面にかけて
半導体接合部を有する半導体層を設け、この半導体層の
表裏面に電極を設けたことから、半導体層内に照射され
た光を有効に利用でき、もって安価で高効率な太陽電池
素子となる。
As described in detail above, according to the solar cell element described in claim 1, a semiconductor having a semiconductor junction portion from the front surface or the front surface to the back surface of the white ceramic substrate in which a large number of through holes are formed. Since the layers are provided and the electrodes are provided on the front and back surfaces of the semiconductor layer, the light applied to the inside of the semiconductor layer can be effectively utilized, resulting in an inexpensive and highly efficient solar cell element.

【0030】また、請求項3に記載した太陽電池素子で
も、多数の透孔が形成された白色系セラミック基板の表
面に半導体接合部を有する半導体層を設け、この半導体
層の表面側に受光面電極を設け、前記白色系セラミック
基板の透孔部分に裏面電極を設けたことから、半導体層
内に照射された光を有効に利用でき、もって安価で高効
率な太陽電池素子となる。
Also in the solar cell element according to claim 3, a semiconductor layer having a semiconductor junction is provided on the surface of the white ceramic substrate having a large number of through holes, and the light receiving surface is provided on the surface side of the semiconductor layer. Since the electrode is provided and the back electrode is provided in the through hole portion of the white ceramic substrate, the light applied to the inside of the semiconductor layer can be effectively used, and the solar cell element is inexpensive and highly efficient.

【図面の簡単な説明】[Brief description of drawings]

【図1】請求項1に記載した太陽電池素子の一実施例を
示す断面図である。
FIG. 1 is a cross-sectional view showing an embodiment of the solar cell element according to claim 1.

【図2】請求項1に記載した太陽電池素子における集電
の様子を示す図である。
FIG. 2 is a diagram showing a state of current collection in the solar cell element according to claim 1.

【図3】請求項1に記載した太陽電池素子における光閉
じ込めの様子を示す図である。
FIG. 3 is a diagram showing a state of optical confinement in the solar cell element according to claim 1.

【図4】請求項1に記載した太陽電池素子の他の実施例
を示す断面図である。
FIG. 4 is a cross-sectional view showing another embodiment of the solar cell element according to claim 1.

【図5】請求項3に記載した太陽電池素子の一実施例を
示す断面図である。
FIG. 5 is a cross-sectional view showing an embodiment of the solar cell element described in claim 3.

【図6】従来の太陽電池素子を示す断面図である。FIG. 6 is a cross-sectional view showing a conventional solar cell element.

【図7】従来の他の太陽電池を示す断面図である。FIG. 7 is a cross-sectional view showing another conventional solar cell.

【図8】従来のその他の太陽電池を示す断面図である。FIG. 8 is a cross-sectional view showing another conventional solar cell.

【符号の説明】[Explanation of symbols]

1・・・白色系セラミック基板、2・・・半導体層、3
・・・受光面電極、4・・・裏面電極
1 ... White ceramic substrate, 2 ... Semiconductor layer, 3
... Light-receiving surface electrode, 4 ... Back surface electrode

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 多数の透孔が形成された白色系セラミッ
ク基板の表面若しくは表面から裏面にかけて半導体接合
部を有する半導体層を設け、この半導体層の表裏面に電
極を設けて成る太陽電池素子。
1. A solar cell element comprising a white ceramic substrate on which a large number of through holes are formed, or a semiconductor layer having a semiconductor junction from the front surface to the back surface, and electrodes provided on the front and back surfaces of the semiconductor layer.
【請求項2】 前記白色系セラミック基板の透孔部分に
前記半導体層を構成する半導体材料が充填されているこ
とを特徴とする請求項1に記載の太陽電池素子。
2. The solar cell element according to claim 1, wherein a through hole portion of the white ceramic substrate is filled with a semiconductor material forming the semiconductor layer.
【請求項3】 多数の透孔が形成された白色系セラミッ
ク基板の表面に半導体接合部を有する半導体層を設け、
この半導体層の表面側に受光面電極を設け、前記白色系
セラミック基板の透孔部分に裏面電極を設けて成る太陽
電池素子。
3. A semiconductor layer having a semiconductor junction is provided on the surface of a white ceramic substrate on which a large number of through holes are formed,
A solar cell element comprising a light-receiving surface electrode provided on the front surface side of this semiconductor layer, and a back surface electrode provided at a through hole portion of the white ceramic substrate.
JP06321841A 1994-12-26 1994-12-26 Solar cell element Expired - Fee Related JP3103737B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP06321841A JP3103737B2 (en) 1994-12-26 1994-12-26 Solar cell element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP06321841A JP3103737B2 (en) 1994-12-26 1994-12-26 Solar cell element

Publications (2)

Publication Number Publication Date
JPH08181342A true JPH08181342A (en) 1996-07-12
JP3103737B2 JP3103737B2 (en) 2000-10-30

Family

ID=18137031

Family Applications (1)

Application Number Title Priority Date Filing Date
JP06321841A Expired - Fee Related JP3103737B2 (en) 1994-12-26 1994-12-26 Solar cell element

Country Status (1)

Country Link
JP (1) JP3103737B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009505426A (en) * 2005-08-15 2009-02-05 コナルカ テクノロジーズ インコーポレイテッド Photovoltaic battery with interconnection to external circuit
WO2010101350A3 (en) * 2009-03-02 2010-10-28 Lg Electronics Inc. Solar cell and method of manufacturing the same
JP2011014892A (en) * 2009-06-05 2011-01-20 Semiconductor Energy Lab Co Ltd Photoelectric conversion device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009505426A (en) * 2005-08-15 2009-02-05 コナルカ テクノロジーズ インコーポレイテッド Photovoltaic battery with interconnection to external circuit
WO2010101350A3 (en) * 2009-03-02 2010-10-28 Lg Electronics Inc. Solar cell and method of manufacturing the same
CN102171838A (en) * 2009-03-02 2011-08-31 Lg电子株式会社 Solar cell and method of manufacturing the same
US8569614B2 (en) 2009-03-02 2013-10-29 Lg Electronics Inc. Solar cell and method of manufacturing the same
JP2011014892A (en) * 2009-06-05 2011-01-20 Semiconductor Energy Lab Co Ltd Photoelectric conversion device

Also Published As

Publication number Publication date
JP3103737B2 (en) 2000-10-30

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