JPH0817833A - Method for formation of bump of semiconductor device - Google Patents

Abstract

PURPOSE:To form a tall bump on a semiconductor device of microscopic electrode pitch. CONSTITUTION:This bump forming method uses which a thick film resist on the electrode part of a semiconductor device using a lift-off method. A thick film resist 3 is patterned on a substrate 1 which is prepared separately from the semiconductor device 7, so that a lift-off resist pattern is formed 5 by reversing the resist 3 to the semiconductor device 7. Consequently, as a reverse tapered-shaped resist pattern 5 is formed, a tall bump can be formed. Also, if a transparent material is used for the substrate 1, the pattern of the semiconductor device 7 can be seen across the substrate 1 during reverse-transfer operation, and accurate registration can be performed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bump forming method for a semiconductor device for forming solder bumps which are projecting connection electrodes on a semiconductor chip.

[0002]

2. Description of the Related Art There are various methods for mounting a semiconductor device. For example, a so-called flip chip ("FC
It is abbreviated as "B". ) In what is called mounting, a semiconductor chip is mounted on a circuit board via minute solder bumps formed on the semiconductor chip. Also,
In what is called tape automated bonding (abbreviated as "TAB") mounting, bumps formed on a semiconductor chip and one end of a lead formed on a carrier tape are joined, and the other lead is connected. It is mounted on the circuit board. As described above, some semiconductor device mounting methods require solder bumps.

By the way, conventionally, a method called a lift-off method has been used for forming a pattern of a Pb (lead) alloy material. In this lift-off method, the resist pattern used for processing the element region is used as a stencil for insulation, and in order to perform pattern processing with high accuracy and yield, a stencil with a "overhang structure" must be formed. It is supposed to be necessary.

Therefore, an example of the method of forming the solder bumps by the lift-off method will be described first with reference to FIG. 2 is a schematic cross-sectional view showing an example of a method of forming solder bumps by a lift-off method in a conventional semiconductor device. Reference numeral 31 in FIG. 2 is a semiconductor wafer,
32 is an A1 (aluminum) electrode pad (electrode part) 33
Is an aluminum oxide film naturally formed on the A1 electrode pad (electrode portion) 32, and 34 is a passivation film for surface protection.

First, as shown in FIG. 13, a semiconductor wafer 31 provided with the electrode pads 32 and a passivation film 34 is prepared. An aluminum oxide film 33 is naturally formed on the electrode pad 32.

Next, as shown in FIG. 14, a photoresist 35 is formed by spin coating so as to have a thickness larger than that of the barrier metal 38, for example, 5 μm.

Then, as shown in FIG. 15, an opening 36 is formed by exposing and developing using a mask (not shown) on which a pattern for barrier metal is drawn. At this time, devise the conditions of exposure and development to enable lift-off,
A pattern is formed so as to have an inverse tapered shape.

Then, as shown in FIG.
7 and the like are ionized and accelerated, and the aluminum oxide film 33 is removed by a so-called reverse sputtering method.

Further, as shown in FIG. 17, Cr (chromium) is 0.3 μm, Cu (copper) is 0.8 μm, Au from the A1 electrode pad 32 side on the entire surface of the semiconductor wafer 31.
(Gold) is sputtered to 0.2 μm and each metal is used as a barrier metal 38.

[0010]

Then, as shown in FIG. 18, the resist 35 is dissolved by using a resist solution 39. Then, as shown in FIG. 19, the barrier metal 38 is formed only on the electrode pad 32.

Subsequently, as shown in FIG. 20, a thick film resist 40 is applied by spin coating to a thickness of 10 μm.

Then, as shown in FIG. 21, an opening 41 is formed by exposure and development using a mask on which a pattern for bumps (not shown) is drawn. At this time, similarly to the case of forming the pattern of the resist 35, the conditions of exposure and development are devised so that the lift-off is possible, and the pattern of the inverse taper shape is formed.

Next, as shown in FIG. 22, lead 42 is deposited to 7 μm on the entire surface of the semiconductor wafer 31 by a vapor deposition method.
Tin 43 is deposited to a thickness of 1 μm.

After that, as shown in FIG.
0 is dissolved and removed using the resist solution 44. Then, as shown in FIG. 24, the layer of lead 42 and the layer of tin 43 remain only above the electrode pad 32.

Further, after that, a flux is applied to the entire surface of the semiconductor wafer 31 (not shown), and the lead 42 and the tin 43 are simultaneously melted by heating at 300 to 360 ° C. to form a solder alloy by a so-called wet back process. And after that, wash the flux,
The formation of the spherical solder bumps 45 as shown in FIG. 25 is completed.

Although the above-described method is a bump forming method by a general lift-off method, however, in the bump forming method by the conventional lift-off method for a semiconductor device, an attempt is made to pattern a liquid resist having a thickness of 10 μm or more. Then, as shown in FIG. 28, the pattern becomes a forward taper shape, and lift-off may be impossible. Therefore, the problems and problems of the conventional technique will be described below with reference to FIGS. 26 to 28 and FIGS.

First, as shown in FIG. 26, a thick film resist 52 applied on a substrate 51 and subjected to a temporary drying process called pre-baking is made of a metal such as chromium through a mask 54 on which a pattern 53 is drawn. Exposure by the light 55. 26 to 28 are schematic cross-sectional views for explaining the resist shape when forming the thick film pattern.

Next, in a developing step not shown in FIG.
As shown in FIG. 7, a reverse taper-shaped resist 56 is formed.

Next, in order to improve the complete drying and heat resistance of the resist, heating called not shown is called post bake. However, the heating at this time lowers the hardness of the thick film resist 52 and causes a so-called resist sag phenomenon in which the film gradually flows downward due to the surface tension of the resist. As a result, a resist shape 57 having a forward taper shape is eventually obtained as shown in FIG. Lift-off is not possible with such a forward taper resist.

That is, first, in the case of the forward taper-shaped thick film resist 62 as shown in FIG.
As shown in (b), even if the metal 64 is vapor-deposited, the metal 64 adheres to the entire thick-film resist 62 (the "eave structure" does not occur). Note that FIG. 29 is a schematic cross-sectional view for explaining a lift-off relationship when the resist has a forward taper shape. In FIG. 29, reference numeral 61 is a substrate, and 62 is a substrate.
Is a forward tapered thick film resist.

Therefore, when the thick film resist 62 is dissolved as shown in FIG.
Since the maximum thickness is not reached, the thick film resist 62 remains as it is and lift-off becomes impossible.

On the other hand, as shown in FIG.
In the case of the inverse taper-shaped thick film resist 63, FIG.
As in (b), even if the metal 64 is vapor-deposited, the side surface of the thick film resist 63 is not covered with the metal 64. In addition,
FIG. 30 is a schematic cross-sectional view for explaining a lift-off relationship when the resist has a reverse taper shape.
Among them, reference numeral 61 is a substrate, and 63 is a thick film resist having an inverse taper shape.

In this state, if the solvent 65 is caused to act as shown in FIG. 30C, the solvent 65 can contact the thick film resist 63 unlike the case of FIG. 29.
Eventually, the resist 63 dissolves and can be lifted off (it becomes a "canopy structure"). Therefore, FIG. 30 (d)
A metal pattern 66 can be formed, as shown in FIG.

That is, in order to form a pattern by the lift-off method, it is necessary to form a resist having an inverse taper shape. However, the thicker the resist, the greater the so-called resist sag of the resist, making it difficult to form a reverse-tapered resist. Since the conventional technique has the above problems, it is a reality that the resist is thinned to 10 μm or less and then the bump is formed by the lift-off method.

[0025]

As described above, in the conventional bump forming method for a semiconductor wafer (semiconductor device) by the lift-off method, when a thick film resist is used, lift-off cannot be performed due to so-called resist sag. Was formed to a thickness of 10 μm or less to form bumps.

For this reason, since the solder cannot be vapor-deposited thickly, it is unavoidable that the height of the solder bump eventually becomes low. Generally, in flip chip mounting and the like, when the height of the bump becomes low, the stress due to the difference in the coefficient of thermal expansion between the semiconductor chip and the substrate becomes large, so that the bump is easily broken and, eventually, the reliability of the wiring is reduced. It is known to decline.

Therefore, the conventional bump forming method using the lift-off method for a semiconductor wafer has a problem in that sufficient wiring reliability cannot be obtained.

On the other hand, in the above-mentioned conventional method, in order to obtain sufficient reliability, a method of enlarging the area and increasing the solder volume is used even though the thickness of the solder vapor deposition is the same.

However, in this case, it is necessary to dispose the electrode pads of the adjacent semiconductors at positions sufficiently separated from each other. However, this is more and more highly integrated in recent years. However, there is a problem in that it leads to a reduction in packaging density and is not suitable for downsizing electronic devices.

Therefore, the present invention has been proposed in view of the above problems, and provides a bump forming method for a semiconductor device, which is capable of forming high-height bumps on a semiconductor device having a fine electrode pitch. The purpose is to provide.

[0031]

In order to achieve the above object, according to the present invention, when a solder bump is formed on an electrode portion of a semiconductor device by a lift-off method using a thick film resist, the semiconductor device is previously formed. Separately, a thick film resist is formed on a substrate prepared separately and transferred to a semiconductor device to form a lift-off resist pattern.

The substrate is made of a transparent material.

[0033]

According to the bump forming method for a semiconductor device of the present invention, a forward taper pattern is first formed on a substrate by a thick film resist, and this pattern is reversely transferred to a semiconductor wafer. A tapered resist pattern will be formed. Therefore,
A high-height inverted taper-shaped resist pattern is formed.

If a transparent material is used for the substrate, the pattern of the semiconductor wafer can be seen over the substrate during reverse transfer, so that the resist pattern and the semiconductor wafer can be aligned accurately and easily. Can be done.

[0035]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a schematic sectional view showing, in order of steps, an embodiment to which a bump forming method for a semiconductor device according to the present invention is applied.

First, as shown in FIG. 1, an adhesive (manufactured by Toagosei Co., Ltd .; trade name "Aron Alpha") is applied on a glass substrate 1.
2 is applied over the entire surface by spin coating. This glass substrate 1 is a semiconductor device (semiconductor wafer) in advance.
It is prepared separately, and is removed after reverse transfer as described later. A transparent material is used so that the position can be accurately aligned during the reverse transfer.

Next, as shown in FIG.
A 0 μm thick transparent sheet (manufactured by DuPont, USA; trade name “Teflon sheet”) 3 is laminated and adhered. Since the transparent sheet 3 here is as thin as 50 μm, it has good transparency.

Then, as shown in FIG. 3, a thick film resist 4 having a thickness of 50 to 60 μm is spin-coated and applied on the entire surface.

Then, the film is exposed and developed by a process (not shown) to form a pattern 5 on the thick film resist as shown in FIG.
To form.

Next, in order to improve the complete drying and heat resistance of the thick film resist 4, a heating step called post bake (not shown) such as 120 ° C. for 1 hour is added. By this heating step, the thick film resist pattern is
The mechanical strength is improved so that it can sufficiently withstand subsequent processes such as sputtering and vapor deposition.

However, in this state, the state that the adhesiveness is sufficiently maintained is still maintained. Further, as shown in FIG. 5, the thick film resist pattern is changed from the reverse taper shape to the forward taper shape by the heating process by the above post-baking.
It changes depending on what is called resist sag. Further, the adhesive strength of the adhesive 2 is reduced by the heating step, and the glass substrate 1 and the transparent sheet 3 are easily peeled off.

Therefore, here, as shown in FIG.
The glass substrate 1 is turned over, and the pattern is aligned and pressed onto a semiconductor wafer (semiconductor device) 7 on which bumps are to be formed.
Then, the thick film resist pattern 5 having a forward taper shape due to resist sagging is pressure-bonded to the semiconductor wafer 7 as a thick film resist pattern 6 having a reverse reverse taper shape.

In this case, since the glass substrate 1 is transparent, the pattern of the semiconductor wafer 7 can be seen through the glass substrate 1. Therefore, the alignment between the resist pattern and the semiconductor wafer 7 is accurate and easy. It can be carried out. In FIG. 6, the semiconductor wafer 7 on which the solder bumps 13 will be formed is a semiconductor wafer in which circuits are formed on a semiconductor wafer such as Si (silicon), and an electrical inspection as a semiconductor device has already been performed. ing. Further, 8 is an A1 (aluminum) electrode pad (electrode portion), and 9 is a passivation film for surface protection.

Thereafter, as shown in FIG. 7, the glass substrate 1
Is removed. At this time, since the adhesive 2 has a reduced adhesive force when the thick film resist 4 is post-baked (see FIG. 5),
The glass substrate 1 and the transparent sheet 3 can be easily peeled off.

Next, as shown in FIG. 8, the transparent sheet 3
Is removed. In this state, formation of the reverse taper-shaped thick film resist pattern 6 of the thick film resist 4 is completed.

Then, as shown in FIG. 9, from the semiconductor wafer 7 side, Cr (chromium) is 0.3 μm, Cu (copper) is 0.8 μm, and Au (gold) is 0.2 μm in this order. Then, the barrier metal 10 is formed.

Next, in the step shown in FIG. 10, lead (Pb) 11 is deposited to a thickness of 36 μm and tin (Sn) 12 is deposited to a thickness of 4 μm, respectively.

Then, as shown in FIG. 11, the thick film resist pattern is removed by a lift-off method (not shown) to form a barrier metal 10 and a metal layer of lead 11 only on the electrode pad (electrode portion) 9 to be bumped. A metal layer of tin 12 is left.

Then, a step called wet back (not shown) is applied to the metal layer of lead 11 and tin 12, heated to 300 to 360 ° C. to melt the lead 11 and tin 12, and the flux is washed. After that, FIG.
The formation of the spherical solder bumps 13 as shown in FIG.

[0051]

As is apparent from the above description, according to the present invention, a thick film resist is patterned on a transparent glass substrate to form a forward tapered resist pattern, which is used as a semiconductor wafer. Since the reverse transfer is performed, a resist pattern having an inverse taper shape is formed on the semiconductor wafer, and thus a resist pattern having an inverse taper shape having a high height is formed. As a result, the metal layer of lead and tin can be vapor-deposited thickly and adhered, which makes it possible to form high-height bumps on a semiconductor device having a fine electrode pitch. Therefore, it is possible to prevent the situation where the solder bumps are broken, and the reliability of the wiring is improved.

Since the glass substrate is made of a transparent material, the pattern of the semiconductor wafer can be seen through the glass substrate during the reversal transfer, and the alignment of the resist pattern and the semiconductor wafer can be accurately performed. And it can be done easily.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing, in order of steps, an embodiment to which a bump forming method for a semiconductor device according to the present invention is applied, showing a step of applying an adhesive to a glass substrate.

FIG. 2 is a schematic cross-sectional view showing one embodiment in which the bump forming method for a semiconductor device is applied in the order of steps, showing a step of laminating and adhering a heat-resistant transparent sheet.

3A to 3C are schematic cross-sectional views showing, in order of steps, an embodiment to which the bump forming method for a semiconductor device is applied, showing a step of applying a thick film resist.

FIG. 4 is a schematic cross-sectional view showing one embodiment to which the bump forming method for a semiconductor device is applied in the order of steps, showing a step of forming a pattern on a thick film resist.

FIG. 5 is a schematic cross-sectional view showing one embodiment in which the bump forming method for a semiconductor device is applied in the order of steps, showing a state where a thick film resist pattern changes due to resist sag.

FIG. 6 is a schematic cross-sectional view showing one embodiment in which the bump forming method for a semiconductor device is applied, in order of steps, showing a step of reversibly transferring a thick film resist pattern onto a semiconductor wafer.

FIG. 7 is a schematic cross-sectional view showing one embodiment to which the bump forming method for a semiconductor device is applied in the order of steps, showing a step of removing a glass substrate.

FIG. 8 is a schematic cross-sectional view showing, in order of steps, an embodiment to which the bump forming method for a semiconductor device is applied, showing a step of removing a transparent sheet.

FIG. 9 is a schematic cross-sectional view showing one embodiment in which the bump forming method for a semiconductor device is applied, in order of steps, showing a step of forming a barrier metal.

FIG. 10 is a schematic cross-sectional view showing, in order of steps, an embodiment to which the bump forming method for a semiconductor device is applied, showing a step of depositing lead and tin.

FIG. 11 is a schematic cross-sectional view showing, in order of steps, an embodiment to which the bump forming method for a semiconductor device is applied, showing a step of removing a thick film resist.

FIG. 12 is a schematic cross-sectional view showing one embodiment to which the bump forming method for a semiconductor device described above is applied, in order of steps, showing a step of forming solder bumps.

FIG. 13 is a schematic cross-sectional view for explaining a bump forming method of a semiconductor device by a conventional lift-off method, showing a semiconductor wafer having an aluminum oxide film formed on an electrode pad.

FIG. 14 is a schematic cross-sectional view for explaining the conventional bump forming method for a semiconductor device, showing a step of forming a resist.

FIG. 15 is a schematic cross-sectional view for explaining the conventional bump forming method for a semiconductor device, showing a step of forming an opening.

FIG. 16 is a schematic cross-sectional view for explaining the conventional bump forming method for a semiconductor device, showing a step of removing aluminum oxide.

FIG. 17 is a schematic cross-sectional view for explaining the bump forming method for the conventional semiconductor device, showing a step of forming a barrier metal.

FIG. 18 is a schematic cross-sectional view for explaining the conventional bump forming method for a semiconductor device, showing a step of removing a resist.

FIG. 19 is a schematic cross-sectional view for explaining the conventional bump forming method for a semiconductor device, showing a step of forming a barrier metal on an electrode pad.

FIG. 20 is a schematic cross-sectional view for explaining the conventional bump forming method for a semiconductor device, showing a step of applying a resist.

FIG. 21 is a schematic cross-sectional view for explaining the conventional bump forming method for a semiconductor device, showing a step of forming an opening.

FIG. 22 is a schematic cross-sectional view for explaining the bump forming method for the conventional semiconductor device, showing a step of depositing lead and tin.

FIG. 23 is a schematic cross-sectional view for explaining the conventional bump forming method for a semiconductor device, showing a step of removing a resist.

FIG. 24 is a schematic cross-sectional view for explaining the conventional bump forming method for a semiconductor device, showing a state in which a lead and tin layer remains on an electrode pad.

FIG. 25 is a schematic cross-sectional view for explaining the bump forming method for the conventional semiconductor device, showing a step of forming solder bumps.

FIG. 26 is a schematic cross-sectional view for explaining a resist shape when forming a conventional thick film resist pattern, showing a step of exposing the thick film resist.

FIG. 27 is a schematic cross-sectional view for explaining a resist shape when forming a conventional thick film resist pattern, showing a step of forming a resist having an inverse taper shape.

FIG. 28 is a schematic cross-sectional view for explaining a resist shape at the time of forming a conventional thick film resist pattern, showing a state in which a reverse taper shape is changed to a forward taper shape due to resist sag.

FIG. 29 is a schematic cross-sectional view for explaining the relationship of the lift-off method when the resist has a forward taper shape, (a)
Indicates the state of formation of a thick film resist having a forward taper shape,
(B) shows a step of depositing a metal film, and (c) shows a step of dissolving the resist.

FIG. 30 is a schematic cross-sectional view for explaining the relationship of the lift-off method when the resist has an inverse tapered shape, (a)
Indicates the state of formation of an inverse taper-shaped thick film resist,
(B) shows a step of depositing a metal, (c) shows a step of dissolving a resist, and (d) shows a step of forming a metal pattern.

[Explanation of symbols]

 1 Glass Substrate 2 Adhesive 3 Transparent Sheet 4 Thick Film Resist 5 Inverse Tapered Thick Film Resist Pattern 6 Forward Tapered Thick Film Resist Pattern 7 Semiconductor Wafer (Semiconductor Device) 8 Surface Protective Film 9 Electrode Pad (Electrode) 10 Barrier metal 11 Lead (layer) 12 Tin (layer) 13 Solder bump

Claims (2)

[Claims] 1. When a solder bump is formed by a lift-off method using a thick film resist on an electrode portion of a semiconductor device, a thick film resist is patterned on a substrate prepared separately from the semiconductor device, and the semiconductor device is formed. A bump forming method for a semiconductor device, comprising: forming a resist pattern for lift-off by transferring onto a wafer. 2. The bump forming method for a semiconductor device according to claim 1, wherein the substrate is made of a transparent material.