JPH04326595A - Thin-film multilayer circuit board and manufacture thereof - Google Patents

Abstract

PURPOSE:To improve the bonding strength of a solder pad provided on a thin- film multilayer circuit board, and to prevent damages of a conductor pattern layer due to the flow of solder, wherein the circuit board is composed of multilayered conductor pattern layers with a polyimide film sandwiched therebetween as an interlayer dielectric film, and wherein an uppermost layer of the conductor pattern is provided with a solder pad. CONSTITUTION:Multilayered on a substrate 1 are conductor patterns 2 and dielectric layers 3 one over the other, and formed on an uppermost conductor pattern layer 2 are a solder pad 4 and a heat-resistant dielectric resin protective layer 5 which surrounds the solder pad. In a thin-film multilayer circuit board with the foregoing arrangement, the solder pad 4 is constituted of a thin Ni layer 40 which is connected with the uppermost conductor pattern layer 2, a thick Ni layer 41, a gold layer 42, and a solder layer 43. During the manufacture of such a circuit board, the heat resistant dielectric resin protective layer 5 is formed at least prior to the formation of the gold layer 42 of the solder pad 4.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film multilayer circuit board and a method for manufacturing the same. In detail, for the purpose of adhesion stability of the solder pads of a thin film multilayer circuit board in which polyimide resin is multilayered as an interlayer insulating layer and a solder pad is formed on the topmost conductive wiring layer, and to prevent damage to the conductive wiring layer due to solder flow. This invention relates to an improvement in the structure of and a method for manufacturing the same.

0002

BACKGROUND OF THE INVENTION In recent years, the degree of integration of semiconductor integrated circuits and hybrid integrated circuits has increased, and there has been a growing trend toward larger scale.

[0003] Along with this, the circuit boards on which these integrated circuits are mounted are increasingly used as multilayer circuit boards in which conductor circuit patterns are laminated in multiple layers via insulating layers, or double-sided mounting circuit boards. .

In particular, when the degree of integration is high and fine patterns are required, polyimide resin is used as an interlayer insulating film on a ceramic substrate, thin film conductor circuit patterns and thin film resistive elements are arranged, and flip-chip bonding of ICs is performed. Thin-film multilayer circuit boards with solder pads for mounting chip components on the top conductor wiring layer are superior, and are beginning to be used in large electronic computers and high-speed signal transmission modules.

FIG. 3 is a diagram showing an example of a conventional thin film multilayer circuit board and its manufacturing method, and is a cross-sectional view sequentially explaining the main steps. Note that although the figure shows a case where the conductor wiring layer is one layer, it may be understood that the figure shows the uppermost conductor wiring layer and solder pads formed in multiple layers. Further, the figure shows only the solder pad portion, and other conductor wiring patterns and the like are not directly related to the present invention and are therefore omitted for the sake of brevity.

For example, a conductive wiring layer 2 is formed on a substrate 1 such as a ceramic substrate using known film forming techniques and photolithography techniques. As the conductor wiring layer 2, for example, a three-layer film of Cr layer 22/Cu layer 20/Cr layer 21 is formed by continuous sputtering. A resist mask pattern 7'' with a window for forming a solder pad is formed thereon using a known resist pattern forming technique (a)
.

Next, using the resist mask pattern 7'' as a mask, only the third Cr layer 22, which is the uppermost layer of the three-layer conductor wiring layer 2, is etched with, for example, potassium ferricyanide, which is an alkaline etching solution. selectively etched away using a mixed aqueous solution of and sodium hydroxide (b
).

Next, a Ni layer 41' is formed on the surface of the Cu layer 20 exposed by etching away the Cr layer 22 by a known plating method, and then a gold layer 41' having a thickness of less than 1 μm is formed thereon.
2' is formed by the same plating method (c).

Next, the resist mask pattern 7'' is dissolved and removed using a suitable solvent (d). Next, a heat-resistant insulating resin protective layer 5' is applied to the outer periphery of the solder pad forming area to prevent solder from flowing. A polyimide resin film having a thickness of several μm is formed in the arrangement shown in the figure (e).

Finally, a height of 200 μm is formed on the gold layer 42'.
A thin film multilayer circuit board is fabricated by forming a solder layer 43', for example, by fusing small pieces of solder or by performing solder plating to form solder pads (f).

[0011]

[Problems to be Solved by the Invention] However, as explained in detail with reference to FIG. 3, in the conventional thin film multilayer circuit board described above, the third Cr layer 22 of the conductor wiring layer 2 is removed and the exposed Cu layer 20 is removed. After plating a Ni layer 41' and a gold layer 42' on the surface, a heat-resistant insulating resin protective layer 5', such as a polyimide resin film, is formed.

The curing conditions for this polyimide resin film usually require heating at 400°C for about 30 minutes, and the Au on the surface diffuses into the Ni layer, roughening the surface and contaminating it with impurities, causing the solder layer to deteriorate. When forming 43', solder wettability deteriorates. Furthermore, at the position A or B shown in FIG. 3(f), the solder flows and dissolves the Cu layer 20 of the conductive wiring layer 2, increasing the wiring resistance, or
There are serious problems such as wiring peeling, and a solution is required.

[0013]

[Means for Solving the Problems] The above problem is solved in that conductor wiring layers 2 and insulator layers 3 are alternately laminated on a substrate 1, and the uppermost conductor wiring layer 2 has a solder pad 4 and a solder pad 4. In a thin film multilayer circuit board in which a heat-resistant insulating resin protective layer 5 for preventing solder flow is formed on the outer periphery of the pad 4,
The solder pad 4 can be solved by a thin film multilayer circuit board formed of at least a thin Ni layer 40, a thick Ni layer 41, a gold layer 42, and a solder layer 43, to which the solder pad 4 is connected to the top conductor wiring layer 2. .

Specifically, the heat-resistant insulating resin protective layer 5
can be effectively solved by a thin film multilayer circuit board manufacturing method in which the formation of the solder pad 4 is performed at least before the gold layer 42 of the solder pad 4 is formed.

[0015]

[Function] According to the present invention, the heat-resistant insulating resin protective layer 5, for example, a polyimide resin film, is formed at least before the gold layer 42 of the solder pad 4 is formed. Since the upper third Cr layer 22 is not removed, there is no deterioration in solder wettability, and melting failure of the Cu layer 20 due to solder flow is also prevented.

[0016]

[Embodiment] Figure 1 is a sectional view showing an embodiment of the present invention.
) and (2) will be illustrated and explained.

Although the figure shows a case where the conductive wiring layer is one layer, it may be understood that the figure shows the uppermost conductive wiring layer and solder pads formed in multiple layers. Also,
The figure shows only the solder pad portion, and other conductive wiring patterns and the like are not directly related to the present invention and are therefore omitted for the sake of brevity.

In the figure, 4 is a solder pad, 5 is a heat-resistant insulating resin protective layer, 40 is a thin Ni layer, 41 is a thick Ni layer, 4
2 is a gold layer, 43 is a solder layer, and 44 is a Cr layer. Note that the same reference numerals are given to the same parts as those explained in the above drawings, and the explanation of the same parts will be omitted.

Substrate 1, for example, size 95 mm x 11
A heat-resistant insulating resin protective layer 5 having holes in the solder pad formation area is formed on a three-layer film consisting of a Cr layer 22/Cu layer 20/Cr layer 21 formed on a ceramic substrate with a thickness of 4 mm and a thickness of 1 mm. For example, a polyimide resin film is formed.

In the embodiment (1), the Cr layer 2 exposed at the bottom of the hole drilled in the solder pad forming area is
2 with a thickness of 100 nm sputtered, for example.
A Cr layer 44 with a thickness of m and a thin Ni layer 40 with a thickness of 500 nm are provided. The thin Ni layer 40 is plated with a thickness of 2
A thick Ni layer 41 with a thickness of ~5 μm and a gold layer 42 with a thickness of 0.5 μm to 1 μm are laminated, and a solder layer 43 with a height of 100 μm to 300 μm is fused to the top layer to form the solder pad 4 .

As described above, the heat-resistant insulating resin protective layer 5 is first formed on the conductor wiring layer 2. That is, at least the formation of the gold layer 42 of the solder pad 4 is performed by forming the heat-resistant insulating resin protective layer 5, for example, on the conductor wiring layer 2. Since full curing at high temperature is performed after the formation of the polyimide resin film, the surface of the gold layer 42 is kept clean and no deterioration of solder wettability occurs.

Furthermore, the third layer, which is the uppermost layer of the conductor wiring layer 2,
Since the Cr layer 22 of the layer is not removed and the Cr layer 44 and the thin Ni layer 40 are arranged as adhesion layers, melting failure of the Cu layer 20 due to solder flow occurs even when the solder layer 43 is fused. As a result, the yield of the thin film multilayer circuit board with the configuration of this embodiment was significantly improved, with the defective rate being 1/2 or less, and the reliability was improved, compared to conventional products.

In the embodiment (2), the first sputter-formed Cr layer 44 in the case (1) is omitted, and a thin Ni layer is directly formed on the third Cr layer 22 which is the uppermost layer of the conductor wiring layer 2. Although the difference is that the layer 40 is formed, the effect is almost the same, and there is an advantage that the process is shortened and the cost is reduced because the Cr layer 44 is not formed.

In each of the above embodiments, the conductor wiring layer 2 is formed on the substrate 1, that is, the conductor wiring layer is one layer. Needless to say, the same applies to the thin film multilayer circuit board forming the pad 4.

An example of a specific method for manufacturing the thin film multilayer circuit board of the present invention will be illustrated and explained below in the order of the main steps. FIG. 2 is a diagram showing an example of a manufacturing method according to an embodiment of the present invention.

In the figure, 3 is an interlayer insulating layer, 210 is a contact hole connecting the conductor wiring layers 2 above and below the interlayer insulating layer 3, 7 is a resist mask pattern, and 200 is a conductive metal film. Note that the same reference numerals are given to the same parts as those explained in the above drawings, and the explanation of the same parts will be omitted.

Step (a): For example, a ceramic substrate with a size of 95 mm x 114 mm and a thickness of 1 mm is used as the substrate 1, and the first conductive wiring layer 2 is formed on it in a predetermined wiring pattern. It is formed using a known photoresist work and exposure/etching technology.

The structure of the conductor wiring layer 2 is a Cr layer (thickness 200 mm).
nm)/Cu layer (thickness 5 μm)/Cr layer (thickness 200 nm)
This is a film in which a three-layer film consisting of m) is formed by a continuous sputtering method. On top of that, an interlayer insulating layer 3 with a thickness of, for example, 10
A photosensitive polyimide resin layer of approximately μm size is spin-coated, and if necessary, holes that will become contact holes are formed using known exposure methods.
It is formed by development processing.

[0029] Then, a Cr layer (thickness 200 nm
)/Cu layer (thickness 5 μm)/Cr layer (thickness 200 nm)
A conductive metal film 200 consisting of three layers is formed by a continuous sputtering method. At this time, the conductive metal film 200 and the conductive wiring layer 2 are connected to each other through the hole which becomes the contact hole, and a contact hole 210 is formed.

Step (b): A resist mask pattern 7 is formed on the treated substrate using a known photoresist work and exposure/etching technique to form a predetermined wiring pattern.

Step (c): Using the resist mask pattern 7 as a mask, the processed substrate is etched using a known etching technique to form a second conductive wiring layer 2. Step (d): A photosensitive polyimide resin layer having a thickness of 3 to 10 μm, for example, is spin-coated as the heat-resistant insulating resin protective layer 5 on the treated substrate. And 90℃, 5
After prebaking for about a minute, a hole with a size of, for example, 40 μm, which will be the area where the solder pad will be formed, is formed on the predetermined conductor wiring layer 2 by a known exposure and development process, and heated at 400° C. for about 30 minutes. Perform a full cure.

Step (e): A Cr layer 44 with a thickness of 100 nm and a thin Ni layer 40 with a thickness of 500 nm, for example, are formed by continuous sputtering on the above-mentioned treated substrate. At this time, the uppermost Cr layer of the conductor wiring layer 2 exposed at the bottom of the hole where the solder pad of the heat-resistant insulating resin protective layer 5 is formed, and the thin two-layer film of Ni layer 40/Cr layer 44 are electrically connected. Step (f): After forming a resist mask pattern 7' with a window in which a predetermined solder pad 4 is formed using a known photoresist work and exposure/etching technique on the above-mentioned treated substrate, for example, A thick Ni layer 41 with a thickness of 2 to 5 μm and an Au layer 42 with a thickness of 0.5 to 1 μm,
For example, it is formed by a known plating method.

[0033] Then, a height of 100 to 30 mm is formed on the gold layer 42.
A solder layer 43 of 0 μm is formed, for example, by fusing small pieces of solder or by solder plating to form the solder pads 4 . Step (g): Finally, the resist mask pattern 7 is dissolved and removed using a suitable solvent to produce the thin film multilayer circuit board of the present invention.

In the above embodiment, the case where the conductor wiring layer 2 has two layers has been illustrated and described, but it goes without saying that cases where the conductor wiring layer 2 has three or more layers can be manufactured in the same manner. Note that the above embodiments are merely examples, and it goes without saying that the present invention may be realized using other similar materials, processes, or combinations thereof, as long as they do not go against the spirit of the present invention. It is.

[0035]

As explained above, according to the present invention, at least before forming the gold layer 42 of the solder pad 4, the heat-resistant insulating resin protective layer 5, for example, a polyimide resin film, is formed. Furthermore, since the third Cr layer 22, which is the top layer of the conductor wiring layer 2, is not removed, there is no deterioration in solder wettability, and melting failure of the Cu layer 20 due to solder flow is also prevented. This greatly contributes to improving the yield, quality, and reliability of thin-film multilayer circuit boards.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing an embodiment of the present invention.

FIG. 2 is a diagram showing an example of a manufacturing method according to an embodiment of the present invention.

FIG. 3 is a diagram showing an example of a conventional thin film multilayer circuit board and its manufacturing method.

[Explanation of symbols] 1 is a substrate, 2 is a conductor wiring layer, 3 is an interlayer insulating layer, 4 is a solder pad, 5 is a heat-resistant insulating resin protective layer, 7, 7' is a resist mask pattern, 20 is a Cu layer, 21 , 22, 44 are Cr layers, 40 is a thin Ni layer, 41 is a thick Ni layer, 42 is a gold layer, 43 is a solder layer, 200 is a conductive metal film, 210 is a contact hole,

Claims (2)

[Claims] 1. A conductor wiring layer (2) and an insulator layer (3) are alternately laminated on a substrate (1), and the uppermost conductor wiring layer (2) is provided with a solder pad (4) and an insulator layer (3). Solder pad (
4) A thin film multilayer circuit board having a heat-resistant insulating resin protective layer (5) for preventing solder flow formed on the outer periphery of the circuit board, wherein the solder pad (4) is attached to the uppermost conductive wiring layer (2). A thin film multilayer circuit board characterized in that it is formed of at least a thin Ni layer (40), a thick Ni layer (41), a gold layer (42), and a solder layer (43) that are connected. 2. The formation of the heat-resistant insulating resin protective layer (5) includes at least the gold layer (42) of the solder pad (4).
2. The method for manufacturing a thin film multilayer circuit board according to claim 1, wherein the step is performed before forming the thin film multilayer circuit board.