JPH0817486B2 - Video area detection circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for receiving a MUSE signal, and more particularly to a device for receiving a sampled MUS signal.
The present invention relates to a moving image area detection circuit that detects a motion of image data of an E signal and restores a video signal. At present, high-definition broadcasting is in the midst of experimental broadcasting, and receivers for receiving this broadcasting are under development. To spread high-definition broadcasting receivers for home use, However, there is a need to develop cheap and high-performance equipment.

[0002]

2. Description of the Related Art In a conventional moving image area detection circuit, as shown in FIG. 6, a MUSE video signal converted into a digital signal input through an input terminal 35 is branched and the first branch is made. Is input to the 2 frame memory 36, and the frame memory 45 inside the 2 frame memory 36
Then, the input is delayed by one frame and output, and the adder 37
, And outputs a signal delayed by two frames from the frame memory 46 inside the two-frame memory 36 and inputs it to the adder 38, and the adder 37 and the adder 38 add the signal via the input terminal 35, respectively. The current frame data of the obtained MUSE video signal is subjected to arithmetic processing, the adder 37 detects the difference between the current frame data and the frame data of one frame before, and the adder 38 detects the difference between the current frame data and 2 frames.
The difference from the frame data before the frame is detected, and the absolute value detection circuits 39 and 40 take the absolute value of each difference and input it to the minimum value detection circuit 41. A value is detected and the minimum value of the difference is input to the temporal filter configured by the frame memory 42 and the maximum value detection circuit 43. Then, the maximum value is detected, the same detection signal is output as a moving image area detection signal, and the outputs of the still image processing circuit and the moving image processing circuit are mixed based on this output to restore the video signal.

[0003]

Therefore, since the two-frame memory 36 and the temporal filter are used, there has been a problem that the circuit scale becomes large and the circuit becomes complicated. It is an object of the present invention to detect a moving image area with a simple circuit configuration and a small circuit scale.

[0004]

FIG. 1 is a block diagram of an electric circuit of a main part of a video signal processing circuit of MUSE showing an embodiment of the present invention. As shown in FIG. The data input circuit is branched, one of the branched signals is input to the horizontal interpolation filter 3, the horizontal interpolation filter 3 interpolates and outputs pixel data in the horizontal direction, and the pixel data is input to the adder 6. The adder 6 takes the difference between the output of the horizontal interpolation filter 3 and the previous frame data and outputs it to the absolute value detection circuit 7. The absolute value detection circuit 7 takes the absolute value of the output of the adder 6. Is input to the first filter circuit 9, and the other branched one is input to the vertical interpolation filter 4. The vertical interpolation filter 4 interpolates and outputs pixel data in the vertical direction, and inputs the pixel data to the adder 5. , The same adder 5 outputs the output of the vertical interpolation filter 4 The difference from the data is output and input to the absolute value detection circuit 8, the absolute value of the output of the adder 5 is taken by the absolute value detection circuit 8, and the absolute value is input to the first filter circuit 9. The circuit 9 takes the minimum value of both inputs and outputs it as pixel motion amount data. Based on the output, the detector 11 converts it to a plurality of levels of static level signals and outputs it, and the still image processing circuit 13 outputs the same. And video processing circuit 1
The video signal is restored by changing the mixing ratio of the outputs of FIG.

[0005]

According to the present invention, with the above-described structure, the motion detection is performed for each pixel, and the detector 11 outputs the motion detection signal as a signal of a plurality of stages of static level according to the motion detection signal. M
The USE video signal is quantized as an 8-bit digital signal and input to the video signal processing circuit shown in FIG. 1. The input is subjected to field interpolation by the horizontal interpolation filter 3 and the vertical interpolation filter 4. Current frame data, and the motion amount of each pixel is detected by calculating the difference between the previous frame data obtained by branching the input MUSE video signal and delaying it by 1 frame in the frame memory 12 and the current frame data. The detection signal is also detected as an 8-bit digital signal. The detector 11 forms a gate circuit with an AND circuit and an OR circuit, and when an 8-bit motion detection signal shown in the right column of the truth table of Table 1 is input, it outputs 3 as shown in the left column of Table 1. A digital signal indicating a still level of 5 stages of bits is output. In Table 1, [-] indicates that either 1 or 0 is acceptable.

[0006]

The 8-bit motion detection signal is 0010,000
When it is 0 or more, it is set as the static level 0, and when it is less than 00100000 and when it is 010,000 or more, it is set as the static level 1,
If it is less than 00010000 or 00001000 or more, it is set as the static level 2, and less than 00001000, 00000
When it is 100 or more, the static level is 3 and 0000010.
When it is less than 0, the static level is set to 4, the static level signal is output as a 3-bit digital signal, and the mixing ratio of the outputs of the still image processing circuit 13 and the moving image processing circuit 14 is changed based on the output. For example, the still level 0 is a pixel with large movement, and the output of the moving image processing circuit 14 is 100%,
The still level 4 is a pixel having no motion, the output of the still image processing circuit 13 is 100%, and in the case of the still level 1 to the still level 3, the mixing ratio of the outputs of the still image processing circuit 13 and the moving image processing circuit 14 is intermediate. As the value of, the video signal is restored.

[0008]

FIG. 1 is a block diagram of a main electric circuit of a MUSE video signal processing circuit showing an embodiment of the present invention.
Is an input terminal of the video signal processing circuit, to which a video signal of MUSE quantized into an 8-bit digital signal is input. The input is branched to input the first to the moving image area detection circuit 2 and 2 is input to the frame memory 12 and the third
Is input to the still image processing circuit 13 and the fourth is input to the moving image processing circuit 1.
I am typing in 4. In the frame memory 12, the input signal is delayed by one frame and input to the moving image area detection circuit 2 and the still image processing circuit 13. In the still image processing circuit 13, the input current frame data and previous frame data are converted into data. Interpolation between frames is performed and input to the mixing circuit 15. The moving image processing circuit 14 performs the field interpolation and inputs it to the mixing circuit 15, and the digital signal indicating the 3-bit five-step still level detected by the moving image region detection circuit 2 is input to the mixing circuit 15. In the mixing circuit 15, the still image processing circuit 13 receives the still level signal.
And the output of the moving image processing circuit 14 are mixed to restore the video signal.

FIG. 2 is an electric circuit block diagram of the moving picture area detecting circuit 2 showing one embodiment of the present invention. Reference numeral 19 is an input terminal of the moving picture area detecting circuit 2 for branching the input circuit of the current frame data. , The branched one is input to the horizontal interpolation filter 3. The horizontal interpolation filter 3 branches the input, inputs one to the adder 21 directly, and inputs the other to the delay circuit 20. The delay circuit 20 outputs the clock pulse used for quantization of the MUSE video signal. It is input to the adder 21 with a delay of one clock period. Adder 2
In the case of 1, the data directly input and the data delayed by one clock period are added and output to be input to the multiplier 22, and the multiplier 22 multiplies by 1/2 to output the pixel in the horizontal direction. I try to interpolate the data. The other branching input circuit of the current frame data is input to the vertical interpolation filter 4, and the vertical interpolation filter 4 branches the input and inputs one directly to the adder 24,
The other is input to the delay circuit 23, and the delay circuit 23 inputs the MUS.
The video signal of E is delayed by one horizontal scanning period and input to the adder 24. In the adder 24, the directly input data and the data delayed by one horizontal scanning period are added and output to be input to the multiplier 25.
The pixel data is interpolated in the vertical direction by multiplying and outputting.

FIG. 3A is a pattern diagram in which the pixel data of the current frame is interpolated. In the horizontal interpolation filter 3, for example, a pixel 5 is calculated between pixels to form a pixel 5 between the pixels. The vertical interpolation filter 4 calculates from the pixels and the pixel 6 is interpolated between the pixels to perform the arithmetic processing on the pixel data of all frames. ing.
Reference numeral 26 in FIG. 2 denotes an input terminal for the previous frame data delayed by one frame in the frame memory 12, inputs the previous frame data to the adders 5 and 6, and the adder 5 uses the vertical interpolation filter 4 in the vertical direction. Interpolated into, for example, FIG.
The difference between the pixel 6 shown in (A) and the pixel 7 shown in the sampling pattern diagram of the previous frame in the same frame in FIG. 7B is detected, and the adder 6 similarly uses a horizontal interpolation filter. 3 horizontally interpolated in FIG. 3, eg FIG.
The difference between the pixel 5 shown in FIG. 4 and the pixel 7 shown in the sampling pattern diagram of the previous frame in the same frame of FIG. 7B is detected, and the difference detection signals are respectively detected by the absolute value detection circuits 8 and 7. Are typing in. Adder 5 and adder 6 for detecting the difference between the previous frame data and the current frame data
Is adapted to detect a difference signal between both inputs by converting one input into a complement and adding the other input.

The absolute value detection circuits 8 and 7 respectively take the absolute value of the difference detection signal and input it to the first filter circuit 9. The first filter circuit 9 takes the minimum value of the input difference detection signal and outputs it as a motion detection signal for each pixel. In order to detect motion for each pixel, field interpolation and data processing between frames are performed. In order to prevent data switching noise, the output from the first filter circuit 9 is input to the second filter circuit 10. The second filter circuit 10 applies a non-linear filter to the motion detection signal. In the second filter circuit 10, the input of the motion detection signal from the first filter circuit 9 is branched so that one of the inputs is the third
Input to the filter circuit 27, the other to the fourth filter circuit 2
I am typing in 8. The third filter circuit 27 detects the minimum value from three pieces of motion amount data that are sequentially adjacent in the horizontal direction, and sets the minimum value as the motion amount data of the first pixel of the three adjacent pieces, and FIG. (Horizontal 3-MI
FIG. 9B is a diagram for explaining the operation of N), and when three pieces of movement amount data that are adjacent in the horizontal direction are, for example, 2, 6, 1 as shown in FIG. Thus, if three pieces of movement amount data that are adjacent in the next horizontal direction are, for example, 6, 1, 0, 0 is output as the movement amount data of the first pixel, and all the pieces in the horizontal direction are sequentially output. The pixel motion amount data is arithmetically processed.

The fourth filter circuit 28 detects the minimum value from two pieces of motion amount data that are vertically adjacent to each other, and sets the minimum value as the motion amount data of the first pixel of the two adjacent pieces.
(B) is an explanatory view of the operation of the fourth filter 28 (vertical 2-MIN), and when two pieces of motion amount data that are vertically adjacent to each other are, for example, 2, 0 as shown in FIG. 0 is output as the motion amount data of, and when the next two motion amount data adjacent in the vertical direction are 0 and 3, for example, 0 is output as the motion amount data of the first pixel, The motion amount data of all pixels in the vertical direction are sequentially processed. The motion amount data calculated by the third filter circuit 27 and the fourth filter circuit 28 is input to the fifth filter circuit 29, and the motion amount data of each pixel in the fifth filter circuit 29 is compared with the horizontal direction. Of the data calculated in the vertical direction, the maximum value is output and output as motion amount data to the sixth filter circuit 30 except for isolated points protruding from the surroundings.

The sixth filter circuit 30 detects the maximum value from four pieces of movement amount data that are adjacent in the horizontal direction in order, and uses it as the movement amount data of the first pixel of the four adjacent pieces.
FIG. 5 is a diagram for explaining the operation of the sixth filter 30 (horizontal 4-MAX). As shown in FIG.
When one motion amount data is 1, 0, 0, 0, 1 is output as the motion amount data of the first pixel, and four motion amount data that are adjacent in the next horizontal direction are 0, If the values are 0, 0 and 3, 3 is output as the motion amount data of the first pixel, and the motion amount data of all pixels in the horizontal direction are sequentially processed to obtain the third filter circuit 27 and the fourth filter circuit 27. The motion area narrowed by the filter circuit 28 is expanded. The output from the sixth filter circuit 30 is input to the detector 11, and the motion amount data of the pixel input by the detector 11 is output via the output terminal 31 as a five-step static level signal, as shown in FIG. The still image processing circuit 1 is input to the mixing circuit 15 and supplied with a still level signal.
3 and the output of the moving image processing circuit 14 are mixed to restore the video signal.

[0014]

As described above, according to the present invention, it is possible to detect the movement of the pixel by performing the arithmetic processing on the pixel of the image data of the MUSE signal which is sampled and transmitted. As compared with the method using the 2-frame memory and the temporal filter, the circuit size can be reduced with a simple circuit configuration, and an economical MUSE signal receiver can be provided.

[Brief description of drawings]

FIG. 1 is a block diagram of an essential electric circuit of a video signal processing circuit of MUSE showing an embodiment of the present invention.

FIG. 2 is an electric circuit block diagram of a moving image area detection circuit showing one embodiment of the present invention.

3A is a pattern diagram in which pixel data of a current frame is interpolated, and FIG. 3B is a sampling pattern diagram of a previous frame.

FIG. 4A shows a third filter 27 (horizontal 3-MI).
N) is an operation explanatory view, and FIG. 6B is an operation explanatory view of the fourth filter 28 (vertical 2-MIN).

5 is an explanatory view of the operation of the sixth filter 30 (horizontal 4-MAX) of FIG.

FIG. 6 is a block diagram of an electric circuit of a conventional moving image area detection circuit.

[Explanation of symbols]

 1 Input Terminal 2 Video Area Detection Circuit 3 Horizontal Interpolation Filter 4 Vertical Interpolation Filter 5 Adder 6 Adder 7 Absolute Value Detection Circuit 8 Absolute Value Detection Circuit 9 1st Filter 10 2nd Filter 11 Detector 12 Frame Memory 13 Stationary Image processing circuit 14 Video processing circuit 15 Mixing circuit 16 Output terminal 20 Delay circuit 21 Adder 22 Multiplier 23 Delay circuit 24 Adder 25 Multiplier 26 Input terminal 27 Third filter 28 Fourth filter 29 Fifth filter 30 Sixth filter 31 output terminal 35 input terminal 36 2 frame memory 37 adder 38 adder 39 absolute value detection circuit 40 absolute value detection circuit 41 minimum value detection circuit 42 frame memory 43 maximum value detection circuit 44 output terminal 45 frame memory 46 frame memory

Claims (2)

[Claims] 1. An input circuit for the current frame data of a MUSE video signal is branched, one of the branched signals is input to a horizontal interpolation filter, and the horizontal interpolation filter interpolates and outputs pixel data in the horizontal direction. Input to the first adder, the first adder calculates the difference between the output of the horizontal interpolation filter and the previous frame data, outputs the difference, and inputs the difference to the first absolute value detection circuit. , The absolute value of the output from the first adder is input to the first filter circuit, the other branched one is input to the vertical interpolation filter, and the vertical interpolation filter is used to insert pixel data in the vertical direction. And outputs the result to the second adder. The second adder takes the difference between the output of the vertical interpolation filter and the previous frame data, outputs the difference, and inputs the difference to the second absolute value detection circuit. The absolute value detection circuit calculates the absolute value of the output of the second adder. Then, it is input to the first filter circuit, the minimum value of the both inputs is taken by the first filter circuit, and is output as pixel motion amount data, and based on the output, a detector converts it into a plurality of stages of static level signals. A moving image area detection circuit, which outputs the output. 2. An output circuit for the pixel motion amount data output from the first filter circuit is branched, and one of the branched circuits is input to a third filter circuit, and the third filter circuit is used in the horizontal scanning direction. The minimum value is detected from three pieces of movement amount data that are adjacent to each other in order, and the minimum value is input to the fifth filter circuit as the movement amount data of the right end of the three pieces of movement amount data, and the other branched one is the fourth filter circuit. Type in
The fourth filter circuit detects a minimum value from two pieces of movement amount data that are sequentially adjacent in the vertical scanning direction, and inputs the minimum value to the fifth filter circuit as the movement amount data of the upper part of the two pieces of movement amount data. , The fifth filter circuit detects the maximum value of both inputs and outputs it to the sixth filter circuit,
The sixth filter circuit detects the maximum value from four movement amount data that are sequentially adjacent in the horizontal scanning direction and outputs the maximum value as the right end movement amount data of the four movement amount data, and the same output is detected. 2. The moving image area detecting circuit according to claim 1, wherein the moving image area detecting circuit inputs the signal to a measuring device, converts the signal into a plurality of stages of static level signals and outputs the signal.