JPH04293382A - Moving picture area detection circuit - Google Patents

Abstract

PURPOSE:To decode a video signal by using the moving picture area detection circuit whose circuit scale is made small so as to detect the movement as to a picture data of a MUSE signal. CONSTITUTION:A an input of a picture element data of a current frame is branched, one is given to a horizontal insertion filter 3, in which a picture element data is inserted in the horizontal direction, an adder 6 takes a difference between an output of the horizontal insertion filter 3 and a preceding frame data, an absolute value detection circuit 7 takes an absolute value of the difference, it is inputted to a 1st filter circuit 9, the other branched input is given to a vertical insertion filter 4, in which a picture element data is inserted in the vertical direction, an adder 5 takes a difference between an output of the vertical insertion filter 4 and a preceding frame data, an absolute value detection circuit 8 takes an absolute value of the difference, it is inputted to the 1st filter circuit 9, the 1st filter circuit 9 takes a minimum value of both the inputs to obtain a movement data of the picture element and a detector 11 converts the data into a still level signal of plural steps and outputs the result, a mixture ratio between a still picture and a moving picture is changed based on the output to decode the video signal.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to a device for receiving MUSE signals, and in particular, the present invention relates to equipment for receiving MUSE signals, and in particular,
The present invention relates to a moving image area detection circuit that performs motion detection on image data of an E signal to restore a video signal. Currently, experimental broadcasting is being conducted regarding high-definition broadcasting, and the development of receivers to receive this broadcasting is progressing. There is a need to develop equipment that is inexpensive and has good performance.

0002

2. Description of the Related Art In a conventional moving image area detection circuit, as shown in FIG. is inputted into the 2-frame memory 36, the input is delayed by one frame in the frame memory 45 inside the 2-frame memory 36, and outputted and inputted to the adder 37, and then input into the frame memory 45 inside the 2-frame memory 36. 46 outputs a signal delayed by two frames and inputs it to an adder 38, and the adders 37 and 38 each perform arithmetic processing with the current frame data of the MUSE video signal added via the input terminal 35, The adder 37 detects the difference between the current frame data and the frame data one frame before, the adder 38 detects the difference between the current frame data and the frame data two frames before, and the absolute value detection circuit 39 and 40, the absolute value of each difference is taken and input to the minimum value detection circuit 41, the minimum value detection circuit 41 detects the minimum value of each difference, and the minimum value of the difference is sent to the frame memory 42 for maximum value detection. The signal is input to a temporal filter configured by a circuit 43, which detects the maximum value from the minimum difference value of the previous frame and the minimum value of the difference of the current frame, and outputs the detection signal as a moving image area detection signal. However, based on the same output, the outputs of the still image processing circuit and the video processing circuit were mixed to restore the video signal.

0003

[Problems to be Solved by the Invention] Therefore, since the two-frame memory 36 and the temporal filter are used, there are problems in that the circuit scale becomes large and the circuit becomes complicated. An object of the present invention is to detect a moving image area with a simple circuit configuration and a small circuit scale.

0004

[Means for Solving the Problems] FIG. 1 is a block diagram of a main part of a MUSE video signal processing circuit showing an embodiment of the present invention. The data input circuit is branched, one of the branches is input to the horizontal interpolation filter 3, which interpolates the pixel data in the horizontal direction, outputs it, and inputs it to the adder 6. An adder 6 calculates the difference between the output of the horizontal interpolation filter 3 and the previous frame data, outputs the difference, and inputs it to an absolute value detection circuit 7. The absolute value detection circuit 7 calculates the absolute value of the output of the adder 6. The pixel data is inputted to the first filter circuit 9, and the other branched signal is inputted to the vertical interpolation filter 4, which interpolates the pixel data in the vertical direction, outputs it, and inputs it to the adder 5. , the adder 5 calculates the difference between the output of the vertical interpolation filter 4 and the previous frame data, outputs it and inputs it to the absolute value detection circuit 8, and the absolute value detection circuit 8 calculates the absolute value of the output of the adder 5. is inputted to the first filter circuit 9, the first filter circuit 9 takes the minimum value of both inputs and outputs it as pixel movement amount data, and based on the output, the detector 11 calculates the static level in multiple stages. It is converted into a signal and outputted, and the same output is used by the still image processing circuit 13 and the video processing circuit 14.
The video signal is restored by changing the mixing ratio of the output.

[0005]

According to the present invention, with the above-described configuration, motion is detected for each pixel, and the motion detection signal is outputted by the detector 11 as a signal of a plurality of still levels. M
The USE video signal is quantized as an 8-bit digital signal and input to the video signal processing circuit shown in FIG. The amount of movement for each pixel is detected by taking the difference between the current frame data and the previous frame data, which is obtained by branching the input MUSE video signal and delaying it by one frame in the frame memory 12. The detection signal is also detected as an 8-bit digital signal. The detector 11 constitutes a gate circuit with an AND circuit and an OR circuit, and when the 8-bit motion detection signal shown in the right column of the truth table of Table 1 is input, the 3 bits shown in the left column of Table 1 are output. A digital signal indicating five levels of bit static is output. In Table 1, [-] indicates that it can be either 1 or 0.

[0006]

[0007] The 8-bit motion detection signal is 0010000.
If it is 0 or more, the static level is 0, if it is less than 00100000, and if it is 00010000 or more, it is the static level 1.
If it is less than 00010000 and more than 00001000, it is considered as static level 2, and less than 00001000, 00000
If it is 100 or more, it is set to static level 3 and 0000010
If it is less than 0, the still level is set to 4, and the still level signal is output as a 3-bit digital signal, and the mixing ratio of the outputs of the still image processing circuit 13 and the moving image processing circuit 14 is changed based on the output. For example, a still level of 0 is a pixel with large movement, and the output of the video processing circuit 14 is set to 100%.
Still level 4 is a pixel with no movement, and the output of still image processing circuit 13 is set to 100%, and in the case of still level 1 to still level 3, the mixing ratio of the outputs of still image processing circuit 13 and moving image processing circuit 14 is set to an intermediate level. The video signal is restored using the value of .

[0008]

[Embodiment] FIG. 1 is a block diagram of the main part of the video signal processing circuit of MUSE showing one embodiment of the present invention.
is an input terminal of the video signal processing circuit, into which the MUSE video signal quantized into an 8-bit digital signal is input, the input is branched, the first is input to the video area detection circuit 2, and the first is input to the video area detection circuit 2. 2 into the frame memory 12, and the third
is input to the still image processing circuit 13, and the fourth is input to the video processing circuit 1.
4 is entered. In the frame memory 12, the input signal is delayed by one frame and inputted to the moving image area detection circuit 2 and the still image processing circuit 13. Interframe interpolation is performed and the interpolation is input to the mixing circuit 15. The moving image processing circuit 14 performs field interpolation and inputs the result to the mixing circuit 15, and the digital signal indicating the 3-bit still level in 5 stages detected by the moving image area detection circuit 2 is input to the mixing circuit 15. The mixing circuit 15 uses the still image processing circuit 13 according to the still level signal.
The video signal is restored by mixing the output of the video processing circuit 14 and the output of the video processing circuit 14.

FIG. 2 is an electric circuit block diagram of a moving image area detecting circuit 2 showing an embodiment of the present invention, and 19 is an input terminal of the moving image area detecting circuit 2, which branches the input circuit for the current frame data. , one of the same branches is input to the horizontal interpolation filter 3. The horizontal interpolation filter 3 branches the input, inputs one directly to the adder 21, and inputs the other to the delay circuit 20, which outputs the clock pulse used for quantizing the video signal of MUSE. The signal is input to the adder 21 with a delay of one clock period. Adder 2
1, the directly input data and the data delayed by one clock period are added and outputted, inputted to the multiplier 22, multiplied by 1/2 by the same multiplier 22, and outputted to form pixels in the horizontal direction. I am trying to interpolate the data. The other branched input circuit for the current frame data is input to the vertical interpolation filter 4, and the vertical interpolation filter 4 branches the input, inputs one directly to the adder 24, and delays the other. Input to circuit 23 and MUSE in the same delay circuit 23
The adder 2 is delayed by one horizontal scanning period of the video signal.
4 is entered. The adder 24 adds the directly input data and the data delayed by one horizontal scanning period, outputs the result, inputs the result to the multiplier 25, multiplies it by 1/2, and outputs the vertical data. The pixel data is interpolated in the direction.

FIG. 3A is a pattern diagram in which pixel data of the current frame is interpolated, and the horizontal interpolation filter 3 calculates, for example, from pixels ■ and pixels ■ to determine pixel ■ and pixel ■.
The vertical interpolation filter 4 calculates from pixel ■ and pixel ■ to interpolate pixel 5 between pixel ■ and pixel ■.
By interpolating pixel 6 between the two frames, the pixel data of all frames are subjected to arithmetic processing. Reference numeral 26 in FIG. 2 is an input terminal for the previous frame data delayed by one frame in the frame memory 12, and the previous frame data is inputted to the adders 5 and 6. In the adder 5, the vertical interpolation filter 4 For example, Figure 3 (
The difference between the pixel 6 shown in A) and the pixel 7 shown in the sampling pattern diagram of the previous frame in FIG. For example, the difference between pixel 5 shown in FIG. 3(A) interpolated in the horizontal direction and pixel 7 shown in the sampling pattern diagram of the previous frame in FIG. and the difference detection signals are input to absolute value detection circuits 8 and 7, respectively. Adders 5 and 6 detect the difference between previous frame data and current frame data.
By converting one input into a complement and adding it to the other input, a difference signal between both inputs is detected.

The absolute value detection circuits 8 and 7 each take the absolute value of the difference detection signal and input it to the first filter circuit 9. The first filter circuit 9 takes the minimum value of the input difference detection signal and outputs it as a motion detection signal for each pixel. In order to perform motion detection for each pixel, intra-field interpolation and inter-frame data processing are performed, and to prevent data switching noise, the output from the first filter circuit 9 is input to the second filter circuit 10. , the second filter circuit 10 applies a nonlinear filter to the motion detection signal. The second filter circuit 10 branches the input of the motion detection signal from the first filter circuit 9 and sends one to the third filter circuit.
input to the filter circuit 27, and the other input to the fourth filter circuit 2.
8 is entered. The third filter circuit 27 sequentially detects the minimum value from three adjacent motion amount data in the horizontal direction, and uses it as the motion amount data of the first pixel among the three adjacent ones. (Horizontal 3-MIN
), and as shown in the figure, if three horizontally adjacent motion amount data are, for example, 2, 6, and 1, 1 is output as the motion amount data of the first pixel. Then, if the next three horizontally adjacent motion amount data are, for example, 6, 1, and 0, 0 is output as the motion amount data of the first pixel, and all pixels in the horizontal direction are sequentially output. The amount of movement data is calculated.

The fourth filter circuit 28 detects the minimum value from two pieces of vertically adjacent motion amount data, and uses the detected minimum value as the motion amount data of the first pixel of the two adjacent ones, as shown in FIG.
(B) is an explanatory diagram of the action of the fourth filter 28 (vertical 2-MIN), and as shown in the figure, when two vertically adjacent motion amount data are, for example, 2 and 0, the first pixel If the next two vertically adjacent motion amount data are, for example, 0 and 3, 0 is output as the motion amount data of the first pixel, The motion amount data of all pixels in the vertical direction are sequentially processed. The motion amount data processed by the third filter circuit 27 and the fourth filter circuit 28 are input to the fifth filter circuit 29, and the motion amount data of each pixel is analyzed in the horizontal direction and the fifth filter circuit 29. Among the data calculated in the vertical direction, the maximum value is taken and outputted, and isolated points that stand out from the surroundings are removed as motion amount data, and the data is input to the sixth filter circuit 30.

[0013] The sixth filter circuit 30 detects the maximum value from four horizontally adjacent pieces of motion amount data, and uses the detected maximum value as the motion amount data of the first pixel among the four adjacent pixels.
FIG. 5 is an explanatory diagram of the action of the sixth filter 30 (horizontal 4-MAX), and as shown in the figure, four adjacent filters in the horizontal direction are
For example, if the motion amount data of the first pixel is 1, 0, 0, 0, 1 is output as the motion amount data of the first pixel, and the next four adjacent motion amount data in the horizontal direction are, for example, 0, 0, If the values are 0, 0, 3, 3 is output as the motion amount data of the first pixel, and the motion amount data of all pixels in the horizontal direction are sequentially processed, and the third filter circuit 27 and the fourth The motion area narrowed by the filter circuit 28 is expanded. The output from the sixth filter circuit 30 is input to the detector 11, and the pixel motion amount data input by the detector 11 is outputted as a five-level still level signal through the output terminal 31, as shown in FIG. The still image processing circuit 1 is inputted to the mixing circuit 15 and processed by the still level signal.
3 and the output of the moving image processing circuit 14 are mixed to restore the video signal.

[0014]

[Effects of the Invention] As explained above, according to the present invention, by performing arithmetic processing on the pixels of the image data of the MUSE signal that is sampled and transmitted, it is possible to detect the movement of pixels, which is different from the conventional method. Compared to a method using a two-frame memory or a temporal filter, the circuit structure can be simplified and the circuit size can be reduced, and an economical MUSE signal receiver can be provided.

[Brief explanation of drawings]

FIG. 1 is an electrical circuit block diagram of a main part of a video signal processing circuit of MUSE showing an embodiment of the present invention.

FIG. 2 is an electric circuit block diagram of a moving image area detection circuit showing an embodiment of the present invention.

FIG. 3A is a pattern diagram of interpolated pixel data of the current frame, and FIG. 3B is a sampling pattern diagram of the previous frame.

[Fig. 4] Figure (A) shows the third filter 27 (horizontal 3-MIN
) is an explanatory diagram of the action of the fourth filter 28 (vertical 2
-MIN) is an action explanatory diagram.

FIG. 5 is an explanatory diagram of the operation of the sixth filter 30 (horizontal 4-MAX) in FIG. 2;

FIG. 6 is an electric circuit block diagram of a conventional moving image area detection circuit.

[Explanation of symbols]

1 Input terminal 2 Video area detection circuit 3 Horizontal interpolation filter 4 Vertical interpolation filter 5 Adder 6 Adder 7 Absolute value detection circuit 8 Absolute value detection circuit 9 First filter 10 Second filter 11 Detector 12 Frame memory 13 Still image processing circuit 14 Video processing circuit 15 Mixed circuit 16 Output terminal 20 Delay circuit 21 Adder 22 Multiplier 23 Delay circuit 24 Adder 25 Multiplier 26 Input terminal 27 Third filter 28 4th filter 29 5th filter 30 6th filter 31 Output terminal 35 Input terminal 36 2 frame memory 37 Adder 38 Adder 39 Absolute value detection circuit 40 Absolute value detection circuit 41 Minimum value detection circuit 42 Frame memory 43 Maximum value detection circuit 44 Output terminal 45 Frame memory 46 Frame memory

Claims (2)

[Claims] Claim 1: An input circuit for current frame data of a MUSE video signal is branched, one of the branches is input to a horizontal interpolation filter, and the horizontal interpolation filter interpolates and outputs pixel data in the horizontal direction. input to a first adder, the first adder calculates the difference between the output of the horizontal interpolation filter and the previous frame data, outputs the difference, and inputs it to a first absolute value detection circuit;
The first absolute value detection circuit takes the absolute value of the output from the first adder and inputs it to the first filter circuit, and the other branched value is input to the vertical interpolation filter. The pixel data is interpolated in the vertical direction and output and inputted to a second adder, and the second adder calculates the difference between the output of the vertical interpolation filter and the previous frame data and outputs it to a second absolute value detection circuit. The second absolute value detection circuit takes the absolute value of the output of the second adder and inputs it to the first filter circuit, and the first filter circuit takes the minimum value of both inputs and calculates the absolute value of the output of the second adder. What is claimed is: 1. A moving image area detection circuit that outputs motion amount data as motion amount data, and converts the output into a still level signal of multiple stages using a detector and outputs the signal. 2. An output circuit for pixel motion amount data outputted from the first filter circuit is branched, one of the branched parts is inputted to a third filter circuit, and the third filter circuit outputs pixel motion amount data in the horizontal scanning direction. The minimum value is detected from the three adjacent motion amount data in order and inputted to the fifth filter circuit as the rightmost motion amount data among the three motion amount data, and the other branched one is input to the fourth filter circuit. and enter
The fourth filter circuit detects the minimum value from two adjacent motion amount data in order in the vertical scanning direction and inputs it to the fifth filter circuit as the upper motion amount data of the two motion amount data. , the fifth filter circuit detects and outputs the maximum value of both inputs, and inputs it to the sixth filter circuit,
The sixth filter circuit sequentially detects the maximum value from four adjacent motion amount data in the horizontal scanning direction and outputs it as the rightmost motion amount data among the four motion amount data, and the same output is used for the detection. 2. The moving image area detecting circuit according to claim 1, wherein the moving image area detecting circuit inputs the signal into a still level signal, converts the signal into a still level signal of a plurality of levels, and outputs the signal.