JP2619353B2 - Solid-state imaging device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device, and more particularly to a solid-state imaging device suitable for reducing color moire of a single-chip color camera using a solid-state imaging device.

[Background of the Invention]

At present, a single-chip color camera that obtains a color video signal from one solid-state imaging device has been put to practical use. In such a camera, a plurality of color signals are obtained by periodically associating several types of color filters having different transmitted light with each pixel of the solid-state imaging device. Accordingly, since the spatial sampling frequency of each color signal is reduced to a fraction of the sampling frequency of the pixel, color moiré tends to occur.

As a method for reducing the color moiré of a single-chip color camera, there is a method disclosed in Japanese Patent Application Laid-Open No. 54-131819, for example.

This method operates as follows. For example, the first
When the color filters shown in the figure are combined so that each filter piece corresponds to the pixel of the solid-state image sensor on a one-to-one basis, a signal shown in FIG. 2A is obtained. The second obtained by separating this
In the R, G, B signals shown in FIGS.
₁ R signal is obtained in but G, B signals are not obtained, at time t ₂ is G signal is obtained R, B signal can not be obtained. At So for example, time t ₁ the size of the R ₁ compares similar to either of R ₀ and R _2, in G ₀ and B ₀ the closer to the R _0, also be close to either close to or R ₂ interpolating G, and B signals G ₁ and B _1. When the R, G, B signals are interpolated by such an operation, FIG.
As shown in (g), three signals having a high sampling frequency and a uniform phase are obtained. As a result, at the boundary of the subject which is sufficiently large compared to the repetition of the pixels, the signal to be originally obtained is almost correctly interpolated, so that the color moiré generated at such a boundary is reduced.

However, for a subject having a pattern that changes at intervals of about several times the pixel repetition period, correct interpolation cannot be performed, and conversely, there is a problem that color moiré increases.

For example, when a bright and dark subject is imaged on the color filter shown in FIG. 1 in the relative relationship shown in FIG. 3, a signal shown in FIG. 4A is obtained. This becomes the R, G, and the signal of Figure 4 when separated subjected to conventional processes described above in B (b) ~ (d) , G signal at t ₃ when these signals compared with the subject of Figure 3 Is clearly different from the signal that should be obtained. The result becomes a signal such as the t ₃ as if capturing a green object, false color occurs on playback picture.

[Object of the invention]

An object of the present invention is to provide a solid-state imaging device capable of performing signal interpolation in which a fake color is hardly generated even for a subject having a repetition frequency that is not negligible compared to repetition of an image of a solid-state imaging device. .

[Summary of the Invention]

In order to achieve the above object, a solid-state color imaging apparatus according to the present invention includes a unit that samples and separates a plurality of color signals sequentially obtained from a solid-state imaging device at the respective phases, and separates the sampled color signals into the same color signal before and after the same. When the color signal is close to the previous same color signal, the other color signal is interpolated by the one obtained immediately before the same color signal, and when the color signal is close to the subsequent same color signal, Interpolate other color signals with those obtained immediately after the color signal, and if the color signal has a certain difference or more from the same color signal before and after, substitute the other color signal immediately before the color signal. And a means for interpolating with a signal synthesized from the immediately following signal.

(Example of the invention)

Hereinafter, the present invention will be described in detail with reference to an embodiment having the configuration shown in FIG.

In FIG. 5, it is assumed that the solid-state imaging device 1 is combined with, for example, a color filter shown in FIG. At this time, when a bright and dark subject forms an image in the relative relationship shown in FIG. 3, a signal shown in FIG. 6A is obtained from the output. This is sequentially added to the delay circuits 2a, 2b,..., 2f connected in series. Here, the delay amount of each delay circuit is set equal to the sampling period of the pixel signal. This results for example at time t ₆ output lines 3a, 3
b, ..., the time t _6, respectively from _{3g, t 5, ..., B} 2, G 2 obtained in t _0,
Pixel signals of R ₂ , B ₁ , G ₁ , R ₁ , and B ₀ are simultaneously obtained. Wherein the difference signal of the pixel signals B ₂ and B ₁ are obtained a signal obtained from the output lines 3a and 3d the output is added to the subtraction circuit 4a. Similarly the difference signal of the pixel signals B ₁ and B ₀ are obtained a signal obtained from the output line 3d and 3g from the output and applied to the subtraction circuit 4b.
Further, the output signals of the subtraction circuits 4a and 4b are respectively converted into absolute value circuits 5
After conversion into in-phase signals in addition to a and 5b, comparison circuits 6a and 6
Add to b. The comparison circuits 6a and 6b have a comparison signal generator 7 at the same time.
Is added. If the in-phase difference signal is larger than the comparison signal, a "1" level judgment signal is generated at the output of the comparison circuit.

Further, two judgment signals obtained from the comparison circuits 6a and 6b are added to the control signal generation circuit 8. When the control signal generating circuit adds a "1" level judgment signal from the comparison circuit 6a and a "0" level judgment signal from the comparison circuit 6b, for example, the state "A" (for example, the output of a binary two-digit signal "00") obtaining a signal. conditions such determination signal to take a signal at time t ₆ as an example the output line
The difference is larger than the comparison signal and the B ₂ obtained with B ₁ obtained from the output line 3d from 3a, because the difference between B ₁ and B ₀ obtained from the output line 3g is time smaller than the comparison signal, B ₁ is greater than B ₂
It indicates that the size is close to B ₀ . The comparison circuit 6a
When the determination signal is applied to the "0" level from the control circuit 6b and the "1" level from the comparison circuit 6b, an output signal in the state "B" (for example, "01" of a binary two-digit signal) is obtained from the control signal generation circuit. Conditions of such determination signal indicating that B ₁ is a size closer to the B ₂ than B _0. When both of the comparison circuits 6a and 6b receive the "1" level judgment signal, the control signal generation circuit outputs a state "C" (for example, "10" of a binary two-digit signal).
To obtain the output signal. This represents that B ₁ is a B ₀ and either the no close magnitude of B _2. The comparison circuit 6a
When the determination signal of the "0" level is added to both the control signals and 6b, an output signal in a state "D" (for example, a binary two-digit signal "11") is obtained from the control signal generation circuit. This represents that B ₁ is a one to a size close of B ₀ and B _2.

Meanwhile added signal obtained from the output lines 3b and 3e (the time t ₆ in G ₂ and G ₁₎ input 13a of the gate circuit 9a, 13b and the gain control circuit 11a, a 11b. The signals applied to the gain control circuits 11a and 11b are amplified to a predetermined level (for example, 1/2 times) and then applied to the addition circuit 12a. Average value signal G ₂ and G ₁ is obtained from this result adder circuit.
Further, the output of the adding circuit is applied to the input 13c of the gate circuit 9a. (For example, in the time t ₆ R ₂ Ona R ₁₎ signal obtained from a similar output lines 3c and 3f input 13d of the gate circuit 9b, 13e
And gain control circuits 11c and 11d. Gain control circuit 11c, after being converted to an average value signal Yotsute R ₂ and R ₁ in the output signal adding circuit 12b of the 11d, the gate circuit
9b is applied to input 13f.

The output signals of the control signal generation circuit 8 are added to the gate circuits 9a and 9b to control switching between input and output. At this time, when the output signal is in the state "A", the inputs 13b, 13e of the gate circuits 9a, 9b
Is set so that the signal added to the ら appears on the output. When the output signal is in the state "B", the signal added to the inputs 13a and 13d appears on the output, and when the output signal is in the state "C" or the state "D", the signal added to the inputs 13c and 13f is set to appear on the output.

By the above operation, the signal obtained at a certain time is compared with the signal of the same color obtained before and after that, and if the difference from either one is smaller than a certain value, the signal of the other color at that time is compared. At the same time as the nearest signal in the smaller direction, and if there is a difference of more than a certain value or both are less than a certain value, the signal of the other color at that time is the average of the previous and next color signals It can be interpolated by signals.

The signal obtained from the output line 3d and the gate circuit 9
Signals obtained from a and 9b are respectively applied to gate circuits 10a, 10b and 10
By controlling with a signal from the oscillation circuit 14 synchronized with the driving pulse of the solid-state imaging device in addition to c, the gate circuits 10a,
An R signal, a B signal, and a G signal are separated from the outputs of 10b and 10c.

As a result, the signals shown in FIG.
As shown in (g), unlike the signals (b) to (d) based on separation alone, the sampling frequency is equal to the sampling frequency of the pixel, and R, G, B signals having the same phase can be obtained. Although different from these signals B signals and the time G signal is the signal to be originally obtained, corresponding to t ₃ corresponds to the time t ₂ for example, false when compared with the conventional example shown in Figure 4 (c) The signal can be reduced. As a result, a fake color generated on the reproduced image is reduced.

Although the description of the present invention has been made by taking the color filter shown in FIG. 1 as an example, it is apparent that the present invention can be applied to a time-series signal in which several kinds of signals repeat sequentially. Therefore, those using complementary color filters as shown in FIGS. 7 (a) and 7 (b),
(C), (d), etc. other than 3 pixels,
(E), etc., in which the vertical direction is not the same color, (f), etc.
The present invention can be applied to a single-chip color camera combined with any color filter, such as one corresponding to a solid-state imaging device in which pixels are shifted in the horizontal direction every other line.

In the embodiment shown in FIG. 5, the delay circuits 2a to 2f are connected in series. However, as shown in FIG. 8, the delay circuits 15a to 15f having a delay time of 1 to 6 times the pixel sampling period are used.
May be used in parallel.

In the embodiment shown in FIG. 5, a comparison signal having a constant value obtained from the comparison signal generator 7 is added to the comparison circuits 6a and 6b. However, another embodiment shown in FIG. 9 is possible. Ninth
In the embodiment of FIG was added to the comparison circuit 16 the signal obtained from the output line 3a and 3 g (e.g. B ₂ and B ₀ at time t _3), the resulting difference signal is attenuated to a 1/2 attenuation circuit 17 To the comparison circuits 6a and 6b. According to this, only when the signal obtained at a certain time is equal to the average of the same-color signals obtained before and after that time, the comparison signals are set so that the "0" level judgment signal is simultaneously obtained from the comparison circuits 6a and 6b. Even if there is a slight difference, it is possible to stably determine which signal is closer to which signal.

In the description of the embodiment shown in FIG. 5, when the output signal of the control signal generating circuit 8 is in the state "D", the outputs of the gate circuits 9a and 9b are applied to the signals of the inputs 13c and 13f in the same manner as in the state "C". It was decided to control it to appear. However, in the state “D”, since the signal obtained at the time is close in magnitude to any of the same color signals obtained before and after, the same operation as the state “A” or the state “B” can be performed.

In the description of the embodiment of FIG. 5, the gains of the gain control circuits 11a, 11b, 11c and 11d are set to 1/2. Correlating this with the temporal distance between the time at which the signal should be obtained and the time at which the signal is obtained, for example, the R signal at time t ₃ is 1/3 of R ₁
Add ₂ times and 2/3 times of R ₂ to the adder 12a, and the G signal is 2/3 of G ₁
The addition of 1/3 times and G ₂ to the adding circuit 12b FIG. 6 (h) ~
The signal of (j) is obtained. According to these settings, R, G, B
Since the signal can be made closer to the signal to be originally obtained, spurious colors generated on a reproduced image can be greatly reduced.

〔The invention's effect〕

As described above, according to the present invention, it is possible to perform signal interpolation in which a false signal is unlikely to be generated even for a pattern that changes at intervals of about several times the repetition cycle of the pixels of the solid-state imaging device. The color moiré of the camera can be greatly reduced.

[Brief description of the drawings]

FIG. 1 is a diagram showing an example of a single-plate color filter, FIG. 2 is a schematic diagram of a signal for explaining the operation of the conventional example, and FIG. 3 is an image of a subject for pointing out a problem in the conventional example. FIG. 4 is a diagram showing an example, FIG. 4 is a diagram showing a schematic diagram of a signal obtained from the subject shown in FIG. 3, FIG. 5, FIG. 8, FIG. 9 is a diagram showing an embodiment of the present invention, FIG. FIG. 7 is a diagram showing a schematic diagram of a signal obtained in an embodiment of the present invention, and FIG. 7 is a diagram showing an example of a color filter of a single-chip color camera to which the present invention can be applied. 11 ... Gain control circuit, 12 ... Addition circuit, 13 ...
... gate circuit, 16 ... comparison circuit, 17 ... attenuation circuit.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Shusaku Nagahara 1-280 Higashi-Koigabo, Kokubunji-shi, Hitachi, Ltd. Central Research Laboratories Co., Ltd.

Claims (8)

(57) [Claims] 1. A color filter in which pixel signals are output at a predetermined sampling period and a set of n types of filter elements are arranged in a regularly repeated manner. The pixel signals are input at the sampling period and the pixel signals are input at the sampling period. A delay unit that outputs a 1 to 2n-fold delay signal, and a 1-time delay output signal output from the delay unit at any timing, a 1 + n-time delay output signal output from the delay unit, or Interpolation signal output means for outputting one of an output signal consisting of an average value of the output signal of 1 time delay and the output signal of 1 + n time delay, the output signal of n time delay output from the delay means and the color The interpolation is performed based on the magnitude relationship between the pixel signals output from the filter and the magnitude relationship between the n-times delayed output signal and the 2n-times delayed output signal output from the delay unit. Comparison and determination means for outputting a signal for selecting an output from the signal output means; and color signal output means for sequentially selecting and outputting the n-times delayed output signal and the output signal from the interpolation signal output means at the sampling period. And an oscillating means for providing the sampling period. 2. The delay means according to claim 1, wherein said delay means comprises 2n delay elements connected in series.
Item 13. The solid-state imaging device according to Item 1. 3. The delay means according to claim 1, wherein said delay means comprises 2n delay elements connected in parallel.
Item 13. The solid-state imaging device according to Item 1. 4. The solid-state imaging device according to claim 3, wherein each of said 2n delay elements is a delay element of 1 to 2n times of said sampling period. 5. The interpolation signal output means, wherein the average value is a value obtained by adding the output signal of the 1-time delay and the output signal of the 1 + n-time delay by a factor of two, respectively. The solid-state imaging device according to any one of claims 1 to 4, wherein 6. The solid-state imaging device according to claim 1, wherein said comparison and determination means compares said two magnitude relations with a predetermined reference value. apparatus. 7. The solid-state imaging device according to claim 6, wherein said predetermined reference value is predetermined. 8. The solid-state imaging device according to claim 6, wherein said predetermined reference value is obtained from an output from said color filter and said output signal delayed by 2n times.