JP2938090B2 - Motion adaptive processor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial application field) The present invention detects a moving part and a stationary part of a television image, and controls the processing of a television signal according to the detection result. The present invention relates to an adaptive processing device.

(Prior art) In recent years, in order to achieve high quality and high definition of television images, a completely new high quality television (HDT) has been developed.
In parallel with the research and development of V), research and development of image quality improvement using digital signal processing technology is also active in the current system. Typical examples are a progressive scanning (non-interlace) conversion method and an adaptive Y / C separation method. Both methods require a motion detection circuit for detecting a moving portion and a still portion of an image. The processing method is switched according to the output of the motion detection circuit.

Hereinafter, the non-interlace conversion method will be described as an example, but the image quality can be improved by a similar method in the adaptive Y / C separation method.

The non-interlace conversion system converts a television signal transmitted by interlace (interlaced scanning) into non-interlace (sequential scanning), thereby eliminating disturbances such as line flicker and line crawling, which are problems of the current system. It is a method to do. Specifically, referring to FIG. 3, the principle of converting 525 interlaced images into 525 non-interlaced images using an image memory in the NTSC system is as follows.

First, for a still image, set the current field to “0”.
The data of the field "-1" one field before is stored in the image memory, and the data of the current field "0" and the field "-" one field before are stored as shown by an arrow a in FIG. And "1" data at the same time. That is, field interpolation in which only the operation in the time axis direction t is performed is performed. As a result, 525 interlaced images can be converted into 525 non-interlaced images for both still images and moving images, and interlace obstacles such as line flicker and large screen flicker can be eliminated.

Here, FIG. 4 shows a conventional motion adaptive non-interlace conversion device configured based on the above principle. The input terminal 11, the luminance signal Y ₀ of the television signal in the interlace method is applied. This luminance signal Y ₀
Is delayed by one field by the first field memory 12 and further delayed by one field (two fields = 1 frame in total) by the second field memory 13.

The luminance signal Y ₀ supplied to the input terminal 11 and the luminance signal Y ₂ output from the field memory 13 are supplied to a motion detection circuit 28 which can take a difference between one frame, and are used for generating a motion detection signal. Provided. Further, the luminance signal Y ₀ and the luminance signal Y ₁ output from the first field memory 12 are output.
Is supplied to the inter-field interpolation signal generation circuit 15 and is used for generating an inter-field interpolation signal. In addition, the luminance signal
Y ₀ is supplied to an inter-line interpolation signal generation circuit 16 to be used for generating an inter-line interpolation signal.

Both the inter-field interpolation signal and the inter-line interpolation signal are supplied to the mixing circuit 17 and mixed at a ratio according to the motion detection signal. The output of the mixing circuit 17 is supplied to a non-interlace conversion circuit 18, converted into a non-interlace signal based on the luminance signal Y ₀ , and extracted from an output terminal 19.

Here, in order to adapt the non-interlace conversion to the motion of the image, the motion detection circuit 28 generates a motion detection signal by taking a difference between one frame. However, it is not always possible to detect a motion by simply taking a difference between one frame.

Now, in FIG. 6, if the horizontal axis is the horizontal position of the image and the vertical axis is the level, the motion detection simply takes the difference between one frame (the difference between the “0” field and the “−2” field). Although the signal is obtained by detecting the motion in the parts of α and γ, the part of β (corresponding to the “−1” field)
Is not detected despite the presence of motion. In this case, the portion of β of the motion detection signal does not move, that is, is processed as a still image, and an obstacle such as two-line blur on the screen occurs.

Therefore, conventionally, as shown in FIG. 4, a control circuit 22 including a field memory 20 and a maximum value selection circuit 21 is interposed between the motion detection circuit 28 and the mixing circuit 17 so that the current motion detection signal is The higher level is output with the motion detection signal. In this way, the sixth
As shown in the figure, the motion detection signal can be expanded temporally, and loss of the portion β can be protected.

In addition, if the detection sensitivity of the motion is increased to reduce the obstacle of the two-line blur, the flicker occurs at the edge portion of the pattern of the still image due to the moving image determination due to noise or the like. Decrease the detection sensitivity.
The switching of the motion detection sensitivity between the edge portion of the picture and the flat portion that is not so is effective to be performed on the motion detection signal which is temporally stretched.

Here, FIG. 5 (b) shows a motion detection sensitivity characteristic for a flat portion. This is an example of a case where the motion detection signal is represented by 2 bits. When the difference between frames is close to “0”, the motion detection signal is also “0” and is determined as a complete still image. As the difference between the frames increases, the motion detection signal also increases. When the difference between the frames exceeds a certain value, the motion detection signal becomes "3", and it is determined that the moving image is a complete moving image.

FIG. 5 (c) shows the motion detection sensitivity characteristic for the edge portion, in which the sensitivity to the moving image determination is low.
FIG. 5 (a) shows a result obtained by adding and synthesizing the motion detection sensitivity characteristics for the flat portion and the motion detection sensitivity characteristics for the edge portion. That is, when the motion detection signal is "0" to "3", the sensitivity characteristic is for a flat portion, and when the motion detection signal is "4" to "7", the sensitivity characteristic is for an edge portion. It is possible. By making a determination based on such a principle, two 2-bit signals can be converted into one 3-bit signal, thereby reducing the number of signals.

The motion detection signal obtained by the sensitivity characteristic shown in FIG. 5A is supplied to the control circuit 22 shown in FIG. 4 and is temporally expanded. This protects against missing motion detection. The motion detection signal output from the control circuit 22 is supplied to a conversion circuit 27 included in the motion determination circuit 23 (the motion determination circuit includes a motion component removal circuit 26 and a conversion circuit 27).

The conversion circuit 27 is configured as shown in FIG.
The motion detection signal shown in FIG. 5 (a) is converted into the characteristic shown in FIG. 5 (c) (for an edge portion) or FIG. 5 (b) (for a flat portion) according to the edge determination signal. ing. However, the edge determination signal output from the motion component removal circuit 26 is “1” when an edge portion is detected, and is “0” otherwise.

In FIG. 7, AND circuits G _{1 to} G ₂ individually input the lower 2 bits of the motion detection signal, and when the common gate signal is “1”, output the input bit signal as it is, and output the common gate signal. When it is "0", the input bit signal is cut off and all outputs are set to "0". Common gate signal inputs the MSB bit signal of the inverted signal and the motion detection signal edge determination signal inverting circuit G ₅ to the OR circuit G _6,
It is generated by taking the logical sum.

That is, the gate signal outputted from the OR circuit G _6, when the edge determination signal is "0" in the motion detection signal is "3" or less (MSB = 0) is "1", the AND circuit G ₁ ~G _{From 2,} the lower 2 bits of the motion detection signal are output. Here, the edge is detected and the edge determination signal becomes "1", the common gate signal is "0", to force the output of the AND circuit G ₁ ~G ₂ "0". Also when the edge determination signal is "0" in the motion detection signal is "4" or more (MSB = 1) becomes "1", and outputs the lower 2 bits of the motion detection signal from the AND circuit G ₁ ~G _2. Here the edge is detected, the common gate signal even edge decision signal becomes "1" remains "1", the output of the AND circuit G ₁ ~G ₂ does not change.

On the other hand, the OR circuit G ₃ ~G ₄ are each AND circuit G ₁ ~G ₂
Are input separately, and when the common gate signal is "0", the input bit signal is output as it is, and when the common gate signal is "1", all the outputs are set to "1". Common gate signal inputs the MSB bit signal of the inverted signal and the motion detection signal edge determination signal inverting circuit G ₅ to the AND circuit G _7, is generated by a logical product.

That is, the gate signal outputted from the AND circuit G ₇ is when the edge determination signal is "0" in the motion detection signal is "3" or less (MSB = 0) is "0", the AND circuit G ₁ ~G Each bit signal from ₂ is output as it is. Here, the edge is detected, the common gate signal even edge decision signal becomes "1" remains "0", the output of the AND circuit G ₁ ~G ₂ from the OR circuit G ₃ ~G ₄ as it Derived. The edge determination signal motion detection signal is "4" or more (MSB = 1) the common gate signal when the "0" is "1", all "1" the output of the OR circuit G ₃ ~G _4. Here the edge is detected and the edge determination signal becomes "1", the common gate signal becomes "0", thereby deriving the output of the AND circuit G ₁ ~G ₂ from the OR circuit G ₃ ~G ₄ as it is.

As can be seen from the above, the conversion circuit 27 uses the edge determination signal output from the motion component removal circuit 26 to perform the fifth
The temporally stretched motion detection signal having the characteristics shown in FIG. 5A is converted into the characteristics shown in FIG. 5C at the edge portion, and into the characteristics shown in FIG. 5B at the flat portion. The signal is supplied to the mixing circuit 17 as a mixing motion detection signal. Assuming that the value of the motion detection signal is K, the mixing circuit 17 mixes the inter-field interpolation signal at a rate of (1- (K / 3)) and the inter-line interpolation signal at a rate of (K / 3).

Next, edge determination will be described. The edge detecting circuit 24 as shown in FIG. 4, it is supplied luminance signal Y _0,
In-field edge detection is performed. Taking the difference between L ₁ which is L ₂ and 1 horizontal period delay as shown in Figure 3, and outputs the field edge detection signal when the difference exceeds a predetermined value. Here, the detected edge is 525 /
Since only components up to 4 [cph] can be detected, 525/4 [cp
h] or more edges are detected by the edge detection circuit 25. The edge detection circuit 25 is supplied with the luminance signal Y ₁ to be output as the luminance signal Y ₀ from the first field memory 12, the difference is taken between L ₂ and L ₃ shown in FIG. 3, the difference Outputs an edge detection signal when exceeds a predetermined value. This makes it possible to detect edge components up to 525/2 [cph], and more accurate edge detection is performed. However, the edge detection signal detected by the edge detection circuit 25 is detected by pixels having a time difference of one field, and therefore includes a motion component. Therefore, the motion component is removed from the inter-field edge detection signal output from the edge detection circuit 25 by the motion component removal circuit 26.

Next, the motion detection of the pixels L ₂ and L ₃ for performing the inter-field edge detection will be described. The luminance signal Y ₀ and the luminance signal Y ₂ output from the second field memory 13 are used for the motion detection circuit 29.
To obtain a motion detection signal with the characteristics shown in FIG. 5 (d). The motion detection signal is the fourth
As shown in the figure, the field memory 30 and the maximum value selection circuit 31
Is supplied to the control circuit 32 consisting of, supplied as a motion detection signal and the edge detection corrective motion detection signal to the motion component removing circuit 26 is ORed motion detection signal in one field delayed L ₃ in L ₂ .

FIG. 8 shows a configuration example of the motion component removing circuit 26. When the pixels L ₂ and L _{3 for} which edge detection is performed have motion, the motion detection signal becomes “1” and the output of the inverting circuit G ₁₁ becomes “0”.
Becomes Then, the output of the AND circuit G ₁₂ is "0",
The output of the inter-field edge detection signal is input ( "1" level) is the AND circuit G ₁₂ also moves components from the field between the edge detection signals are the "0" is removed. OR circuit G ₁₃ outputs an edge determination signal takes the logical sum of the motion components have been removed field between the edge detection signal and the field edge detection signal.

However, in the configuration for generating two motion detection signals for interpolating signal mixing and edge detection correction as described above,
A large number of field memories for protecting the motion detection signal from being lost are required, which causes a problem that the circuit becomes large and economic disadvantage occurs.

(Problems to be Solved by the Invention) As described above, in the conventional motion adaptive processing device, loss of the motion detection signal is protected in order to generate two motion detection signals for interpolation signal mixing and edge detection correction. Therefore, there is a problem that a large number of field memories must be provided, which leads to an increase in the size of the circuit and an economic disadvantage.

Therefore, an object of the present invention is to provide a motion adaptive processing device which can perform accurate motion detection with a simple configuration and is economically advantageous.

[Means for Solving the Problems] The present invention extracts a difference signal from a television signal, and converts the difference signal into n (n is a positive integer) based on a preset motion detection sensitivity characteristic. Means for converting to a first motion detection signal of bits, wherein the motion detection sensitivity characteristics include a first characteristic with high sensitivity (high sensitivity) and a low sensitivity (high sensitivity) according to the magnitude of the difference signal. It has a non-linear characteristic obtained by combining the second characteristic (low sensitivity) and the third characteristic of the intermediate sensitivity between the high sensitivity and the low sensitivity, and the output when each of the characteristics is determined to be a moving image ( When the value of the first motion detection signal) is different, and when the video is determined to be a moving image based on the third characteristic, the motion in which the most significant bit of the output (the first motion detection signal) is "1" Detecting means for detecting a change point of the pattern of the television signal; And a second edge detection circuit for detecting a change point of a pattern of the television signal between fields and outputting a second edge detection signal. An edge detection circuit, a signal obtained by delaying the first motion detection signal by one field, and a larger value of the first motion detection signal signal with no delay are selected and output as a second motion detection signal. A control circuit, selecting the first edge detection signal when the most significant bit of the second motion detection signal from the control circuit is “1”, and selecting the second edge detection signal when the most significant bit is “0” A circuit for supplying the second motion detection signal from the control circuit and supplying the edge detection signal from the selection means, as a motion detection signal conversion circuit; Motion detection signal When the most significant bit and the edge detection signal "0" is there an edge, and converts the second motion detection signal to a minimum value, the most significant bit is "1"
And when the edge detection signal has no edge, the second motion detection signal is converted to a maximum value and output. The most significant bit is “0” and the edge detection signal has no edge. If the upper bit is "1" and the edge detection signal has an edge, the motion detection signal of the lower (n-1) bits of the second motion detection signal is output as it is, and the output from this conversion circuit is output. Based on the (n-1) -bit motion detection signal, the motion adaptive synthesis processing between the inter-field interpolation signal and the intra-field interpolation signal is performed.

(Operation) Since the number of motion detection signals is reduced by the above means, the memory for field delay can be reduced, and accurate motion detection can be performed without losing accuracy, which is economically advantageous. It can be.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 shows an embodiment of the present invention. However, in FIG. 1, the same parts as those in FIG. 4 are denoted by the same reference numerals, and description thereof will be omitted.

Figure 1 shows an arrangement when the present invention is applied to a motion adaptive non-interlace converting circuit, the motion detection circuit 14 takes a difference between frames from the luminance signal Y ₀ and Y _2,
A motion detection signal is obtained by one non-linear motion detection sensitivity characteristic obtained by combining the motion detection sensitivity characteristic for interpolating signal mixing and the motion detection sensitivity characteristic for edge detection correction. This motion detection signal is sent to the control circuit 22 including the field memory 20 and the maximum value selection circuit 21, where it is temporally expanded and sent to the conversion circuit 27.

According to the edge determination signal from the motion component removing circuit 26, the conversion circuit 27 converts the motion detection signal of the motion detection sensitivity characteristic for the edge portion into the edge portion and the motion detection signal of the motion detection sensitivity characteristic for the flat portion in the flat portion. If the motion detection signal for edge detection correction is synthesized, the motion can be converted without any problem. The converted motion detection signal is supplied to the mixing circuit 17. The control circuit 22
The MSB bit of the motion detection signal output by the above is supplied to the motion component removal circuit 26, and the motion component is removed from the inter-field edge detection signal.

More specifically, first, as shown in FIG. 2, the nonlinear motion detection sensitivity characteristic of the motion detection
The motion detection sensitivity characteristics for the flat portion shown in FIG. 6B, the motion detection sensitivity characteristics for the edge portion shown in FIG. 7C, and the motion detection sensitivity for edge detection correction shown in FIG. It is obtained by adding and combining the characteristics. That is, the motion detection signal is “0”
From "3" to "3", for "4" to "7"
This is the sensitivity characteristic for the edge part, and the MSB bit is the sensitivity characteristic for edge detection correction.

The motion detection sensitivity characteristic for the flat part shown in FIG.
If the difference between the frames is 3 LSB or more (when the video input signal is 8 bits) or more, it is determined to be motion, and if it is less than 3 LSB, the motion is determined to be still so that the motion of a pattern having a small luminance difference from the background can be detected. If this "3LSB" is increased, the determination of the motion becomes insufficient, and the ratio of the inter-field interpolation signal increases, which causes problems such as two-line blur and jagged edges.

The motion detection sensitivity characteristic for the edge portion shown in FIG. 5C lowers the motion detection sensitivity so that a change in the luminance signal due to the fluctuation of the input video signal is not determined to be a motion, and the difference between the frames is reduced.
When it is 16 LSB or less, it is determined to be still.If "16 LSB" is reduced, it is easier to determine that it is a motion. Occur.

Here, in the characteristic of FIG. 5A, as described above, when it is determined that the portion is a flat portion by the edge determination, the value of “4” or more is overflow-processed in the 3-bit motion detection signal.
If the characteristic is converted into the characteristic shown in FIG. 5B and the edge is determined, the value of the motion detection signal of "3" or less is underflowed and the MSB bit is deleted. Is converted to the characteristic shown in FIG. Therefore, FIG.
7 can be converted into the characteristics shown in FIGS. 5 (b) and 5 (c) by the conversion circuit 27 shown in FIG. 7 in the same manner as the characteristics shown in FIG. 5 (a). It can be seen from FIGS. 5A and 5E that when the difference between the frames is between 6 LSB and 16 LSB, the motion detection signal may be either “3” or “4”. In other words, the MSB signal only needs to be “0” for 0 LSB to 5 LSB and “1” for 17 LSB or more.

FIG. 5D shows the motion detection sensitivity characteristic for edge detection correction. When the difference between the frames is greater than 9 LSB, the motion is determined, and in the following cases, the motion is determined to be stationary. The value of 9LSB is an intermediate value between the threshold value of the characteristic for the flat portion and the threshold value of the characteristic for the edge portion, and is the best value experimentally.

If this threshold value is smaller than 9 LSB, the motion detection sensitivity for edge detection correction increases, so not only the motion component but also the edge component is removed from the inter-field edge detection signal, and the edge detection becomes insufficient. The edge portion has the motion detection sensitivity for a flat portion, so that flicker occurs at the edge portion. If the threshold value is larger than 9 LSB, the motion detection sensitivity for edge detection correction will be low, so it will not be possible to sufficiently remove the motion component from the inter-field edge detection signal. And the two-line blur occurs.

The characteristic shown in FIG. 5D satisfies the above-described condition of “0” for 0LSB to 5LSB and “1” for 17LSB or more, and the interpolation signal shown in FIG. 5A or FIG. The MSB bit of the mixing motion detection signal can be replaced with the characteristic shown in FIG.

The motion detection signal obtained by this sensitivity characteristic is supplied to the control circuit 22 and is temporally expanded. This protects against missing motion detection. This control circuit
All three bits of the motion detection signal output from 22 are supplied to the conversion circuit 27 as a motion detection signal for mixing interpolation signals,
B is supplied to the motion component removing circuit 26 as a motion detection signal for edge detection correction.

Therefore, according to the configuration of the above-described embodiment, the motion detection signal for edge detection correction is combined with the motion detection signal for edge detection correction which has the characteristics of the edge portion and the flat portion at the same time. There is no need to provide two systems of delay field memories for the motion detection signal, the size is reduced, and accurate motion detection can be performed, which is economically advantageous.

In the above-described embodiment, the case of the non-interlace conversion method has been described. However, the Y / C separation method can be similarly implemented, and can be variously modified without departing from the scope of the invention.

[Effects of the Invention] As described above, according to the present invention, accurate motion detection can be performed with a simple configuration, and an economically advantageous motion adaptive processing device can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a motion-adaptive non-interlace converter as a motion-adaptive processing device according to the present invention, and FIG. 2 is a characteristic diagram showing a motion detection sensitivity characteristic of the motion detecting means of the embodiment. FIG. 3 is a diagram showing the principle of converting an interlaced television signal to non-interlace, FIG. 4 is a block diagram showing a conventional motion-adaptive non-interlace converter, and FIGS. FIG. 7 is a diagram for explaining the problem of the motion adaptive non-interlace conversion device, FIG. 7 is a circuit diagram showing a specific configuration of a conventional conversion circuit for switching detection sensitivity characteristics of a motion detection signal, and FIG. FIG. 3 is a circuit diagram illustrating a specific configuration of a motion component removal circuit. 12, 13 ... field memory, 14 ... motion detection circuit, 15
...... Inter-field interpolation signal generation circuit, 16 ... inter-line interpolation signal generation circuit, 17 ... mixed circuit, 18 ... non-interlace conversion circuit, 20 ... field memory, 21 ... maximum value selection circuit, 22 ... Control circuit, 24, 25 ... Edge detection circuit, 26 ... Motion component removal circuit, 27 ... Conversion circuit.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H04N 7/01

Claims (1)

(57) [Claims] 1. A first storage means for storing a television signal for one frame and delaying the output, a television signal input to the first storage means, and a television output from the first storage means. Means for extracting a difference signal from the motion detection signal and converting the difference signal into a first motion detection signal of n (n is a positive integer) bits based on a preset motion detection sensitivity characteristic; The sensitivity characteristics include a first characteristic with high sensitivity (high sensitivity), a second characteristic with low sensitivity (low sensitivity), and a sensitivity characteristic between the high sensitivity and low sensitivity in accordance with the magnitude of the difference signal. It has a non-linear characteristic obtained by combining the third characteristic of the intermediate sensitivity, and the value of the output (the first motion detection signal) when the moving image is determined is different in each characteristic. If it is determined that the video is a moving image, A first motion detection signal having a most significant bit of "1", and a first edge detection signal for detecting a change point of a pattern of the television signal in a field and outputting a first edge detection signal. An edge detection circuit for detecting a pattern change point of the television signal between fields and outputting a second edge detection signal; and outputting the first motion detection signal for one field. A control circuit that selects a larger one of the delayed one and the first motion detection signal signal without delay, and outputs the selected one as a second motion detection signal; and the second motion detection signal from the control circuit. Selecting means for selecting the first edge detection signal when the most significant bit is "1", and selecting the second edge detection signal when the most significant bit is "0"; Detection signal is supplied,
A circuit to which the edge detection signal is supplied from the selection means, wherein when the most significant bit of the second motion detection signal is “0” and the edge detection signal has an edge, The lower (n-1) bits of the signal are converted to the minimum value and the lower (n-1) bits excluding the most significant bit are output, and the most significant bit is "1" and the edge detection signal indicates that there is no edge. At this time, the lower order (n-1) of the second motion detection signal is converted to the maximum value and the most significant bit is removed (n
-1) output a bit, and when the most significant bit is "0" and the edge detection signal has no edge, the most significant bit is "1" and the edge detection signal has an edge, the second A motion detection signal conversion circuit that outputs the motion detection signal of the lower (n-1) bits excluding the most significant bit of the motion detection signal of (a) as it is; A signal processing unit that controls the processing of the television signal based on the signal.