JPH08172154A - Lead frame and semiconductor device using lead frame - Google Patents

Abstract

PURPOSE: To provide a lead frame wherein, when a lead frame is soldered to a semiconductor element by using a solder wire feeder, solder scattering is prevented, and position deviation is restrained, and a semiconductor device using a lead frame. CONSTITUTION: In a dimple forming part 21 of a lead frame 10 which solders a semiconductor element to the dimple forming part 21 on the surface, a nickel plating is formed on the low layer, a phosphorus-containing nickel plating is formed on the middle layer, and a nickel plating is formed on the surface layer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame suitable for a power transistor or a lead frame for a power IC, and a semiconductor device using the lead frame.

[0002]

2. Description of the Related Art Generally, in a semiconductor device such as a power transistor, a semiconductor element and a lead frame are heated and joined by soldering, and an electrode portion of the semiconductor element and a lead frame are electrically connected by an Al or Au wire, and then these are connected. It is manufactured by molding the wiring part with resin and finally separating the outer leads. In this semiconductor element and the lead frame, first, the lead frame is placed on a heat block in an atmosphere in which the oxygen concentration is controlled, and the temperature of
There is used a method of heating to 430 ° C., then pressing a solder ball, a solder wire, a solder ribbon or the like against a portion to be bonded to a semiconductor element to melt it, and placing the semiconductor element on the melted solder to bond it. The method of supplying a solder wire with a solder wire supply device is a prized method because it can continuously perform solder joining processing and is excellent in productivity. Further, recently, in order to prevent the contamination of semiconductor elements, a method of soldering in an inert gas atmosphere or a reducing gas atmosphere without using a flux is often used. This method cannot obtain the action of removing oxides and stains on the lead frame by the flux, so that the lead frame is required to have less surface oxidation and surface contamination. In solder joining without using this flux, nickel / phosphorus plating is mainly performed on the surface of the lead frame. The reason why nickel plating containing phosphorus is used is that phosphorus has the property of being more easily oxidized than nickel, tin in the solder composition, and lead, and the oxide on the solder surface or nickel / phosphorus plating surface during solder joining is used. This is because it has a reducing effect, and since phosphorus oxide produced by the reduction reaction has the property of sublimating at a temperature of 350 ° C. or higher, it enables soldering without a flux.

[0003]

However, nickel / phosphorus plating has some problems in addition to high plating cost as compared with ordinary nickel plating. The first problem is the hardness of nickel / phosphorus plating is Hv
It is as hard as 600 or more, and cracks are generated in the bending process of the lead part of the lead frame plated with nickel / phosphorus. As a measure against this problem, a two-layer plating technique in which nickel / phosphorus plating is laminated on nickel plating is disclosed in the semiconductor device of Japanese Patent Publication No. Sho 60-33312. The ideal structure for double-layer plating is to form a nickel plating layer with good workability on the base and thinly form a nickel-phosphorus plating layer having a reducing action on top of it. It is possible to satisfy the requirements. However, the Japanese Patent Publication Sho 60
Also in the semiconductor device described in Japanese Patent Publication No. 33312-, particularly when the solder wire is pressed against the surface of the lead frame by the solder wire supply device, the melted solder scatters to a portion other than the solder joint portion or the shape of the melted solder is unsatisfactory. There is a problem that the semiconductor elements become uniform and, as a result, the mounting position of the semiconductor element is displaced.

The solder jump is a phenomenon in which the solder comes into contact with the lead frame and causes local bumping when the solder is melted. Since the solder scatters to a portion other than the solder joint portion, the sealing property of the resin mold is deteriorated and the appearance is poor. Has become a quality problem. Further, when the position of the semiconductor element is deviated, the automatic wire bonding cannot be positioned in the process of electric wiring between the semiconductor element and the lead portion, which may lead to a serious problem that productivity is extremely lowered. As a countermeasure against this, there is no means to solve the problem, and a new improvement of nickel / phosphorus plating is a big issue. The present invention has been made in view of such circumstances, and in the case of solder-joining a lead frame and a semiconductor element by a solder wire supply device, it is possible to prevent solder jump and prevent misalignment of the lead frame. Another object of the present invention is to provide a semiconductor device using a lead frame.

[0005]

A method according to the above-mentioned object.
The described lead frame has a dimple forming portion on the surface,
In the lead frame for soldering semiconductor elements,
In the dimple forming portion, a nickel plating layer is formed as a lower layer, a nickel / phosphorus plating layer is formed as an intermediate layer, and a nickel plating layer is formed as a surface layer. The lead frame according to claim 2 is the lead frame according to claim 1, wherein the phosphorus concentration of the surface layer is 0.1 Wt% or less and the phosphorus concentration of the intermediate layer is 2 to 10 Wt%. Has been done. The lead frame according to claim 3 is the lead frame according to claim 1 or 2,
The surface layer has a thickness of 0.03 μm or less, and the intermediate layer has a thickness of 0.1 to 0.9 μm. The lead frame according to claim 4 is the lead frame according to any one of claims 1 to 3, in which the depth of the dimple is 0.01 to 0.03 mm, and the peripheral edge portion is a smooth surface portion. It is configured to be connected to. A semiconductor device using the lead frame according to claim 5 is a semiconductor device in which a semiconductor element is solder-bonded to a dimple forming portion formed on a surface of the lead frame, wherein the dimple forming portion has a nickel plating layer as a lower layer, A nickel / phosphorus plating layer is formed on the intermediate layer, and a nickel plating layer is formed on the surface layer.

Here, the dimple is a recess provided in the lead frame, and is used to accurately position the semiconductor element through the solder. The nickel plating layer formed as a lower layer protects the lead frame body and prevents the diffusion of copper as a base material, and is a plating layer containing nickel as a main component. The phosphorus concentration in the vicinity of the surface of the plating layer and its distribution state are values measured by Auger spectroscopy, and the phosphorus concentration in the middle part of the plating layer can be measured by means such as chemical analysis and EPMA analysis.

[0007]

In the semiconductor device using the lead frame according to any one of claims 1 to 4 and the lead frame according to claim 5, the nickel plating layer as the lower layer, the nickel / phosphorus plating layer as the intermediate layer, and the surface layer are provided in the dimple forming portion. Since each nickel plating layer is formed, it is possible to prevent solder jumping due to molten solder coming into direct contact with the phosphorus component and bumping, and diffusion of the phosphorus component from the intermediate layer to the surface is possible. As a result, the reducing effect of the phosphorus component can be exerted at the timing after contact with the molten solder to reduce the oxide generated on the plating surface and maintain the wettability with the molten solder.

In the lead frame according to the second aspect, the phosphorus concentration of the surface layer is 0.1 Wt% or less, and the phosphorus concentration of the intermediate layer is 2 to 10 Wt%. It is possible to more effectively enhance the effect of suppressing solder fly-off at the time of contact with solder and the effect of reducing oxides generated on the surface of the plating layer. When the phosphorus concentration in the surface layer exceeds 0.1 Wt%, the bumping phenomenon of the solder becomes severe and solder jump occurs, which causes deterioration of the quality of the semiconductor device. The phosphorus concentration of the intermediate layer is 2
If it is less than Wt%, the reducing effect of the oxide by the phosphorus component cannot be substantially exhibited, and even if the amount of the phosphorus component is increased to exceed 10 Wt%, the reducing effect does not change, and the cost increase due to the increase of the phosphorus component. It is not preferable because it connects.

In the lead frame according to the present invention, the surface layer has a thickness of 0.03 μm or less, and the intermediate layer has a thickness of 0.1 to 0.9 μm. By defining the distribution of phosphorus concentration in a specific range, the timing of diffusion of phosphorus components to the surface layer can be accurately controlled. Here, the thickness of the surface layer and the intermediate layer within 0.03 μm from the surface of the nickel plating layer was set to 0.1 to 0.9 μm because the limit value of the depth measurable by Auger electron analysis and melting This is because it was determined by considering the bumping phenomenon of the solder caused by the initial contact between the solder and the phosphorus component, the reducing effect of the phosphorus component, and the like, and the values obtained by experimental verification.

In the lead frame according to the fourth aspect, the depth of the dimples is 0.01 to 0.03 mm, and the peripheral portion thereof is smoothly connected to the surface portion, so that the solder joint is formed. At this time, the flow of the solder melted by coming into contact with the peripheral edge of the dimple of the lead frame is not hindered, and the generation of droplets caused by the rapid change in the flow of the solder can be suppressed. If the depth of the dimples is shallower than 0.01 mm, there is substantially no effect of accurately positioning the semiconductor device. On the contrary, if the depth of the dimples is deeper than 0.03 mm, the flow of molten solder collides at the peripheral edge of the dimples, resulting in solder flying. It will be noticeable. Even when the peripheral edge of the dimple is not smoothly connected to the surface, the peripheral edge becomes an acute angle, and the flow of the molten solder changes abruptly at this portion, which causes droplets.

[0011]

Embodiments of the present invention will now be described with reference to the accompanying drawings to provide an understanding of the present invention. 1 is a plan view of a lead frame according to an embodiment of the present invention, FIG. 2 is an enlarged sectional view of dimples of the lead frame, and FIG. 3 is a distribution of phosphorus and nickel concentrations in a plating layer of the lead frame. FIG. 4 is an explanatory view of the solder wire supply device, and FIG. 5 is an explanatory view of the shape of the dimples of the lead frame.

As shown in FIG. 1, a lead frame 10 according to an embodiment of the lead frame of the present invention has a dimple forming portion 2 on which a substrate also serving as a heat sink and a semiconductor element 13 are mounted.
Consists of one. A large number of dimples 11 (recesses) are arranged on the dimple forming portion 21. As for the dimples 11 formed on the lead frame 10 made of copper or copper alloy, 48 pieces are arranged at 0.6 mm intervals with a square having a side length of 0.3 mm and a depth (D) of 0.02 mm. . Then, the peripheral portion 20 of each dimple 11
The dimples 11 are formed by means such as die molding so that they have no protrusions such as swells and are smooth. Next, a process of nickel-plating the dimple forming portion 21 formed as described above and its periphery will be described based on Table 1.

[0013]

[Table 1]

First, after performing a usual plating pretreatment, a plating treatment was performed under the plating conditions shown in Table 1 so that the first layer (lower layer) had a plating thickness of 1 to 7 μm. The nickel plating layer obtained here does not substantially contain a phosphorus component, and has a function of preventing oxidation of the dimple forming portion 21 made of copper or a copper alloy and the periphery thereof and maintaining good bondability. Then, the plating layer of the second layer (intermediate layer) is 0.2
A nickel-phosphorus plating layer was coated on the first layer to a thickness of ˜0.5 μm. The average phosphorus concentration in this second layer is 6
Wt%, which acts to remove oxides by reducing phosphorus when soldering. Further, a third layer (surface layer) composed of a nickel plating layer was formed under the plating conditions shown in Table 1 so as to have a thickness of 0.005 to 0.03 μm. FIG. 2 is an enlarged cross-sectional view of the dimple 11 of the lead frame 10 produced as described above.
FIG. 3 shows the results of measurement of the distribution of phosphorus and nickel concentrations in the surface layer of No. 2 by a combination of methods such as Auger electron analysis and EPMA. As can be seen from FIG. 3, 0.00 from the surface
No phosphorus component was detected in the region up to 5 μm.

A method of solder-bonding the semiconductor element 13 to the lead frame 10 formed as described above by using the solder wire supply device 17 will be described. As shown in FIG. 4, the solder wire supply device 17 includes a lead frame 10
The heating block 18 heats and conveys the solder wire 16, the roll feed 19 for supplying the solder wire 16 to the lead frame 10, and the supply nozzle 15 for the solder wire 16. Lead frame 1 heated to about 410 ° C. on a heat block 18 in an atmosphere of nitrogen concentration 95% and hydrogen 5%
0 is transferred to the right in the figure. And the supply nozzle 15
At the position, the roll feed 19 presses the solder wire 16 containing 95.5 Wt% of lead, 2.0% of tin, and 2.5% of silver against the mounting portion of the semiconductor element 13 of the lead frame 10 and melts. At this time, solder fly, which was often seen in the past, was not observed. Then, the semiconductor element 13 was mounted on the melted solder 14 and cooled to fix the semiconductor element 13 to the mounting portion of the semiconductor element 13. The semiconductor element 13 is attached to the 620 lead frames 10 as described above, and the displacement of the semiconductor device and the solder jump are observed using a 20 × optical microscope to determine the defect rate (failure of the semiconductor device). The number / total number) was 0%.

In Table 2, Comparative Example 1 in which the depth (D) of the dimples 11 was 0.05 mm, Comparative Example 2 in which the phosphorus concentration in the surface layer of the plating layer 12 was 5%, and the depth of the dimples 11 ( The results of the respective defective rates obtained for Comparative Example 3 in which D) is set to 0.05 mm and the phosphorus concentration of the surface layer is set to 5% are shown. In addition, in the above-mentioned comparative example, all the conditions other than those described are set to be the same as those of the example.

[0017]

[Table 2]

As is clear from Table 2, in the case of using the lead frame 10 according to the present embodiment, the defective rate of the semiconductor device due to the solder jump and the positional deviation is remarkably reduced as compared with the comparative example. By joining the semiconductor element 13 to the lead frame 10 configured as described above,
Predetermined wiring is performed and resin sealing is performed to complete a semiconductor device such as a power transistor.

Although the embodiments of the present invention have been described above, the present invention is not limited to these embodiments, and changes in conditions without departing from the gist of the present invention are all within the scope of application of the present invention. For example, in the above embodiment, the method of coating the joint surface with three kinds of plating solutions having different components to obtain the plating layer 12 having a desired phosphorus concentration distribution has been described. It is also possible to use a technique such as diffusion treatment or chemical surface treatment to obtain a desired concentration.

[0020]

In the lead frame according to any one of claims 1 to 4 and the semiconductor device using the lead frame according to claim 5, in the dimple forming portion, a nickel plating layer is formed as a lower layer, a nickel-phosphorus plating layer is formed as an intermediate layer, and Since nickel plating layers are formed on the surface layer respectively, it prevents solder jumping due to bumping of the molten solder in contact with the phosphorus component, and the oxides formed on the plating surface by the phosphorus component present in the intermediate layer. Can reduce the wetting angle with the solder that has been reduced by melting. Therefore, it is possible to simultaneously avoid the solder jump in the solder joint and improve the adhesiveness between the solder and the lead frame, and stably place the molten solder on the dimples to suppress the positional deviation. it can.

Particularly, in the lead frame according to the second aspect, since the phosphorus concentration of the surface layer is 0.1 Wt% or less and the phosphorus concentration of the intermediate layer is 2 to 10 Wt%, the molten solder is formed. It is possible to further effectively enhance the effect of suppressing the solder fly at the time of contact with and the effect of reducing the oxide generated on the surface of the plating layer.

Further, in the lead frame according to the third aspect of the invention, since the distribution of the phosphorus concentration in the plating layer is regulated within a specific range, the timing of diffusion of the phosphorus component to the surface layer can be accurately controlled. . The desired distribution of phosphorus concentration in the plating layer can be obtained by using a plurality of plating solutions having different phosphorus concentrations, and can be controlled by electrolysis conditions or a method by thermal diffusion. Could be done.

In the lead frame according to the present invention, dimples are provided at the joint portion of the lead frame with the semiconductor element, and the depth and the shape of the peripheral portion of the dimple are specified. When joining
The flow of solder that melts in contact with the dimples of the lead frame is not hindered, and it is possible to suppress the generation of droplets of molten solder that are caused by a rapid change in solder flow, and to prevent the molten solder that is placed on the dimples. It can be positioned in a stable state.

[Brief description of drawings]

FIG. 1 is a plan view of a lead frame according to an exemplary embodiment of the present invention.

FIG. 2 is an enlarged cross-sectional view of dimples of the lead frame.

FIG. 3 is a view showing a distribution of phosphorus and nickel concentrations in a plating layer of the lead frame.

FIG. 4 is an explanatory diagram of a solder wire supply device.

[Explanation of symbols]

 10 Lead Frame 11 Dimples 12 Plating Layer 13 Semiconductor Element 14 Solder 15 Nozzle 16 Solder Wire 17 Solder Wire Supply Device 18 Heat Block 19 Roll Feed 20 Peripheral 21 Dimple Depth D Dimple Depth

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Mitsuji Kaneki 14-1 No. 14 Chofu Minatomachi, Shimonoseki City, Yamaguchi Prefecture Inside the Kobe Steel Co., Ltd. Chofu Works (72) Inventor Shoji Kaifu 19-16 Matsuda Nakamachi, Shimonoseki City, Yamaguchi Prefecture (72) Inoue Hiroto 2-5, Chofu-hamaura-cho, Shimonoseki City, Yamaguchi Prefecture (72) Inventor, Shin Ishikawa 1-13, Chofu-enyo-ji Temple, Shimonoseki City, Yamaguchi Prefecture (72) Shinichiro Hioka, 1083 Yoshishi, Moji-ku, Kitakyushu, Fukuoka −11

Claims (5)

[Claims] 1. A lead frame for solder-bonding a semiconductor element to a dimple forming portion on a surface, wherein the dimple forming portion has a nickel plating layer as a lower layer, a nickel / phosphorus plating layer as an intermediate layer, and a nickel plating layer as a surface layer. Lead frame characterized by being formed respectively. 2. The lead frame according to claim 1, wherein the surface layer has a phosphorus concentration of 0.1 Wt% or less, and the intermediate layer has a phosphorus concentration of 2 to 10 Wt%. 3. The surface layer has a thickness of 0.03 μm or less,
The lead frame according to claim 1, wherein the intermediate layer has a thickness of 0.1 to 0.9 μm. 4. The dimple depth is 0.01 to 0.03.
The lead frame according to any one of claims 1 to 3, wherein the lead frame has a size of mm and the peripheral portion thereof is smoothly connected to the surface portion. 5. A semiconductor device in which a semiconductor element is solder-bonded to a dimple forming portion formed on a surface of a lead frame, wherein the dimple forming portion has a lower nickel plating layer, an intermediate layer having a nickel / phosphorus plating layer, and A semiconductor device using a lead frame, wherein a nickel plating layer is formed on each surface layer.