JPH0817175B2 - Semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device, and more particularly to improvement of the material composition of an aluminum alloy film used as wiring for a semiconductor device.

[Prior Art] Conventionally, an aluminum-silicon alloy (hereinafter referred to as an Al-Si alloy) containing silicon in an amount of about 1.0 to 2.0 wt.% Has been used as the most widely used material for wiring of a semiconductor device.

FIG. 3 is a sectional view showing a schematic configuration of a conventional semiconductor device using an Al—Si alloy as a wiring material. In FIG. 3, a conventional semiconductor device is formed for the purpose of protecting and stabilizing the impurity diffusion layer 2 formed in a predetermined region of the surface of the semiconductor substrate 1 made of silicon and the surface of the semiconductor substrate 1. The underlying insulating film 3 and the wiring 5 (hereinafter, referred to as an “Al—Si alloy” formed in a predetermined region on the underlying insulating film 3 and electrically connected to the impurity diffusion layer 2 through the contact hole 4) Al-Si wiring) and Al-Si wiring 5
A final protective film 6 is formed on the upper and lower insulating films 3 for the purpose of protecting the surface of the semiconductor device. A contact hole 7 is formed in a predetermined region of the final protective film 6, and a bonding pad region for electrically connecting the Al—Si wiring 5 and the outside is formed.

4A and 4D are cross-sectional views showing the steps of forming a wiring in a conventional semiconductor device using the Al—Si alloy shown in FIG. 3 as a wiring material. Below, Figures 4A through 4D
A conventional method of manufacturing a semiconductor device will be described with reference to the drawings.

In FIG. 4A, an impurity diffusion layer 2 to be an active region is formed in a predetermined region on the surface of the semiconductor substrate 1 by using a photoengraving technique, an ion implantation method or the like. Next, a base insulating film 3 made of a PSG (phosphorus-doped silicon glass) film or the like for the purpose of protecting and stabilizing the surface of the semiconductor substrate 1
Is deposited on the entire exposed surface by the CVD method. Next, in order to establish electrical connection with the impurity diffusion layer 2, a contact hole 4 is formed in a predetermined region of the base insulating film 3 by using photolithography and etching techniques.

In FIG. 4B, an Al-Si alloy film is deposited on the entire exposed surface by a sputtering method, a vacuum deposition method, or the like, and then a desired shape of Al- is formed by using photoengraving and etching techniques.
The Si wiring 5 is formed.

In FIG. 4C, in order to obtain a good ohmic contact between the wiring 5 and the impurity diffusion layer 2, heat treatment at 400 to 500 ° C. for several tens of minutes is performed in an atmosphere of nitrogen or hydrogen, and Al− in the contact hole 4 is formed. A eutectic reaction occurs at the interface between the Si wiring and the semiconductor substrate.

In Fig. 4D, the silicon oxide film, P
An insulating film such as an SG film or a silicon nitride film is deposited on the entire exposed surface as the final protective film 6. Next, this semiconductor device (Al-
In order to electrically connect the Si wiring) to the outside, a contact hole 7 is formed in a predetermined region of the final protective film 6 by using photoengraving and etching techniques to form a bonding pad region.

[Problems to be Solved by the Invention] FIG. 5 is a schematic cross-sectional view of a semiconductor device using aluminum alone as a wiring material.

When a simple substance of aluminum (pure Al) is used as a wiring material, a heat treatment process at 400 to 500 ° C. for forming a good ohmic contact between the pure Al wiring 10 and the impurity diffusion layer 2 is performed as shown in FIG. As shown, there is a phenomenon that alloy pits 11 are generated due to local reaction between silicon in the impurity diffusion layer 2 and aluminum contained in the pure aluminum wiring 10 in the contact hole 4 region.
This is not a serious problem when the depth of the impurity diffusion layer 2 is large, but as the depth of the impurity diffusion layer 2 becomes shallower to 0.5 μm or less as the semiconductor device becomes finer, the alloy pits 11 penetrates the impurity diffusion layer 2,
A problem arises that the penetration region 12 of the impurity diffusion layer 2 is generated and the wiring 10 and the semiconductor substrate 1 are short-circuited. This reaction between silicon and aluminum occurs due to the mechanism that during the heat treatment at 400 to 500 ° C., the silicon in the impurity diffusion layer 2 melts into the pure aluminum wiring 10 and the aluminum penetrates into the impurity diffusion layer by mutual diffusion. There is.

As a measure for preventing the alloy pits 11 from occurring, an Al--Si alloy wiring, in which silicon is added in advance at a temperature higher than the solid solution limit of aluminum in the vicinity of the heat treatment temperature, as shown in FIG. 3, has been widely used.

Solid solubility of silicon in aluminum (solid solubility limit)
Is 0.25wt.% At 400 ℃, 0.5wt.% At 450 ℃, 0.8wt. At 500 ℃
%, And the silicon content in the Al—Si alloys that have been practically used in the past is about 1.0 to 2.0 wt.%, Which is slightly higher than the above-described solid solubility, and is the mainstream.

However, even if the Al-Si alloy is used as the wiring material as described above, as the integration of the semiconductor device progresses and the element size becomes further finer and enters the submicron region, the conventional Al
Two major problems have arisen in Si wiring. That is, as shown in FIG. 4C, in the heat treatment at 400 to 500 ° C. performed after the formation of the Al—Si wiring 5, the generation of alloy pits in the contact hole 4 region can be prevented, but the other two failure modes can be prevented. Has occurred.

One of the failure modes is a silicon deposition phenomenon in which excess silicon contained in the Al-Si wiring 5 is deposited in the contact hole 4 portion by solid phase epitaxial growth using substrate silicon as a seed crystal during heat treatment. The deposited silicon 8 is close to an intrinsic semiconductor and has a very high specific resistance value. Therefore, when silicon is deposited on a part or all of the sub-micron level contact hole 4, the wiring 5 and the impurity diffusion layer 2 are separated from each other. The contact resistance becomes extremely high and electrical failure occurs.

The other failure mode is a phenomenon in which silicon excessively contained in the Al-Si wiring 5 is deposited in the wiring at the sub-micron level and forms a mass called a silicon nodule 9. This silicon nodule 9 is also close to an intrinsic semiconductor and has a very high specific resistance value. The size is also 1μ
Since it grows up to about m, the effective wiring cross-sectional area is locally reduced, so that the current density in this portion remarkably increases, and heat generation due to electromigration and mis-fishing easily occur. was there.

Therefore, an object of the present invention is to eliminate the above-mentioned problems and prevent the precipitation of silicon contained in aluminum alloy wiring in the contact hole portion and the generation of silicon nodules in the wiring, thereby making it stable. An object is to provide a highly reliable semiconductor device.

[Means for Solving Problems] A semiconductor device according to the present invention includes an aluminum alloy film containing aluminum as a main component as a wiring material. The aluminum alloy film contains x as a constituent element of the semiconductor substrate and contains y of at least one element selected from carbon, tin and lead. The silicon content x is 0 <x <0.8 wt.%, And the content y is 0.2 <y <
2.0 wt.%. The contents x and y of these are x + y
Satisfies the relationship of <2.0 wt.%.

[Operation] Since the wiring material according to the present invention has a silicon content below the solid solubility limit, generation of silicon nodules and deposition of silicon in the contact hole portion during heat treatment are suppressed. Further, although the silicon content in the wiring is reduced, at least one element different from silicon in the same group as silicon that is a constituent element of the semiconductor substrate in the periodic table is used.
Since the silicon in the impurity diffusion layer does not form a solid solution in the aluminum alloy wiring layer because the seeds are contained, and therefore aluminum does not diffuse into the impurity diffusion layer, it is possible to prevent the occurrence of alloy pits. it can.

[Embodiment of the Invention] FIG. 1 is a diagram showing a schematic sectional structure of a contact hole portion of a semiconductor device according to an embodiment of the present invention. First
In the figure, a semiconductor device according to the present invention includes a semiconductor substrate 1 made of silicon, and an impurity diffusion layer 2 serving as an active region formed in a predetermined region on the surface of the semiconductor substrate 1.
A base insulating film 3 formed to protect and stabilize the surface of the semiconductor substrate 1, an alloy pit and a silicon nodule electrically connected to the impurity diffusion layer 2 through the contact hole 4. Wiring 21 made of an Al—Si—Sn alloy capable of preventing generation, final protective film 6 formed on wiring 21 and underlying insulating film 3, and final protective film 6
Of the bonding pad area opening 7 for electrically connecting the wiring 21 to the outside.

2A to 2D are process cross-sectional views showing a wiring forming method for a semiconductor device according to an embodiment of the present invention. Less than,
A wiring forming method for a semiconductor device according to an embodiment of the present invention will be described with reference to FIGS. 2A to 2D.

In FIG. 2A, as in the conventional case, an impurity diffusion layer 2 to be an active region is formed in a predetermined region on the surface of the silicon semiconductor substrate 1 by using a photolithography technique and an ion implantation method.
To form. Next, a base insulating film 3 made of a PSG film or the like is formed for the purpose of stabilizing and protecting the surface of the semiconductor substrate 1. Next, a contact hole 4 for forming an electrical connection with the impurity diffusion layer 2 is formed in a predetermined region of the base insulating film 3 using photolithography and etching techniques.

In Fig. 2B, using the sputtering method or vacuum deposition method, etc.
After depositing the Al-Si-Sn alloy film on the entire exposed surface, the Al-Si of the desired shape is formed using photolithography and etching techniques.
-Sn wiring 21 is formed.

Here, the silicon content in the Al-Si-Sn wiring 21 is set in order to prevent silicon precipitation in the contact hole portion and generation of silicon nodules in the wiring 21 during heat treatment at 400 to 500 ° C in the next step. A value less than or equal to the solid solubility of silicon (solid solubility limit) in aluminum in this temperature range, 0
~ 0.8wt.% However, if the silicon content is simply reduced, when the heat treatment at 400 to 500 ° C. for realizing good ohmic contact in the next step is performed, the silicon of the impurity diffusion layer 2 is solid-solved in the wiring, and Alloy
Pits are generated in the impurity diffusion layer 2. Therefore, in order to prevent the silicon of the impurity diffusion layer 2 from forming a solid solution in the wiring, tin Sn, which is a member of the semiconductor substrate 1 and is in the same family as the periodic table, is added. The amount of tin added to prevent the formation of alloy pits depends on the silicon content in the wiring 21, but an effect of about 0.2 to 2.0 wt.% Is obtained. However, the sum x + y of the silicon addition amount x and the tin addition amount y is
In order to prevent the precipitation of silicon, the content is set to 2.0 wt.% Or less. Further, tin is an element having a property physically similar to that of silicon, but since it is an element different from silicon, it suppresses silicon precipitation in the contact hole 4 due to solid phase epitaxial growth of silicon. The addition is effective. Further, Sn is a homologous element to Si, and its physical and chemical properties are similar to those of Si, so it does not become a mobile ion and adversely affects the device characteristics.

In FIG. 2C, in order to form a good ohmic contact between the wiring 21 and the impurity diffusion layer 2, heat treatment is performed at 400 to 500 ° C. for several tens of minutes in a nitrogen or hydrogen atmosphere, and Al is formed in the contact hole 4 region. A eutectic reaction is caused at the interface between the -Si-Sn wiring 21 and the impurity diffusion layer 2. At this time, wiring 21
Since the silicon content of is suppressed below its solid solubility limit, neither precipitation of silicon nor silicon nodules due to solid phase epitaxial growth occurs. Further, since the total amount of silicon and tin is added above the solid solution limit in this temperature range, the silicon of the impurity diffusion layer 2 does not dissolve into the arrangement line 21 and alloy pits do not occur. .

In Fig. 2D, the silicon oxide film / P
After depositing an insulating film such as an SG film or a silicon nitride film as the final protective film 6 on the exposed whole surface, the opening 7 for the bonding pad region for electrically connecting the wiring 21 and the outside is formed by photolithography and etching techniques. Is used to form in a predetermined region of the final protective film 6.

In the above examples, the case where tin Sn was added as a homologous element in the periodic table with silicon, which is a constituent element of the semiconductor substrate, was shown as the wiring material, but carbon, which is another homologous element, is used. May be. Even in this case, these elements should be 0.2 to 2.0w depending on the silicon content of the wiring.
If t.% is added, the same effect as in the above embodiment can be obtained.

Furthermore, in the above-mentioned embodiment, the case where a ternary alloy in which one kind of element different from silicon in the same group as the semiconductor substrate constituent element is added to the Al-Si alloy is used as the wiring material is described. The added multi-component alloy may be used as a wiring material. In this case, the total amount of added homologous elements is 0.2-2.0w depending on the silicon content of the wiring.
If it is t.%, it is possible to obtain the same effect as in the above embodiment.

Further, even if a binary alloy or a multi-component alloy in which at least one element different from silicon in the same group as the semiconductor substrate constituent element is added to pure aluminum as the wiring material is used as the wiring material, The same effect as the embodiment can be obtained.

[Effects of the Invention] As described above, according to the present invention, as the wiring material in the semiconductor device, the content of silicon is reduced in the aluminum simple substance or the Al-Si alloy, and it is different from the silicon of the same group as the constituent elements of the semiconductor substrate. Since the aluminum alloy to which at least one element is added is used, it is possible to prevent alloy pits and silicon precipitation in the contact hole portion in the heat treatment step after forming the aluminum alloy wiring and generation of silicon nodules in the wiring. Short circuit between the wiring layer and the semiconductor substrate due to penetration of the impurity diffusion layer, increase in contact resistance, and
It is possible to prevent deterioration of migration resistance,
It is possible to realize a stable and highly reliable semiconductor device.

[Brief description of drawings]

FIG. 1 is a diagram showing a schematic sectional structure of a contact hole portion of a semiconductor device according to an embodiment of the present invention. 2A to 2D are process sectional views showing a wiring forming method of a semiconductor device according to an embodiment of the present invention. Fig. 3 shows the conventional Al-
FIG. 3 is a diagram showing a schematic cross-sectional structure in a contact hole region of a semiconductor device using Si alloy wiring. FIGS. 4A to 4D are process cross-sectional views showing a wiring forming method in a conventional semiconductor device. FIG. 5 is a schematic sectional view of a semiconductor device using pure aluminum as a wiring material. In the figure, 1 is a semiconductor substrate, 2 is an impurity diffusion layer, 3 is a base insulating film, 4 is a contact hole, and 21 is an Al-Si-Sn alloy wiring. In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] 1. An impurity diffusion region formed in a predetermined region of a portion of the substrate surface made of silicon, and an aluminum alloy film containing aluminum as a main component. A wiring layer formed on the substrate for performing transfer, the wiring layer contains at least one element selected from the group consisting of carbon, tin and lead, and silicon, and contains silicon. The amount x is 0 <x <0.8 wt.%, And the content y of the at least one element is 0.2 <y <
2.0 wt.%, And further, the contents x and y are x + y <2.0 wt.
A semiconductor device that satisfies the relationship of%.