JPH08167646A - Simox substrate, manufacture of simox substrate and manufacture of semiconductor device - Google Patents

Simox substrate, manufacture of simox substrate and manufacture of semiconductor device

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Publication number
JPH08167646A
JPH08167646A JP6308693A JP30869394A JPH08167646A JP H08167646 A JPH08167646 A JP H08167646A JP 6308693 A JP6308693 A JP 6308693A JP 30869394 A JP30869394 A JP 30869394A JP H08167646 A JPH08167646 A JP H08167646A
Authority
JP
Japan
Prior art keywords
substrate
single crystal
silicon single
oxide film
simox
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6308693A
Other languages
Japanese (ja)
Inventor
Minoru Fujii
稔 藤井
Takashi Nakabayashi
隆 中林
Takehiro Hirai
健裕 平井
Michiichi Matsumoto
道一 松元
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP6308693A priority Critical patent/JPH08167646A/en
Publication of JPH08167646A publication Critical patent/JPH08167646A/en
Pending legal-status Critical Current

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  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)

Abstract

PURPOSE: To realize an SIMOX substrate with a thick silicon single crystalline thin film having two or more kinds of film thicknesses. CONSTITUTION: The SIMOX substrate has a silicon single crystalline thin film 25 of two or more kinds of different film thicknesses (that is, there are two or more kinds of depths from a substrate surface to a buried oxide film 26). After a silicon oxide film mask 23 is partially arranged in a desired region on a silicon single crystalline substrate 21, oxygen ion is implanted and high temperature treatment is performed for it. A film thickness of the silicon oxide film mask 23 is selected not to completely check oxygen ion implantation but to allow oxygen ion concentration to peak at a desired depth in the silicon single crystalline substrate 21.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はシリコン基板及びその製
造方法に関するもので、特にSIMOX(SEPARATION BY
IMPLANTED OXYGEN)基板とその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a silicon substrate and a method for manufacturing the same, and more particularly to SIMOX (SEPARATION BY
IMPLANTED OXYGEN) substrate and its manufacturing method.

【0002】[0002]

【従来の技術】近年、半導体LSIは高集積化、高速
化、低電力化等の要請により種々の改造がなされている
が、更なる高速化、低電力化を達成するためには、寄生
容量を大幅に低減する必要が生じている。寄生容量を大
幅に低減する最も有望な方法の一つとして、SOI(SILICO
N ON INSULATOR)構造が考えられている。
2. Description of the Related Art In recent years, semiconductor LSIs have undergone various modifications due to demands for higher integration, higher speed, lower power consumption, etc. In order to achieve further higher speed and lower power consumption, parasitic capacitance must be used. It is necessary to significantly reduce As one of the most promising methods to significantly reduce the parasitic capacitance, SOI (SILICO
N ON INSULATOR) structure is considered.

【0003】SOI基板では、絶縁膜上にシリコン単結
晶薄膜が形成されており、そのシリコン単結晶薄膜上に
トランジスタが形成される。一例として、絶縁膜上のシ
リコン単結晶薄膜が非常に薄いSOI基板上にMOSトランジ
スタを形成すると、ソース電極及びドレイン電極の底部
が直接絶縁膜に接するため、寄生容量を大幅に低減でき
る。現在量産レベルで主流になりつつある0.5μmル
ールのMOSプロセスでは、ソース電極及びドレイン電
極の深さは約200nm程度であるため、SOI構造の
特徴である低寄生容量を十分生かしたMOSトランジス
タを形成するためには、絶縁膜上のシリコン単結晶薄膜
の厚さが200nm以下のSOI基板を用いる必要があ
る。
In an SOI substrate, a silicon single crystal thin film is formed on an insulating film, and a transistor is formed on the silicon single crystal thin film. As an example, when a MOS transistor is formed on an SOI substrate in which the silicon single crystal thin film on the insulating film is extremely thin, the bottoms of the source electrode and the drain electrode are in direct contact with the insulating film, so that the parasitic capacitance can be significantly reduced. In the 0.5 μm rule MOS process that is becoming mainstream at the mass production level, the depth of the source electrode and the drain electrode is about 200 nm, so a MOS transistor that makes full use of the low parasitic capacitance that is a characteristic of the SOI structure is used. In order to form it, it is necessary to use an SOI substrate in which the thickness of the silicon single crystal thin film on the insulating film is 200 nm or less.

【0004】SIMOX(SEPARATION BY IMPLANTED
OXGEN)基板は、SOI基板の一種であり、上述のような
非常に薄いシリコン単結晶薄膜を埋め込みシリコン酸化
膜上に容易に形成することができる。図5に従来のSI
MOX基板の構造を示す。SIMOX基板の製造方法は
以下の通りである。まず、シリコン単結晶基板51に酸
素イオンを例えばエネルギー180KeV,ドーズ量7
e17/cm2注入する。その後、例えば1320度で
6時間の高温熱処理を行い、均一な埋め込みシリコン酸
化膜52を形成するとともに、イオン注入による結晶欠
陥の除去を行い、埋め込みシリコン酸化膜52上に高品
質のシリコン単結晶薄膜53を形成する。
SIMOX (SEPARATION BY IMPLANTED
The OXGEN) substrate is a kind of SOI substrate, and the extremely thin silicon single crystal thin film as described above can be easily formed on the buried silicon oxide film. Figure 5 shows the conventional SI
The structure of a MOX board | substrate is shown. The method of manufacturing the SIMOX substrate is as follows. First, oxygen ions are applied to the silicon single crystal substrate 51, for example, with an energy of 180 KeV and a dose of 7
e17 / cm2 injection. After that, high-temperature heat treatment is performed at, for example, 1320 ° C. for 6 hours to form a uniform buried silicon oxide film 52, and crystal defects are removed by ion implantation, and a high quality silicon single crystal thin film is formed on the buried silicon oxide film 52. 53 is formed.

【0005】[0005]

【発明が解決しようとする課題】しかしながら上記の方
法で形成された従来のSIMOX基板では、埋め込みシ
リコン酸化膜上のシリコン単結晶薄膜の厚さが基板全面
で一定(埋め込みシリコン酸化膜の深さが一定)である
ため、例えば同一基板上にMOSトランジスタとBipolarト
ランジスタを混載するBiCMOSプロセスの場合、MOSトラ
ンジスタとBipolarトランジスタで最適なシリコン単結
晶薄膜の膜厚が異なるため、いずれかのトランジスタの
性能を犠牲にせざるを得ないという問題点を有してい
た。例えば図6に示すように、SIMOX基板上に縦形
高速Bipolarトランジスタ614を形成する場合、シリ
コン単結晶薄膜の膜厚として0.4μm程度以上必要だ
が、その場合同一基板上に形成されたMOSトランジスタ
613のソース電極606及びドレイン電極605の底
部はは埋め込み酸化膜に接しないため、MOSトランジス
タの性能はシリコンバルク基板に形成したものと同等で
あり、SOI基板を用いることのメリットはまったく得ら
れない。また、MOSトランジスタに適した0.2μm程度の
厚さのシリコン単結晶薄膜を用いると、縦形Bipolarト
ランジスタは形成できないため性能の劣る横形Bipolar
トランジスタを用いらずを得ない。
However, in the conventional SIMOX substrate formed by the above method, the thickness of the silicon single crystal thin film on the buried silicon oxide film is constant over the entire surface (the depth of the buried silicon oxide film is small). For example, in the case of BiCMOS process in which MOS transistor and Bipolar transistor are mixedly mounted on the same substrate, the optimal silicon single crystal thin film thickness is different between MOS transistor and Bipolar transistor. It had a problem that it had to be sacrificed. For example, as shown in FIG. 6, when the vertical high-speed bipolar transistor 614 is formed on the SIMOX substrate, the film thickness of the silicon single crystal thin film needs to be 0.4 μm or more. In that case, the MOS transistor 613 formed on the same substrate should Since the bottoms of the source electrode 606 and the drain electrode 605 are not in contact with the buried oxide film, the performance of the MOS transistor is equivalent to that formed on the silicon bulk substrate, and the merit of using the SOI substrate cannot be obtained at all. Also, if a silicon single crystal thin film with a thickness of about 0.2 μm, which is suitable for MOS transistors, is used, vertical Bipolar transistors cannot be formed, and horizontal Bipolar
You can't get it without using a transistor.

【0006】そこで、本発明は上記問題点を鑑み、2種
類以上の異なったデバイスを、それぞれのデバイスに最
適な膜厚のシリコン単結晶薄膜上に形成することが可能
なSIMOX基板とその製造方法を提供することを目的
とする。
In view of the above problems, the present invention is capable of forming two or more different types of devices on a silicon single crystal thin film having a film thickness optimal for each device, and a method of manufacturing the same. The purpose is to provide.

【0007】[0007]

【課題を解決するための手段】上記問題点を解決するた
めに本発明のSIMOX基板及びSIMOX基板の製造
方法は、同一基板面内で2種類以上の異なった膜厚のシ
リコン単結晶薄膜を有する(同一基板面内で基板表面か
ら埋め込み酸化膜までの深さが2種類以上存在する)S
IMOX基板を提供することを特徴とする。
In order to solve the above problems, a SIMOX substrate and a method for manufacturing a SIMOX substrate according to the present invention have two or more kinds of silicon single crystal thin films having different thicknesses in the same substrate plane. (There are two or more depths from the substrate surface to the buried oxide film within the same substrate surface) S
An IMOX substrate is provided.

【0008】また、この構造を実現するためにシリコン
単結晶基板上の所望の領域にマスク材を部分的に配置し
た後、酸素イオンを注入し、高温熱処理を行う。このと
き、前記マスク材の膜厚は、酸素イオンの注入を完全に
阻止するのではなく、シリコン単結晶基板中の所望の深
さに、注入された酸素イオンの濃度ピークがくるように
選択する。
In order to realize this structure, a mask material is partially arranged in a desired region on a silicon single crystal substrate, oxygen ions are implanted, and high temperature heat treatment is performed. At this time, the film thickness of the mask material is selected so that the implantation of oxygen ions is not completely blocked but the concentration peak of the implanted oxygen ions comes to a desired depth in the silicon single crystal substrate. .

【0009】[0009]

【作用】本発明は上記した構成によって、2種類以上の
膜厚のシリコン単結晶薄膜を有したSIMOX基板を提
供することにより、同一SIMOX基板上に、2種類以
上のトランジスタをそれぞれのトランジスタに最適なシ
リコン単結晶薄膜上にすることを可能とする。
According to the present invention, by providing the SIMOX substrate having the silicon single crystal thin film having two or more kinds of film thicknesses according to the above-mentioned constitutions, two or more kinds of transistors are optimal for each transistor on the same SIMOX substrate. It is possible to form a thin silicon single crystal thin film.

【0010】[0010]

【実施例】以下本発明の実施例について、図面を参照し
ながら説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0011】(実施例1)図1は本発明の第一の実施例
のSIMOX基板の断面構造を示すものである。シリコ
ン単結晶基板11中に埋め込みシリコン酸化膜12が形
成され、埋め込みシリコン酸化膜12上に素子形成のた
めのシリコン単結晶薄膜13が存在し、この点では従来
のSIMOX基板と同様である。但し、シリコン単結晶
薄膜13の膜厚はシリコン単結晶基板面内で分布を持っ
ており、Bipolarトランジスタが形成される領域15で
は膜厚は例えば400nmになっており、MOSトラン
ジスタが形成される領域14では膜厚は例えば200n
mになっている点が相違する。また、本発明のSIMO
X基板の特徴として、シリコン単結晶基板11の表面は
平らであり、シリコン単結晶基板の表面から埋め込みシ
リコン酸化膜までの深さを変化させることにより、上記
シリコン単結晶薄膜13の膜厚を変化させている。
(Embodiment 1) FIG. 1 shows a sectional structure of a SIMOX substrate according to a first embodiment of the present invention. A buried silicon oxide film 12 is formed in a silicon single crystal substrate 11, and a silicon single crystal thin film 13 for device formation is present on the buried silicon oxide film 12, which is similar to the conventional SIMOX substrate. However, the film thickness of the silicon single crystal thin film 13 has a distribution in the surface of the silicon single crystal substrate, and the film thickness is, for example, 400 nm in the region 15 where the bipolar transistor is formed. 14, the film thickness is 200 n, for example.
The difference is that it is m. In addition, the SIMO of the present invention
As a characteristic of the X substrate, the surface of the silicon single crystal substrate 11 is flat, and the film thickness of the silicon single crystal thin film 13 is changed by changing the depth from the surface of the silicon single crystal substrate to the embedded silicon oxide film. I am letting you.

【0012】図2は、図1に示す本実施例のSIMOX
基板を形成する製造工程を示す断面図である。
FIG. 2 shows the SIMOX of this embodiment shown in FIG.
It is sectional drawing which shows the manufacturing process which forms a board | substrate.

【0013】まず、図2(a)に示すように、シリコン
単結晶基板21上にシリコン酸化膜22を堆積し、通常
のフォトリソグラフィー工程とエッチング工程で、任意
の部分にシリコン酸化膜マスク23を形成する(図2
(b))。ここで、シリコン酸化膜マスク23は、次の
酸素イオン注入工程で注入された酸素イオンのシリコン
単結晶基板中での深さをコントロールする役割を果たす
ために形成されているが、イオン注入される酸素イオン
の深さを所望の深さにするためには、適宜シリコン酸化
膜マスク23の膜厚を選択する必要がある。本実施例で
は、例えば膜厚は250nmとしてシリコン酸化膜23
を形成する。
First, as shown in FIG. 2A, a silicon oxide film 22 is deposited on a silicon single crystal substrate 21, and a silicon oxide film mask 23 is formed on an arbitrary portion by a usual photolithography process and etching process. Form (Fig. 2
(B)). Here, the silicon oxide film mask 23 is formed to play a role of controlling the depth in the silicon single crystal substrate of the oxygen ions implanted in the next oxygen ion implantation step, but the ion implantation is performed. In order to set the oxygen ion depth to a desired depth, it is necessary to appropriately select the film thickness of the silicon oxide film mask 23. In this embodiment, the silicon oxide film 23 has a thickness of 250 nm, for example.
To form.

【0014】次に図2(c)に示すように、酸素イオン
を例えばエネルギー180keV,ドーズ量7e17/
cm2の条件にて注入しする。そうすると、シリコン単
結晶基板上のシリコン酸化膜マスク23が存在しない領
域では、酸素イオンの濃度のピークは表面から約400
nmに存在し、一方、シリコン酸化膜マスク23が存在
する領域では、酸素イオンの濃度のピークはシリコン単
結晶基板の表面から約150nmに存在することにな
る。
Next, as shown in FIG. 2 (c), oxygen ions, for example, have an energy of 180 keV and a dose of 7e17 /
Inject under the condition of cm 2 . Then, in the region on the silicon single crystal substrate where the silicon oxide film mask 23 does not exist, the peak of the concentration of oxygen ions is about 400 from the surface.
On the other hand, in the region where the silicon oxide film mask 23 is present, the peak concentration of oxygen ions is present at about 150 nm from the surface of the silicon single crystal substrate.

【0015】最後に図2(d)に示すように、シリコン
酸化膜マスク23を除去した後、例えば1320度で6
時間の高温熱処理を行い、均一な埋め込みシリコン酸化
層26を形成するとともに、イオン注入による結晶欠陥
の除去を行い、シリコン酸化膜26上に高品質なシリコ
ン単結晶薄膜25を形成する。なお、本実施例の条件で
は、埋め込み酸化膜26の膜厚は約80nmとなる。ま
た、シリコン酸化膜マスクの存在しない領域でのシリコ
ン単結晶薄膜25の膜厚は約350nm、膜厚250n
mのシリコン酸化膜マスク23が存在する領域でのシリ
コン単結晶薄膜25の膜厚は約100nmとなる。
Finally, as shown in FIG. 2 (d), after removing the silicon oxide film mask 23, for example, at 1320 degrees, 6
A high temperature heat treatment is performed for a time to form a uniform buried silicon oxide layer 26, and a crystal defect is removed by ion implantation to form a high quality silicon single crystal thin film 25 on the silicon oxide film 26. Under the conditions of this embodiment, the thickness of the buried oxide film 26 is about 80 nm. Further, the film thickness of the silicon single crystal thin film 25 in the region where the silicon oxide film mask does not exist is about 350 nm and the film thickness is 250 n.
The film thickness of the silicon single crystal thin film 25 in the region where the m silicon oxide film mask 23 exists is about 100 nm.

【0016】以上図2に示したSIMOX基板の製造方
法により、埋め込みシリコン酸化膜の形成される位置が
基板の深さ方向に異なるSIMOX基板を形成すること
ができ、2種類以上の膜厚の異なるシリコン単結晶薄膜
を有したSIMOX基板を形成することができる。
By the method of manufacturing a SIMOX substrate shown in FIG. 2 as described above, it is possible to form a SIMOX substrate in which the position where the embedded silicon oxide film is formed is different in the depth direction of the substrate, and two or more different types of film thickness are different. A SIMOX substrate having a silicon single crystal thin film can be formed.

【0017】本実施例で形成したSIMOX基板をBi
CMOSデバイスに適用する場合、Bipolarトラ
ンジスタ部分のシリコン単結晶膜厚は400nm以上が
望ましいが、酸素イオンを180keV以上の高エネル
ギーで高Dose注入するのは、現在の技術では余り現
実的ではない。従って、例えばBipolarトランジ
スタに450nmの膜厚が必要な場合は、高エネルギー
のDose注入は行わず、低エネルギーでDoes注入
を行うが、その際に、埋め込みシリコン酸化膜の形成さ
れる位置は上記の実施例に比較して浅く形成した後、図
2(d)の状態からシリコンを100nmエピタキシャ
ル成長させてやればよい。この場合、シリコン酸化膜マ
スク23が存在しなかった領域のシリコン単結晶薄膜2
5の厚さは450nmになり、シリコン酸化膜マスク2
3が存在した領域での膜厚は200nmになる。
The SIMOX substrate formed in this embodiment is made into Bi
When applied to a CMOS device, it is desirable that the silicon single crystal film thickness of the Bipolar transistor portion is 400 nm or more, but it is not very realistic in the current technology to implant oxygen ions with high dose and high energy of 180 keV or more. Therefore, for example, when a film thickness of 450 nm is required for a Bipolar transistor, Does implantation with high energy is not performed, and Does implantation is performed with low energy. At that time, the position where the embedded silicon oxide film is formed is the above-mentioned. After being formed shallower than in the embodiment, silicon may be epitaxially grown to a thickness of 100 nm from the state of FIG. In this case, the silicon single crystal thin film 2 in the region where the silicon oxide film mask 23 did not exist
The thickness of 5 becomes 450 nm, and the silicon oxide mask 2
The film thickness in the region where 3 was present is 200 nm.

【0018】図3に上述のSIMOX基板上に形成した
BiCMOSデバイスの断面図を示す。縦形Bipol
arトランジスタ314のn+埋め込み層308及び、
MOSトランジスタ313のソース電極306、ドレイ
ン電極305の底部が共に埋め込みシリコン酸化膜30
2に直接接しているため、非常に寄生容量の小さいBi
polarトランジスタとMOSトランジスタを両立し
た高性能なBiCMOSデバイスを形成することができ
る。
FIG. 3 is a sectional view of a BiCMOS device formed on the SIMOX substrate described above. Vertical Bipol
n + buried layer 308 of the ar transistor 314, and
The bottom portions of the source electrode 306 and the drain electrode 305 of the MOS transistor 313 are both embedded silicon oxide film 30.
Since it is in direct contact with 2, Bi with a very small parasitic capacitance
It is possible to form a high-performance BiCMOS device having both polar transistors and MOS transistors.

【0019】なお、本実施例では、2種類の膜厚のシリ
コン単結晶薄膜を有するSIMOX基板とその製造方法
を示したが、シリコン酸化膜マスクの膜厚を2段階以上
に変化させたり、酸素の注入条件を変化させることによ
り、3種類以上の膜厚のシリコン単結晶薄膜を有するS
IMOX基板を形成することも可能である。
In this embodiment, the SIMOX substrate having the silicon single crystal thin film having two kinds of film thickness and the manufacturing method thereof are shown. However, the film thickness of the silicon oxide film mask is changed in two or more steps, and S having a silicon single crystal thin film having three or more kinds of film thicknesses by changing the implantation conditions of S
It is also possible to form an IMOX substrate.

【0020】(実施例2)図4は本発明の第二の実施例
におけるSIMOX基板の断面構造を示したものであ
る。図4において、シリコン単結晶基板41中に埋め込
みシリコン酸化膜42が形成され、シリコン酸化膜42
上に素子形成のためのシリコン単結晶薄膜43が存在し
ている。ここで、本実施例の特徴としては、シリコン単
結晶基板面内の所定の部分44でシリコン単結晶薄膜の
膜厚が0になっている。つまり、埋め込みシリコン酸化
膜42上にシリコン単結晶薄膜43の島が完全に孤立し
た状態になっている。
(Embodiment 2) FIG. 4 shows a sectional structure of a SIMOX substrate according to a second embodiment of the present invention. In FIG. 4, a buried silicon oxide film 42 is formed in a silicon single crystal substrate 41.
A silicon single crystal thin film 43 for forming an element is present thereabove. Here, the feature of this embodiment is that the film thickness of the silicon single crystal thin film is 0 at a predetermined portion 44 in the surface of the silicon single crystal substrate. That is, the islands of the silicon single crystal thin film 43 are completely isolated on the embedded silicon oxide film 42.

【0021】上記のようにシリコン単結晶薄膜43の島
が完全に孤立した状態のSIMOX基板を用いると、本
来、以降の工程で形成されるべきトレンチ分離等の素子
分離を形成する必要がなくなり、工程を短縮することが
できる。
When the SIMOX substrate in which the islands of the silicon single crystal thin film 43 are completely isolated as described above is used, it is not necessary to form an element isolation such as a trench isolation which is originally formed in the subsequent steps, The process can be shortened.

【0022】本実施例の構造は第一の実施例のSIMO
X基板の製造方法と全く同じ方法で形成できる。ただ
し、シリコン酸化膜マスクの膜厚と酸素イオンの注入条
件を変更し、シリコン単結晶基板の表面に埋め込みシリ
コン酸化膜が形成されるようにする必要がある。具体的
に述べると、例えば第一の実施例における図2に示した
酸素イオンの注入条件の場合は、シリコン酸化膜マスク
の膜厚を約350nmにすると、シリコン酸化膜マスク
が存在する領域には、表面にシリコン単結晶薄膜が存在
せず、埋め込みシリコン酸化膜を基板表面に露出させる
ことができる。
The structure of this embodiment is SIMO of the first embodiment.
It can be formed by exactly the same method as the manufacturing method of the X substrate. However, it is necessary to change the film thickness of the silicon oxide film mask and the implantation conditions of oxygen ions so that the embedded silicon oxide film is formed on the surface of the silicon single crystal substrate. Specifically, for example, under the oxygen ion implantation conditions shown in FIG. 2 in the first embodiment, if the thickness of the silicon oxide film mask is set to about 350 nm, the region where the silicon oxide film mask exists will be Since the silicon single crystal thin film does not exist on the surface, the embedded silicon oxide film can be exposed on the substrate surface.

【0023】なお、本実施例と第一の実施例を組み合わ
せ、同一SIMOX基板上に、MOSトランジスタ形成
領域と、Bipolarトランジスタ形成領域と、素子
分離領域を同時に形成することも可能となることは言う
までもない。
It is needless to say that the MOS transistor formation region, the Bipolar transistor formation region, and the element isolation region can be simultaneously formed on the same SIMOX substrate by combining this embodiment and the first embodiment. Yes.

【0024】[0024]

【発明の効果】以上のように、本発明は、2種類以上の
膜厚の異なるシリコン単結晶薄膜を有したSIMOX基
板を形成することができるため、同一SIMOX基板上
に、2種類以上のデバイスをそれぞれのデバイスに最適
なシリコン単結晶薄膜上に形成することにより、寄生容
量の小さい非常に高性能な集積回路を形成することがで
きる。また、本発明によれば、SIMOX基板形成時に
同時に素子分離領域を形成することが可能となり、素子
分離工程を簡略化することもできる。
As described above, according to the present invention, a SIMOX substrate having two or more kinds of silicon single crystal thin films having different film thicknesses can be formed. Therefore, two or more kinds of devices can be formed on the same SIMOX substrate. Is formed on a silicon single crystal thin film most suitable for each device, so that an extremely high-performance integrated circuit with small parasitic capacitance can be formed. Further, according to the present invention, the element isolation region can be formed at the same time when the SIMOX substrate is formed, and the element isolation process can be simplified.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例におけるSIMOX基板
の構造断面図
FIG. 1 is a structural cross-sectional view of a SIMOX substrate according to a first embodiment of the present invention.

【図2】本発明の第1の実施例におけるSIMOX基板
の製造工程断面図
FIG. 2 is a sectional view of the manufacturing process of the SIMOX substrate according to the first embodiment of the present invention.

【図3】本発明の第1の実施例におけるSIMOX基板
上に形成したデバイスの構造断面図
FIG. 3 is a structural cross-sectional view of a device formed on a SIMOX substrate according to the first embodiment of the present invention.

【図4】本発明の第2の実施例におけるSIMOX基板
の構造断面図
FIG. 4 is a structural sectional view of a SIMOX substrate according to a second embodiment of the present invention.

【図5】従来のSIMOX基板の構造断面図FIG. 5 is a structural sectional view of a conventional SIMOX substrate.

【図6】従来のSIMOX基板上に形成したBiCMO
Sデバイスの構造断面図
FIG. 6 is a BiCMO formed on a conventional SIMOX substrate.
Structural cross section of S device

【符号の説明】[Explanation of symbols]

11、21、301、41、51、601 シリコン単
結晶基板 12、26、302、42、52、602 埋め込みシ
リコン酸化膜 13、25、303、43、53、603 シリコン単
結晶薄膜 23 シリコン酸化膜マスク 314、614 縦形Bipolarトランジスタ 313、613 MOSトランジスタ 305、605 ソース電極 306、606 ドレイン電極
11, 21, 301, 41, 51, 601 Silicon single crystal substrate 12, 26, 302, 42, 52, 602 Embedded silicon oxide film 13, 25, 303, 43, 53, 603 Silicon single crystal thin film 23 Silicon oxide film mask 314, 614 Vertical Bipolar transistor 313, 613 MOS transistor 305, 605 Source electrode 306, 606 Drain electrode

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01L 27/08 331 E 27/12 E 29/786 9056−4M H01L 29/78 613 Z 9056−4M 621 (72)発明者 松元 道一 大阪府門真市大字門真1006番地 松下電器 産業株式会社内─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Internal reference number FI Technical indication location H01L 27/08 331 E 27/12 E 29/786 9056-4M H01L 29/78 613 Z 9056-4M 621 (72) Inventor Doichi Matsumoto 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】シリコン単結晶基板と、前記シリコン単結
晶基板上に形成された埋め込みシリコン酸化膜層と、前
記シリコン酸化膜層上に形成されたシリコン単結晶薄膜
層とを有するSIMOX基板であって、前記SIMOX
基板の所定の領域の前記埋め込みシリコン酸化膜層が、
その他の領域の前記埋め込みシリコン酸化膜層より上部
に存在していることを特徴とするSIMOX基板。
1. A SIMOX substrate having a silicon single crystal substrate, a buried silicon oxide film layer formed on the silicon single crystal substrate, and a silicon single crystal thin film layer formed on the silicon oxide film layer. And the SIMOX
The buried silicon oxide layer in a predetermined region of the substrate,
A SIMOX substrate, which is present in the other region above the buried silicon oxide film layer.
【請求項2】シリコン単結晶基板と、前記シリコン単結
晶基板上に形成された埋め込みシリコン酸化膜層と、前
記シリコン酸化膜層上に形成されたシリコン単結晶薄膜
層とを有するSIMOX基板であって、前記SIMOX
基板の所定の領域の前記埋め込みシリコン酸化膜層が、
その他の領域の前記埋め込みシリコン酸化膜層より上部
に存在し、かつ、前記所定の領域の前記埋め込みシリコ
ン酸化膜の表面が露出していることを特徴とするSIM
OX基板。
2. A SIMOX substrate having a silicon single crystal substrate, a buried silicon oxide film layer formed on the silicon single crystal substrate, and a silicon single crystal thin film layer formed on the silicon oxide film layer. And the SIMOX
The buried silicon oxide layer in a predetermined region of the substrate,
The SIM which is present above the buried silicon oxide film layer in the other region, and the surface of the buried silicon oxide film in the predetermined region is exposed.
OX substrate.
【請求項3】シリコン単結晶基板表面の所望の領域にマ
スク材を部分的に配置する工程と、前記マスク材をマス
クとして前記シリコン単結晶基板表面に酸素イオンを注
入して埋め込み酸化膜層を形成する工程と、前記マスク
材を除去する工程と、前記酸素イオン注入の後に熱処理
を行う工程とを有するSIMOX基板の製造方法。
3. A step of partially disposing a mask material in a desired region on the surface of the silicon single crystal substrate, and implanting oxygen ions into the surface of the silicon single crystal substrate using the mask material as a mask to form a buried oxide film layer. A method of manufacturing a SIMOX substrate, which includes a step of forming, a step of removing the mask material, and a step of performing heat treatment after the oxygen ion implantation.
【請求項4】シリコン単結晶基板表面の所望の領域にマ
スク材を部分的に配置する工程と、前記マスク材をマス
クとして前記シリコン単結晶基板表面に酸素イオンを注
入して埋め込み酸化膜層を形成する工程と、前記マスク
材を除去する工程と、前記酸素イオン注入の後に熱処理
を行う工程とを有するSIMOX基板の製造方法であっ
て、前記マスク材を除去した際に前記マスク材の下部の
前記埋め込み酸化膜層の表面を露出させることを特徴と
するSIMOX基板の製造方法。
4. A step of partially disposing a mask material in a desired region on the surface of the silicon single crystal substrate, and implanting oxygen ions into the surface of the silicon single crystal substrate using the mask material as a mask to form a buried oxide film layer. A method of manufacturing a SIMOX substrate comprising: a step of forming, a step of removing the mask material, and a step of performing heat treatment after the oxygen ion implantation, wherein a lower part of the mask material when the mask material is removed. A method of manufacturing a SIMOX substrate, wherein the surface of the buried oxide film layer is exposed.
【請求項5】マスク材が注入される酸素イオンを透過す
ることを特徴とする請求項3または4いずれかに記載の
SIMOX基板の製造方法。
5. The method of manufacturing a SIMOX substrate according to claim 3, wherein the mask material is permeable to the implanted oxygen ions.
【請求項6】シリコン単結晶基板表面の所望の領域にマ
スク材を部分的に配置する工程と、前記マスク材をマス
クとして前記シリコン単結晶基板表面に酸素イオンを注
入して埋め込み酸化膜層を形成する工程と、前記マスク
材を除去する工程と、前記酸素イオン注入の後に熱処理
を行う工程と、前記シリコン単結晶基板表面の前記マス
クが配置された領域にMOS型トランジスタを形成する
工程と、前記シリコン単結晶基板表面の前記マスクが配
置されなかった領域にバイポーラトランジスタを形成す
る工程とを有する半導体装置の製造方法。
6. A step of partially disposing a mask material in a desired region of the surface of the silicon single crystal substrate, and implanting oxygen ions into the surface of the silicon single crystal substrate using the mask material as a mask to form a buried oxide film layer. A step of forming, a step of removing the mask material, a step of performing a heat treatment after the oxygen ion implantation, and a step of forming a MOS transistor in a region of the silicon single crystal substrate surface where the mask is arranged, And a step of forming a bipolar transistor on a region of the surface of the silicon single crystal substrate where the mask is not arranged.
JP6308693A 1994-12-13 1994-12-13 Simox substrate, manufacture of simox substrate and manufacture of semiconductor device Pending JPH08167646A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6308693A JPH08167646A (en) 1994-12-13 1994-12-13 Simox substrate, manufacture of simox substrate and manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6308693A JPH08167646A (en) 1994-12-13 1994-12-13 Simox substrate, manufacture of simox substrate and manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH08167646A true JPH08167646A (en) 1996-06-25

Family

ID=17984151

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6308693A Pending JPH08167646A (en) 1994-12-13 1994-12-13 Simox substrate, manufacture of simox substrate and manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH08167646A (en)

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Publication number Priority date Publication date Assignee Title
US6930359B2 (en) 1999-11-18 2005-08-16 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
US7588973B2 (en) 1999-11-18 2009-09-15 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
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US7064387B2 (en) 2001-02-19 2006-06-20 Samsung Electronics Co., Ltd. Silicon-on-insulator (SOI) substrate and method for manufacturing the same
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