JPH08166593A - Matrix type display device - Google Patents

Abstract

PURPOSE: To make it possible to decrease the signal delay in a defective source bus wiring corrected the disconnection of bus wiring and to correct the disconnection even if signal input is one-side input with both bus wirings. CONSTITUTION: A method for correction in the case a disconnected part 10 arises on the source bus line of a display electrode substrate is shown. The defective source bus wiring 1b having the disconnected part 10 is electrically connected to spare wirings 5b and 6 and intersected parts 11, 12 respectively. Further, a leader wire 9b connected to the one end of the spare wiring 5b and leader wires 7, 8 connected to both ends of the spare wiring 6 are electrically connected on the circuit board. Electrical connection is executed at three points in such a manner, by which both ends of the disconnected part 10 of the defective source bus wiring 1b are electrically connected via the circuit board. Further, the spare wirings 5b and 6 are respectively cut by the cut parts 13, 14. The disconnected part of the source bus wirings is thus corrected.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a matrix type display device, and more particularly to a matrix type display device having a function of correcting disconnection of bus wiring.

[0002]

2. Description of the Related Art Liquid crystal and EL (Electro-Lumin) are used as image display devices replacing CRTs (Cathode Ray Tubes).
Attention has been paid to a matrix type display device using a (luminescence) light emitter, a plasma light emitter and the like. Among them, liquid crystal display devices are widely used in portable televisions, word processors, personal computers and the like. The display devices used for these devices are desired to be finer and have a large display portion.

In order to display a fine image using a matrix type display device, it is necessary to make the size of picture elements forming a matrix very small and to use a large number of picture elements. As the number of picture elements increases, the number of bus lines functioning as scanning lines and signal lines also increases.
As the number of bus lines increases, a display defect due to disconnection is more likely to occur. In addition, the length of the bus wiring becomes longer with the increase in size of the display unit, and it is becoming more and more difficult to manufacture the bus wiring without breakage. Therefore, a matrix type display device having a function of correcting disconnection of bus wiring has been proposed. However, since it is desired to reduce the size and weight of the display device as a whole, a driver IC for inputting signals to the bus lines may be arranged on only one side of each bus line. In this display device, the disconnection of the bus wiring may not be corrected by the conventional method.

FIG. 3 is a block diagram of a conventional matrix type display device. In the figure, 41, 41a and 41b are source bus wirings, 42 is a gate bus wiring, 43a and 43b are one end of the source bus wiring, and 44 is a gate. One end of the bus wiring, 45a,
45b is spare wiring, 46 is spare wiring, 47, 48a, 4
Reference numeral 8b is a lead wire, 49 is a disconnection portion, 50 and 51 are intersecting portions, and 52 and 53 are cutting portions.

That is, the matrix type display device of FIG. 3 is composed of scanning lines and signal lines formed on a display electrode substrate, and only one side of each end of both bus lines is used for signal input. In the matrix type display device to which the driver film is connected, an example of the matrix type display device having a function of correcting a defect due to disconnection of bus wiring is shown. A large number of gate bus wirings 42 parallel to one direction
Further, a large number of source bus wirings 41 parallel to each other in one direction are provided so as to be orthogonal thereto. The source bus wiring 41 is composed of source bus wirings 41a and 41b. One ends 43a and 43b of the source bus lines 41a and 41b and one end 44 of the gate bus line 42 are connected to different driver ICs, respectively. The gate bus wiring 42 and the source bus wiring 41 intersect in a non-conducting state via an insulating film.

Gate bus wiring 42 and source bus wiring 4
In each rectangular region surrounded by 1, a pixel electrode and a TFT (Thin Film Transistor) as a switching element are provided, but the illustration is omitted for simplicity in FIG. A liquid crystal is enclosed between the picture element electrode and the counter electrode to form a matrix type liquid crystal display device.

At both ends of the source bus line 41, spare lines 45a, 45 are provided in parallel with the gate bus line 42.
b and the spare wiring 46 intersect with each other through the insulating film.
Lead wires 48 are provided at the ends of the spare wires 45a and 45b.
a and 48b are electrically connected. Leader line 48
Each of a and 48b is drawn out of the display electrode substrate. Similarly, a lead wire 47 is electrically connected to the end portion of the preliminary wiring 46 on the gate driver film side. The lead line 47 is led to the outside of the display electrode substrate.

FIGS. 4A and 4B are plan views showing examples of the source driver film and the gate driver film connected to the substrate of FIG. 3, in which 61 is a source driver film and 62 is a source driver. IC, 63 is a source bus connection line, 64 is a lead line, 65 is one end of the lead line, 66 is the other end of the lead line, 67 is a gate driver film, 68 is a gate driver IC, 69
Is a gate bus connection line, 70 is a lead line, 71 is one end of the lead line, and 72 is the other end of the lead line.

A source driver IC 62 is provided on the source driver film 61, and the source driver IC 6 is provided.
From 2, a source bus connecting line 63 connected to the end portion 43a of the source bus wiring 41a is provided. A lead line 64 is provided in parallel with the source bus connection line 63. One end 65 of the lead wire 64 on the film
Is connected to the lead line 48a on the display electrode substrate.
The other end 66 of the lead wire 64 on the film is connected to the lead wire 64 led onto the circuit board.

Another set of the source bus wiring 41b and the lead wire 48b on the display electrode substrate of FIG. 3 is connected to another dry film shown in FIG. 4B similar to that shown in FIG. 4A. ing. The lead wire 48b is introduced onto the circuit board through the dry film.

A gate driver IC 68 is provided on the gate driver film 67, and the gate driver IC 68 is provided.
From 68, a gate bus connection line 69 connected to the end 44 of the gate bus line 42 is provided. A lead line 70 is provided in parallel with the gate bus connection line 69. One end 71 of the lead wire 70 on the film
Are connected to lead lines 47 on the display electrode substrate. The other end 72 of the lead wire 70 on the film is connected to the lead wire 70 led on the circuit board. The lead lines 48a and 48b and the lead line 47 are arranged on the circuit board so that they can be connected to each other.

In the display electrode substrate, a method of repairing the case where the wire breakage 49 occurs on the source bus wiring will be described below. Defective source bus wiring 41b having the disconnection portion 49
Are electrically connected to the preliminary wirings 45b and 46 at the intersections 50 and 51, respectively. Further, the lead wire 48b connected to one end of the spare wire 45b and the lead wire 47 connected to one end of the spare wire 46 are electrically connected on the circuit board. In this way, by electrically connecting at three points, the defective source bus wiring 41
Both ends of the disconnection portion 49 of b are electrically connected via the circuit board. Further, in order not to generate additional capacitance, the spare wiring 45b is cut by the cutting portion 52, and the spare wiring 46 is cut by the cutting portion
Cut at 3. If the correction is performed in this way, the defective portion due to the disconnection can be corrected.

[0013]

However, in the conventional matrix type display device, when the disconnection portion on the source bus wiring occurs at a place apart from the lead line 47, the correction is performed as described above. Sometimes, this disconnection cannot be corrected. The distance from the connection portion of the lead wire 47 to the connection portion with the source bus line where the disconnection has occurred becomes long, and the electric resistance of the spare line 46 between them increases. Further, the number of intersections with the source bus line increases, and the capacity of the spare line 46 between them also increases. Further, when the correction is performed, if the capacitance and electric resistance of the wiring are large, signal delay occurs on the defective source bus wiring. Therefore, the lead wire 4
The disconnection caused by the source bus wiring away from the connection portion of No. 7 may not be corrected.

The present invention has been made in view of such a situation, and even if the signal input is one side input for both the source bus wiring and the gate bus wiring, the defective source bus wiring in which the disconnection portion of the bus wiring is corrected is used. It is an object of the present invention to provide a matrix type display device capable of reducing the signal delay of (1) and correcting disconnection.

[0015]

In order to solve the above-mentioned problems, the present invention provides (1) picture element electrodes arranged in a matrix, and rows are formed in one direction between the picture element electrodes. In a matrix type display device having a display electrode substrate which has a scanning line and a signal line wired vertically and horizontally, and a driver film for signal input is connected to only one end of each of the scanning line and the signal line, A plurality of gate bus wirings parallel to each other, a plurality of source bus wirings parallel to one direction orthogonal to the gate bus wirings, and provided at both ends of the source bus wirings parallel to the gate bus wirings, A plurality of spare lines intersecting with the source bus line, and a spare line intersecting with the source bus line at an end of the plurality of spare lines on the side of the source bus line to which the driver film is connected. One of the lead lines electrically connected to the end of the line and the other end of the source bus line among the plurality of spare lines are electrically connected to both ends of the spare line intersecting with the source bus line. A plurality of other lead lines that are connected to each other, and one of the plurality of lead lines is arranged so as not to intersect with the source bus line, and the line width is widened to reduce the electric resistance. The lead lines facing each other with the source bus line interposed therebetween are guided to the circuit board through the lead lines provided on the dry bath film, and arranged so as to be connectable to each other outside the display electrode substrate. Or (2) having picture element electrodes arranged in a matrix, and scanning lines and signal lines which are vertically and laterally arranged in one direction between the picture element electrodes, Scan line and signal line respectively In a matrix type display device including a display electrode substrate to which a driver film for signal input is connected only at one end, at both ends of at least a part of the lines of at least one of the scanning line and the signal line, Preliminary wiring that intersects with the partial bus wiring via an insulating film is formed, and the preliminary wiring intersects at the end on the side where the driver film for signal input is connected to the partial bus wiring. On at least one end,
The lead wire is electrically connected, and the lead wire is connected through the driver film connected to the part of the bus wiring,
Lead lines are electrically connected to both ends of the spare wiring that is drawn out of the display electrode substrate and intersects at the other end of the part of the bus wiring. To the outside, the other (or parallel to the spare wiring)
The lead-out line drawn out through the driver film connected to the bus wiring and connected to the end of the lead-out line where the driver film is not connected does not cross the scanning line and the signal line. In addition, the lead lines that are wired closer to the end side of the display substrate than the scan line or the signal line end portion and face each other with the part of the bus wiring interposed therebetween are connected to the circuit through the lead lines provided on the driver film. It is characterized in that it is guided to the substrate and arranged so as to be connectable to each other outside the display electrode substrate.

[0016]

[Action]

(1) Operation corresponding to claim 1: With pixel electrodes arranged in a matrix, and between the pixel electrodes, scanning lines and signal lines are arranged vertically and horizontally in rows in one direction. Then
In a matrix type display device having a display electrode substrate to which a driver film for inputting a signal is connected only to one end of each of the scanning line and the signal line, a large number of gate bus wirings 2 parallel in one direction and the gate bus A large number of source bus wirings 1 orthogonal to the wiring 2 and parallel to each other, and a plurality of source bus wirings 1 provided at both ends of the source bus wiring 1 in parallel with the gate bus wirings and intersecting with the source bus wiring 1. The spare wires 5a and 5b, one lead wire 9a and 9b electrically connected to the end of one of the spare wires 5a and 5b, and the other of the spare wires. Has a plurality of other lead lines 7 and 8 electrically connected to both ends of the spare line 6, and one of the plurality of lead lines 7 and 8 is connected to the source bus line 1. Exchange Lest place, it is spread line width to reduce the electrical resistance.

When a disconnection occurs in a part of the source bus wiring, first, the defective bus wiring and the spare wiring are electrically connected at one end of the defective bus wiring. Further, in order to prevent the generation of additional capacitance, a spare line farther from the lead line than the connection with the defective bus line is cut between the defective bus line and the adjacent bus line. Similarly, at the other end of the defective bus line, the defective bus line and the spare line are electrically connected. Further, the side of the spare wiring having a large electric resistance and capacitance between the connection portion with the lead line and the connection portion with the defective bus wiring is cut between the defective bus wiring and the bus wiring adjacent thereto. The lead lines connected to the spare lines at both ends of the bus line are electrically connected to each other outside the display electrode substrate at a connectable portion.
By connecting in this way, both ends of the disconnection portion of the defective bus wiring are electrically connected by external lead wires,
The disconnection is corrected. Even if a disconnection occurs on the source bus wiring far from the end of the gate bus wiring on the side where the driver film is connected, by using the spare wiring 7, the defective source bus wiring corrected by the following reasons. It is possible to correct the disconnection without increasing the signal delay at. That is, since the distance from the intersection of the defective bus wire and the spare wire to the connection portion of the lead wire of the spare wire is shortened, the electric resistance of the spare wire is low and the number of the intersections with the source bus wire is small. Since it is reduced, the additional capacitance generated at the intersection is reduced. Further, the lead line 7 is arranged so as not to cross the source bus line, and no capacitance is generated at the crossing portion, so that the line width can be arbitrarily widened and the resistance value can be sufficiently lowered.

(2) Operation corresponding to claim 2: A driver film for inputting a signal has one side of each end of both bus lines 1 and 2 formed of a scanning line and a signal line on a display electrode substrate. Connected only to. Bus wiring 1,2
Of the bus wirings 1 of at least one of the two ends of the bus wirings 1,
a, 5b and 6 intersect with the part of the bus wiring via an insulating film. Lead lines 9a and 9b are connected to at least one end of each of the spare wirings 5a, 5b and 6 at both ends of the part of the bus wiring 1. Among the end portions of the part of the bus wiring 1, the lead lines 9a and 9b connected to the preliminary wirings 5a and 5b arranged at the end portions 3a and 3b on the side to which the driver film is connected are the display electrode substrates. Outside, for example, to the circuit board via the driver film connected to the part of the bus wiring 1. The lead lines 7 and 8 connected to the end of the spare wire 6 that intersects at the other end of the part of the bus wire 1 are wired in two types and are connected to both ends of the spare wire 6, respectively. . These lead lines are led to the outside of the display electrode substrate via the driver film connected to one end of the other bus wiring 2. Of these lead lines, the lead line 7 connected to the end portion on the side where the driver film is not connected is arranged closer to the end side of the display substrate than the end portion of the bus wiring 1 so as not to intersect with the bus wiring 1. , The line width is widened to reduce the electric resistance. Lead lines 7, 8 and 9a, 9 facing each other with the part of the bus wiring 1 interposed therebetween.
b is arranged so that it can be connected outside the display electrode substrate later. The distance from the intersection of the defective bus wire and the spare wire to the connection portion of the spare wire and the lead wire is shortened to reduce the electrical resistance. Further, since the number of intersections with the source bus wiring is reduced, the capacitance generated at the intersections is reduced.

When a disconnection occurs in a part of the bus wiring 1,
First, at one end of the defective bus wiring, the defective bus wiring and the spare wiring 5a or 5b are electrically connected at the intersection. Further, in order not to generate additional capacitance, the spare wiring that is farther from the connection with the defective bus wiring than the connection with the lead wire is cut between the defective bus wiring and the adjacent bus wiring. Similarly, the defective bus wiring and the spare wiring 7 or 8 are electrically connected to each other at the other end of the defective bus wiring. Further, between the connection portion with the lead wire and the connection portion with the defective bus wiring, the side of the spare wiring having large electric resistance and capacitance is cut between the defective bus wiring and the bus wiring adjacent thereto. The lead lines connected to the spare lines at both ends of the bus line are electrically connected to each other outside the display electrode substrate at a connectable portion. By connecting in this way, both ends of the disconnection
It is electrically connected by an external lead wire and the disconnection is corrected. Even if a disconnection occurs on the source bus wiring far from the end of the gate bus wiring on the side where the driver film is connected, by using the spare wiring 7, the defective source bus wiring corrected by the following reasons. It is possible to correct the disconnection without increasing the signal delay at. That is, since the distance from the intersection of the defective bus wire and the pre-wiring to the connection portion of the lead wire of the spare wire is shortened, the electric resistance of the spare wire is low and the number of the intersections with the source bus wire is small. Since it is reduced, the additional capacitance generated at the intersection is reduced. Further, the lead line 7 is arranged so as not to cross the source bus line, and no capacitance is generated at the crossing portion, so that the line width can be arbitrarily widened and the resistance value can be sufficiently lowered.

[0020]

Embodiments will be described below with reference to the drawings. FIG. 1 is a configuration diagram for explaining one embodiment of a matrix type display device according to the present invention, and is a plan view of a display electrode substrate used in the matrix type display device. In the figure, 1
Is a source bus line, 1a and 1b are ends of the source bus line, 2 is a gate bus line, 3a and 3b are ends of the source bus line, 4 is an end of the gate bus line, 5a and 5b are spare lines, and 6 Is a preliminary wiring, 7 is a lead wire, 8 is a lead wire, 9a and 9b are lead wires, 10 is a disconnection portion, 11 and 1
Reference numeral 2 is a crossing portion, and 13 and 14 are cutting portions.

A large number of gate bus wirings 2 parallel in one direction
Further, a large number of source bus lines 1 are provided so as to be orthogonal thereto and parallel in one direction. The source bus wiring 1 is composed of end portions 1 a and 1 b of the source bus wiring 1. One ends 3a and 3b of the end portions 1a and 1b of the source bus wiring and the end portion 4 of the gate bus wiring 2 are connected to different driver ICs, respectively. The gate bus wiring 2 and the source bus wiring 1 intersect in a non-conducting state with an insulating film interposed therebetween.

In each rectangular area surrounded by the gate bus wiring 2 and the source bus wiring 1, a pixel electrode and a TFT (Thin Film Transistor) as a switching element are provided, but in FIG. The description is omitted. Liquid crystal is enclosed between the pixel electrode and the counter electrode to form a matrix type liquid crystal display device.

Preliminary wirings 5a and 5b provided in parallel with the gate bus wiring 2 and a preliminary wiring 6 intersect at both ends of the source bus wiring 1 through an insulating film. Lead lines 9a and 9b are electrically connected to the ends of the preliminary wirings 5a and 5b. The lead lines 9a and 9b are drawn to the outside of the display electrode substrate. Similarly, lead lines 7 and 8 are electrically connected to both ends of the spare wire 6. The lead lines 7 and 8 are led to the outside of the display electrode substrate. The lead line 7 is arranged so as not to intersect the source bus line 1 and has a wide line width in order to reduce electric resistance.

In the display electrode substrate, a method of repairing when the disconnection portion 10 has occurred on the source bus wiring will be described below. Defective source bus line 1b having the disconnection portion 109
Are electrically connected to the preliminary wirings 5b and 6 at the intersections 11 and 12, respectively. Further, the lead wire 9b connected to one end of the spare wire 5b and the lead wires 7 and 8 connected to both ends of the spare wire 6 are electrically connected on the circuit board. In this way, by electrically connecting at three points, the disconnection part 1 of the defective source bus line 1b
Both ends of 0 are electrically connected via the circuit board. Further, the preliminary wirings 5b and 6 are cut by the cutting parts 13 and 14, respectively. In this way, the disconnection of the source bus wiring can be corrected.

2A and 2B are plan views of the source driver film and the gate driver film connected to the substrate of FIG. 1, where 21 is a source driver film, 22 is a source driver IC, and 23. Is a source bus connection line, 24 is a lead line, 25 is one end, 26 is the other end, 27 is a gate driver filter, 28 is a gate driver IC, 29 is a gate bus connection line, and 30 and 31 are lead lines. , 32 and 33 are one end portions, and 34 and 35 are the other end portions.

A source driver IC 22 is provided on the source driver film 21, and a source bus connection line 23 connected to the source bus wiring 1a is provided from the source driver IC. A lead line 24 is provided in parallel with the source bus connection line 23. One end 25 of the lead line 24 on the film is connected to the lead line 9a on the display electrode substrate. The other end 26 of the lead wire 24 on the film is connected to the lead wire led onto the circuit board.

The other set of the source bus line 1b and the lead line 9b on the display electrode substrate of FIG. 1 is connected to another driver film similar to that shown in FIG. 2 (a). The lead wire 9b is guided onto the circuit board through the driver film. A gate driver IC 28 is provided on the gate driver film 27, and a gate bus connecting line 29 connected to the gate bus wiring 2 is provided from the gate driver IC 28. Lead lines 30, 31 are provided in parallel with the gate bus connection line 29. One ends 32 and 33 of the lead lines 30 and 31 on the film are connected to the lead lines 7 and 8 on the display electrode substrate, respectively. Lead lines 30, 31 on the film
The other end portions 34 and 35 of are connected to the lead lines led on the circuit board. The lead lines 9a and 9b and the lead lines 7 and 8 are arranged so that they can be connected on the circuit board.

In this embodiment, an example is shown in which one spare wiring is arranged at each end of the source bus wiring.
By disposing a plurality of spare wirings, it is possible to correct the disconnection at two or more places. Also, by providing similar spare wirings at both ends of the gate bus wiring, the disconnection portion of the gate bus wiring can be corrected.

As described above, in the matrix type display device of the present invention, the pixel electrodes arranged in a matrix and the scanning lines wired in rows and columns in one direction respectively between the pixel electrodes and A signal line is provided, a driver film for signal input is connected to only one end of each of the scanning line and the signal line, and the following wiring is provided, whereby the above object is achieved. Preliminary wirings 5a, 5b, and 6 that intersect with the partial bus wirings via an insulating film are formed at both ends of at least a portion of the bus wirings of at least one row of the scanning lines and the signal lines. It The spare wiring 5a, which intersects at the ends 3a, 3b on the side where the driver film for signal input is connected to the part of the bus wiring,
Lead lines 9a and 9b are electrically connected to at least one end of 5b. The lead lines 9a and 9b are led to the outside of the display electrode substrate via a driver film connected to the part of the bus wiring.

Lead lines 7 and 8 are electrically connected to both ends of the spare wire 6 which intersect at the other end of the part of the bus wires. The lead lines 7 and 8 are drawn to the outside of the display electrode substrate via a driver film connected to the other (or parallel to the spare line) bus line. Of these lead lines, the lead line 7 connected to the end not connected to the driver film is
The wiring is arranged closer to the end side of the display substrate than the end of the scanning line or the signal line so as not to intersect with the scanning line and the signal line. The lead lines 7, 8 and 9a, 9b facing each other with the part of the bus wiring interposed therebetween are arranged so as to be connectable to each other outside the display electrode substrate.

[0031]

As is apparent from the above description, the present invention has the following effects. (1) Effect corresponding to claim 1: Even in a matrix type display device in which signals are input to both sides of a signal line and a scanning line, disconnection portions of bus lines can be reliably corrected for the following reasons. For this reason,
The yield of the display device does not decrease, and the cost of the display device can be reduced. The maximum values of electric resistance and capacitance from the connection between the lead wire of the spare wiring that intersects the end of the defective bus wiring where the driver film is not connected to the connection with the defective bus wiring are compared with the conventional method. do it,
Since the maximum value of the distance from the intersection of the defective bus wire and the spare wire to the connection portion of the spare wire and the lead wire is shortened to 1/2, the maximum value of the electric resistance becomes 1/2. Also, since the maximum number of intersections with the source bus wiring is halved,
The capacity generated at the intersection is halved. Furthermore, since the leader line does not intersect with the bus line, no capacitance is generated at the intersection. Further, since no capacitance is generated, the line width can be arbitrarily widened, and the electrical resistance of the lead line can be sufficiently reduced. If the repair is performed using the spare wiring to which such a lead line is connected, the maximum value of the capacity and electric resistance of the defective source bus wiring after the repair becomes smaller than the conventional value, and the maximum signal delay in the defective source bus wiring is increased. The value can be reduced. Therefore, it is possible to correct even the disconnection that occurs in the bus wiring away from the signal input side. (2) Effect corresponding to claim 2: The distance from the intersection of the defective bus wire and the spare wire to the connection portion of the spare wire and the lead wire is shortened to reduce the electric resistance. Further, since the number of intersections with the source bus wiring or the gate bus wiring is reduced, the capacitance generated at the intersections is reduced. Further, the lead lines are arranged so as not to intersect the source bus lines, and no capacitance is generated at the intersections, so that the line width can be arbitrarily widened and the resistance value can be sufficiently reduced. If the repair is performed using the spare wiring to which such a lead line is connected, the signal delay in the defective source bus wiring after the repair can be reduced. Therefore, it is possible to correct even a disconnection that occurs in the bus wiring away from the signal input side.

[Brief description of drawings]

FIG. 1 is a configuration diagram for explaining an embodiment of a matrix type display device according to the present invention.

FIG. 2 is a plan view showing an example of a driver film connected to FIG.

FIG. 3 is a schematic plan view of a display electrode substrate used in a conventional matrix type display device.

FIG. 4 is a plan view showing an example of a driver filter connected to FIG.

[Explanation of symbols]

1a, 1b ... Source bus wiring, 2 ... Gate bus wiring, 3
a, 3b ... End of source bus wiring, 4 ... End of gate bus wiring, 5a, 5b ... Preliminary wiring, 6 ... Preliminary wiring, 7 ... Lead wire, 8 ... Lead wire, 9a, 9b ... Lead wire,
10 ... disconnection part, 11, 12 ... crossing part, 13, 14 ... disconnection part, 21 ... source driver film, 22 ... source driver IC, 23 ... source bus connection line, 24 ... lead line, 25 ... one end part, 26 ... The other end, 27 ... Gate driver filter, 28 ... Gate driver IC, 29
… Gate bus connection lines, 30, 31… Leader lines, 32,
33 ... one end, 34, 35 ... the other end.

Claims (2)

[Claims] 1. Pixel electrodes arranged in a matrix,
A scan line and a signal line, which are vertically and horizontally arranged in a row in one direction, are provided between the pixel electrodes, and a driver film for inputting a signal is connected to only one end of each of the scan line and the signal line. In a matrix type display device including the display electrode substrate described above, a large number of gate bus wirings parallel to one direction, a large number of source bus wirings parallel to one direction orthogonal to the gate bus wirings, and a plurality of source bus wirings At both ends, a plurality of spare wirings provided in parallel with the gate bus wiring and intersecting with the source bus wiring, and a side of the plurality of spare wirings to which the driver film of the source bus wiring is connected One lead line electrically connected to the end of the spare line that intersects the source bus line at the end, and the other end of the source bus line of the plurality of spare lines. A plurality of lead lines electrically connected to both ends of the spare line intersecting the source bus line, and one lead line of the plurality of lead lines intersects the source bus line. Are arranged so that the line width is widened so as to reduce the electric resistance, and the lead lines facing each other with the source bus line sandwiched therebetween are conducted onto the circuit board through the lead lines provided on the driver film. The matrix type display device is characterized in that it is arranged so as to be connectable to each other outside the display electrode substrate. 2. A pixel electrode arranged in a matrix,
A scan line and a signal line, which are vertically and horizontally arranged in a row in one direction, are provided between the pixel electrodes, and a driver film for inputting a signal is connected to only one end of each of the scan line and the signal line. In a matrix display device including a display electrode substrate, at least both ends of at least a part of lines of at least one of the columns of the scanning lines and the signal lines are provided with a part of the bus lines and an insulating film. A lead wire is electrically connected to at least one end of the spare wiring which intersects at a side where a driver film for signal input is connected to the partial bus wiring. And the lead wire is led to the outside of the display electrode substrate through the driver film connected to the part of the bus wiring and crosses at the other end of the part of the bus wiring. Both ends of wiring , The lead lines are electrically connected to each other, and the lead lines are led out to the outside of the display electrode substrate through a driver film connected to the other (or parallel to the spare line) bus line, The lead line connected to the end on the side where the driver film is not connected is located on the end side of the display substrate from the scan line or the signal line end so as not to intersect the scan line and the signal line. The lead-out lines, which are opposed to each other across the part of the bus wiring, are guided to the circuit board through the lead-out lines provided on the driver film, and are arranged so as to be connectable to each other outside the display electrode substrate. A matrix type display device characterized by being provided.