JPH0815853A - Photomask for production of integrated circuit - Google Patents

Abstract

PURPOSE:To make it possible to form resist patterns which are as designed on both short and long sides by optimizing exposing light passing mask patterns even if the ratio of the long sides and the short sides is large (the ratio is >=2). CONSTITUTION:This photomask for production of integrated circuits is formed with the mask pattern 1 arranged with an auxiliary pattern 3 having the short sides 9 of the system length not resolved at the exposing wavelength of an exposure and an auxiliary pattern 4 having the similar short sides 10 via separating widths 30 of the width to enable exposure and resolution with diffracted light respectively in positions facing the short sides 5 and short sides 6 of the main patterns 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photomask for manufacturing an integrated circuit used for forming a contact hole in a semiconductor device.

[0002]

2. Description of the Related Art In manufacturing a semiconductor integrated circuit, a photolithography technique and an etching technique have been conventionally used to form a contact hole in a SiO ₂ film as an insulating film on the surface of a semiconductor substrate. The photolithography technique is used in the step of transferring the mask pattern to the resist, and the etching technique is used in the step of processing the SiO ₂ film using the patterned resist as the mask.

A general photolithography / etching process for forming a contact hole will be described with reference to FIG. First, the SiO ₂ film 42 is formed on the Si substrate 41, then the resist 43 made of a photosensitive polymer is applied on the SiO ₂ film 42, and then prebaked to perform the organic solvent contained in the resist 43. Are removed (FIG. 5 (a)). Next, the mask pattern 44 is transferred onto the resist 43 by exposure (FIG. 5B), and then the resist 43 is developed to form a resist pattern 43a corresponding to the mask pattern 44. After that, post-baking is performed to remove the water contained in the resist pattern 43a to cure the resist pattern 43a, and SiO 2
₂ Adhesion with the film 42 is enhanced (FIG. 5 (c)). further,
Using this resist pattern 43a as a mask, the SiO ₂ film 42 is etched to form a contact hole 45 (FIG. 5 (d)). Next, the unnecessary resist pattern 43a is removed (FIG. 5 (e)). As described above, the general photolithography / etching step includes the five main steps shown in FIGS. 5A to 5E.

When forming the contact hole 45, since the light transmission area of the mask pattern 44 is small (the amount of light transmitted through the mask pattern 44 is small), the pattern of the mask pattern 44 is accurately transferred onto the resist 43. Is not easy. Among the contact holes,
In particular, when an anisotropic contact hole is formed, the light intensity distribution after passing through the mask pattern 44 becomes non-uniform, so it is difficult to open the contact hole 45 as designed for the mask pattern 44. Is. In view of such a current situation, with respect to the contact hole, a method of unifying to the isotropic contact hole is generally adopted at the time of LSI design even if the contact resistance is increased and the driving capability is slightly sacrificed.

On the other hand, in recent years, for the purpose of improving the operation speed in a CMOS integrated circuit, BiCMOS technology for forming a bipolar element on the same substrate as a CMOS has been developed and adopted. In BiCMOS, the driving ability is greatly affected by the value of the contact resistance, so that there is a strong demand to adopt anisotropic contact holes for the base and emitter patterns. However, the anisotropic contact hole usually has a long side to short side ratio of 3 to 4.
In many cases, it is very difficult to open the contact hole as designed as the mask pattern becomes finer.

[0006]

Problems to be Solved by the Invention FIG. 6 (a) and FIG.
An example of a conventional mask pattern for forming an anisotropic contact hole having a short side of 0.6 μm and a long side of 1.8 μm is shown in (a). The mask pattern 21 shown in FIG.
Has a rectangular shape having a short side 21a of 0.6 μm and a long side 21b of 1.8 μm. The mask pattern 23 shown in FIG. 7A has a short side of 0.6 μm and a long side of 1.2 μm. The auxiliary pattern 23a and the auxiliary pattern 23b are connected to the short side of the rectangular pattern.

An example of a pattern formed on a resist after performing a photolithography process using the mask pattern 21 shown in FIG. 6A is shown in FIG. 6B. The resist pattern 24 in FIG. 6B shows the resist pattern formed when the photolithography process is performed under the exposure condition that the short side 21a of the mask pattern 21 is opened as designed. . When the photolithography process is performed under the above exposure conditions, as shown in the figure, the long side 21b side is 1.43 in the resist pattern 24.
μm, which is smaller than the design value.

FIG. 8 shows an actual measurement result of a resist pattern formed after a short side 21a is fixed to 0.6 μm and a long side 21b is changed from 0.6 μm to 2.4 μm and a photolithography process is performed. Short side 21a and long side 2 on the vertical axis
The value obtained by subtracting the actual measurement value (resist pattern value) from the design value (mask pattern value) of 1b is taken, and the design value of the long side 21b is taken along the horizontal axis. The graph shown by the white circle shows the case of the long side. As can be seen from the graph shown in FIG. 8, the long side 21b
It becomes difficult to open the resist pattern as designed, as the design value becomes larger. In other words, the long side 21b and the short side 21 of the mask pattern 21.
As the ratio with a increases, the long side 21b side tends to be underexposed, and the value on the long side in the resist pattern becomes smaller than the design value. This is because the exposure conditions such as the exposure amount and the exposure time are set to the exposure conditions for transferring the short side 21a onto the resist. In this case, as described above, the long side 21b side is underexposed.
On the contrary, the exposure condition should be set so that the long side 21b can be accurately transferred, which is not the case. When the exposure condition is set to the long side 21b side, the short side 21a side is overexposed this time.
It will be larger than the design value. Then, the distance between the formed contact hole and the wiring pad covering the contact hole becomes smaller than the initially set value. This is one of the factors that cause defects in the LSI.

Further, the auxiliary pattern 2 shown in FIG.
3a and mask pattern 2 provided with auxiliary pattern 23b
In the case of No. 3, as shown in FIG. 7B, the positions of the auxiliary pattern 23a and the auxiliary pattern 23b are largely resolved after exposure, and the resist pattern 26 having a distortion is formed.

The present invention has been made in view of the above problems, and it is possible to form a resist pattern having designed long side values and short side values even when the ratio of the long side to the short side is large. It is an object of the present invention to provide a photomask for manufacturing an integrated circuit, which is capable of forming an anisotropic contact hole as designed.

[0011]

In order to achieve the above object, a photomask for manufacturing an integrated circuit according to the present invention has a rectangular main pattern and a length whose short side is not resolved at an exposure wavelength. , A rectangular auxiliary pattern having a long side longer than the short side of the main pattern, the auxiliary pattern being capable of exposing and resolving the main pattern with diffracted light. It is characterized in that the long side is arranged so as to face each short side of the main pattern through the separated width.

In the photomask for manufacturing an integrated circuit according to the present invention, in the photomask for manufacturing an integrated circuit, the long side of the auxiliary pattern is 0.10 on one side of the short side of the main pattern. 0.15 μm larger length,
The short side of the auxiliary pattern has a length of 0.25 to 0.40 μm.

[0013]

When the photolithography process is performed using the photomask for manufacturing an integrated circuit having the above structure, the anisotropic contact having a large long side to short side ratio (the ratio of the long side to the short side is 2 or more). The holes can be formed as designed. This will be described with reference to FIGS. 3 and 4. FIG.
FIG. 4 is a diagram showing a simulation result of light intensity distribution on a photoresist when exposed through a mask pattern according to Example 1 described later. FIG. 4A shows FIG.
FIG. 4B is a diagram showing the result of simulation of the light intensity distribution on the photoresist when exposed through the conventional mask pattern 21 shown in FIG.
It is a figure which showed the simulation result of the light intensity distribution on the photoresist at the time of exposing through the conventional mask pattern 23 shown to (a).

In the case of the conventional mask pattern shown in FIGS. 6A and 7A, the contour line showing the light intensity becomes less faithful to the mask shape as it shifts to the shorter side, and in particular, -The light intensity at the corner is deteriorated. Further, in the case of the mask pattern 23 including the conventional auxiliary pattern 23a and auxiliary pattern 23b shown in FIG.
The light intensity is high at the auxiliary pattern 23a and the auxiliary pattern 23b. When developing in this state, a resist pattern 26 having a distorted shape as shown in FIG. 7B is formed on the photoresist. Will end up.

However, in the photomask for manufacturing an integrated circuit according to the present invention having the above-mentioned structure, the auxiliary pattern and the main pattern are separated by a separation width that can be resolved by exposure to diffracted light. Therefore, the contribution of the diffracted light from the main pattern to the auxiliary pattern is weakened, the inclination of the contour lines is relaxed as shown in FIG. 3, and the fidelity to the mask shape is increased. In addition, the light intensity is not deteriorated at the corners. By developing in this state, it is possible to form a resist pattern having a finished long side size as designed.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a photomask for manufacturing an integrated circuit according to the present invention will be described below with reference to the drawings. FIG. 1A is a plan view schematically showing a photomask (mask pattern) for manufacturing an integrated circuit according to the first embodiment. In FIG. 1A, reference numeral 1 denotes a mask pattern for forming an anisotropic contact hole having a short side of 0.6 μm and a long side of 1.8 μm. The mask pattern 1 has a long side of 1.2 μm and a short side of 5
And a rectangular main pattern 2 having a short side 6 of 0.6 μm,
It is composed of a rectangular auxiliary pattern 3 and a rectangular auxiliary pattern 4. The auxiliary pattern 3 is arranged at a position facing the short side 5 of the main pattern 2 through a separation width 30 of which the long side 7 can be exposed and resolved by the diffracted light, and the auxiliary pattern 4 is long. Separation width 30 in which the side 8 can be exposed and resolved by diffracted light
It is arranged at a position facing the short side 6 of the main pattern 2 via. When the separation width 30 is set large, the main pattern 2
There is a possibility that the resist may remain after the development without being resolved by the diffracted light from the auxiliary pattern 3 and the auxiliary pattern 4 and 0.025 μm to 0.15 μm in order to avoid the possibility.
It is preferable to set in the range of 0 μm. In the case of Example 1, the separation width 30 is set to 0.05 μm.

The short side 9 of the auxiliary pattern 3 and the short side 10 of the auxiliary pattern 4 are both the exposure wavelength (365) of the exposure apparatus.
nm to 436 nm), a value not resolved at 0.3 μm
Is set to (0.25 μm for the above exposure wavelength)
It is preferable to set it within the range of 0.40 μm). The long side 7 of the auxiliary pattern 3 and the long side 8 of the auxiliary pattern 4 are set longer than the short sides 5 and 6 of the main pattern 2, and both ends of the auxiliary pattern 3 and the auxiliary pattern 4 are set. The part projects in the longitudinal direction to the outside of the main pattern 2. The length of the protruding portion is preferably set in the range of 0.1 μm to 0.15 μm so that the formed contact hole does not have a distorted shape. The length (1.2 μm) of the long side of the main pattern 2 is the long side value (1.8 μm) to be finished.
The length (2 × 0.3 μm) of the short side 9 of the auxiliary pattern 3 and the short side 10 of the auxiliary pattern 4 is subtracted from m).

FIG. 2A is a plan view schematically showing a photomask for manufacturing an integrated circuit according to the second embodiment, in which an anisotropic contact hole having a short side of 0.6 μm and a long side of 2.4 μm. It is a figure showing mask pattern 11 for forming. The structure of the mask pattern 11 is different from that of the mask pattern 1 shown in FIG. 1A because the main pattern 2 in the mask pattern 1 becomes the main pattern 12 in the mask pattern 11, The short side 5 becomes the short side 13, the short side 6 becomes the short side 14, and the length of the long side in the main pattern 12 is only 1.2 μm to 1.8 μm. Other configurations are the same. The long side length (1.8 μm) in the main pattern 12 is the same as the case of the main pattern 1 in the first embodiment.
4 .mu.m) minus the length (2.times.0.3 .mu.m) of the short side 9 of the auxiliary pattern 3 and the short side 10 of the auxiliary pattern 4 is set.

The mask pattern 1 according to the first embodiment described above.
Example 2 with a photomask for manufacturing integrated circuits
When a photolithography process is performed according to the process described in the "Prior Art" using the photomask for manufacturing an integrated circuit on which the mask pattern 11 according to the above is formed, the resist pattern 15 shown in FIG. Or FIG. 2 (b)
It is possible to form the resist pattern 16 shown in FIG. 1, that is, the resist pattern in which the long side and the short side have values as designed. Then, if an etching step is performed through the resist pattern 15 or the resist pattern 16 according to the process described in the "Prior Art" section,
An anisotropic contact hole as designed can be formed. In this way, the mask pattern 1 or the mask pattern
If the ratio of long side to short side is 2 or more,
It is possible to form a resist pattern 15 or a resist pattern 16 having a long side value and a short side value as designed in advance without forming a distorted shape. The resist pattern 15 or the resist pattern 15 can be formed. The anisotropic contact hole as designed can be formed based on the pattern 16.

[0020]

As described in detail above, if the photolithography process and the etching process are performed using the photomask for manufacturing an integrated circuit according to the present invention, even if the ratio of the long side to the short side is large (the ratio is It is possible to form an anisotropic contact hole having a long side value and a short side value as designed. This leads to an improvement in reliability in the LSI manufacturing process and an improvement in yield.

[Brief description of drawings]

FIG. 1A is a plan view schematically showing a photomask for manufacturing an integrated circuit according to a first embodiment of the present invention,
FIG. 6B is a plan view schematically showing a resist pattern formed when exposure is performed using the photomask.

FIG. 2A is a plan view schematically showing a photomask for manufacturing an integrated circuit according to a second embodiment of the present invention,
FIG. 3B is a plan view schematically showing a resist pattern formed when exposure is performed using the photomask.

FIG. 3 is a diagram showing a simulation result of a light intensity distribution on a resist when exposed using the photomask for manufacturing an integrated circuit according to the first embodiment.

4A and 4B are diagrams showing simulation results of light intensity distribution on a resist when exposed using a conventional photomask for manufacturing an integrated circuit, respectively.

5A to 5E are cross-sectional views schematically showing respective steps of a general photolithography step and an etching step when forming a contact hole.

FIG. 6A is a plan view schematically showing a mask pattern having no auxiliary pattern in a conventional photomask for manufacturing an integrated circuit, and FIG. 6B is the photomask. FIG. 3 is a plan view schematically showing a resist pattern formed when exposed using.

7A is a plan view schematically showing a mask pattern having an auxiliary pattern in a conventional photomask for manufacturing an integrated circuit, and FIG. 7B is the photomask. FIG. 3 is a plan view schematically showing a resist pattern formed when exposed using.

FIG. 8 shows a result of actual measurement of a resist pattern formed after photolithography when the short side of the mask pattern is fixed to 0.6 μm and the long side is changed in the range of 0.6 to 2.4 μm. It is a graph.

[Explanation of symbols]

 1, 11 Mask pattern 2, 12 Main pattern 3, 4 Auxiliary pattern 15, 16 Resist pattern 30 Separation width

Claims (2)

[Claims] 1. A rectangular main pattern and a rectangular auxiliary pattern whose short side has a length that does not resolve at an exposure wavelength and whose long side is longer than the short side of the main pattern. And
The auxiliary pattern is separated from the main pattern by a diffracted light so as to be exposed and resolved, and the long side of the auxiliary pattern is the main pattern.
A photomask for manufacturing an integrated circuit, wherein the photomask is arranged so as to face each short side of the screen. 2. A long side of the auxiliary pattern has a length larger by 0.10 to 0.15 μm on one side than a short side of the main pattern, and the short side of the auxiliary pattern is 0.25 to 0.25.
The photomask for manufacturing an integrated circuit according to claim 1, wherein the photomask has a length of 0.40 μm.