JPH08146919A - Liquid crystal driving device and liquid crystal driving method - Google Patents

Abstract

PURPOSE: To provide a liquid crystal driving device and liquid crystal driving method constituted to optimize the writing timing of video signals by eliminating the influence of a variation in the signal propagation characteristics of the scanning circuits within liquid crystal panels even with the liquid crystal panels contg. the scanning circuits of high fineness and high speed driving. CONSTITUTION: An external signal generator 102 outputs a pulse signal ΦI to a shift register SRO. A feedback signal ΦF added with delay time from this shift register SRO is fed back and the timing of the video signal ΦV is adjusted. The cancellation of the delay time intrinsic to the scanning circuits in the liquid crystal panels 103 is made possible. The correction of the delay quantity by every liquid crystal panel is made possible by addition of the shift registers for dummies within the scanning circuits and the exact taking out of the video signals is made possible even with the liquid crystal display devices formed to the higher fineness.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a camera-integrated V
The present invention relates to a liquid crystal drive device and a liquid crystal drive method used in a TR viewfinder, a liquid crystal projector device, and the like, and more particularly,
The present invention relates to a liquid crystal driving device and a liquid crystal driving method with improved video signal writing timing.

[0002]

2. Description of the Related Art In recent years, along with the widespread use of devices with a liquid crystal display device represented by a VTR with a built-in camera and a liquid crystal projector, there is an increasing demand for higher performance of the liquid crystal display device. Is rapidly progressing. This liquid crystal display device is roughly classified into one in which only a thin film transistor for pixel control is formed on a substrate and a scanning circuit is performed by a peripheral IC, and one in which a thin film transistor for pixel control and a scanning circuit are integrally incorporated on a substrate. are categorized.

On the other hand, polycrystalline silicon (Poly-Si)
Thin film transistor (TFT: Thin Film T
ransistor (hereinafter simply referred to as “TFT”) is advantageous for high definition by reducing the size of the switching element for each pixel due to its high driving capability, and at the same time, the scanning circuit is on the same substrate as the display section. It is the mainstream because it has the advantage of being configurable. Further, various researches have been made for the purpose of realizing a high-definition and low-cost liquid crystal display device. Furthermore,
Due to its high-speed performance, the scanning circuit of this system adopts a dot-sequential system in which a video signal is input to pixels in a dot-like manner similar to the scanning system of a cathode ray tube (CRT), and one scanning line segment is formed linearly. The difference from the line-sequential driving method in which the video signals of (1) are collectively input is highlighted. The present invention relates to a liquid crystal display device in which a scanning circuit, which is becoming higher in definition, is built in on a substrate.

A conventional liquid crystal driving device and liquid crystal driving method will be described with reference to FIGS. 3 and 4.

First, the configuration of a conventional liquid crystal driving device will be described with reference to FIG. In the figure, reference numeral 1 indicates a conventional liquid crystal driving device. Conventional liquid crystal drive device 1
Is generally composed of an external signal generator 2 and a liquid crystal panel 3.
The detailed configuration of the external signal generator 2 includes an input terminal 4 to which the video signal A is input, a decoder 5, a sample hold S / H 6, an AC amplifier 7, a timing generator TG.
8 and a pulse driver 9 and the like. Further, the liquid crystal panel 3 is configured by integrally mounting a vertical scanning circuit 11 and a horizontal scanning circuit 12 that control the scanning direction. The horizontal scanning circuit 12 includes shift registers (hereinafter, simply referred to as “SR”) SR1 and SR2 corresponding to the number of horizontal pixels.
.., and switches (hereinafter, simply referred to as “SW”) SW1 and SW that control writing of a video signal under the control of the shift register.
2, SW3, SW4 ...

In the vertical scanning circuit 11 and the horizontal scanning circuit 12, TFTs 13 for controlling each pixel are arranged in a matrix. That is, the TFT 13 is composed of the source / drain electrode SD and the gate electrode G, and the gate electrode G is commonly connected to the vertical scanning circuit 11. Similarly, the source / drain electrodes SD are commonly connected to the horizontal scanning circuit 12 as signal lines. The source / drain electrodes SD are connected to the common electrode VCOM via the storage capacitor Cs and the liquid crystal cell LC. Here, the source electrode and the drain electrode in the TFT 13 are switched in operational source / drain when the bias polarity of the circuit is reversed, and have bidirectionality like a normal FET (field effect transistor). It will be referred to as a source / drain electrode SD.

The operation of the liquid crystal driving device and the liquid crystal driving method having such a configuration will be described. The video signal A input to the input terminal 4 of FIG. 3 is input to the decoder 5. Decoder 5
Then, the video signal A having the composite video signal configuration is converted into R, G, and B separate signals suitable for driving the liquid crystal panel 3, and a synchronization signal Sync is output to a timing generator TG8 described later. At the same time, an adjustment circuit for colors, pictures, hues, etc. is added to the decoder 5 (not shown) and sent to the sample / hold S / H 6 in the next stage. In the S / H6, the timing generator T
While synchronizing with the frame pulse FRP output from G8, the R, G, and B video signals are converted into alternating current to obtain a video signal Φ.
V is generated and output. (Hereinafter, the R, G, B video signals are collectively referred to as ΦV).

The timing generator TG8 generates various timing signals B necessary for controlling the liquid crystal panel 3 from a VCO (Voltage Controlled Oscillator) (not shown) and a synchronization signal Sync generated by the decoder 5 to generate timing signals. Φ1 ', Φ2', ΦS 'of signal B
Is output to the pulse driver 9 in the next stage. The pulse driver 9 converts the signal level into a predetermined signal level and outputs Φ1, Φ2,
ΦS is generated and output. The timing signal Φ1, Φ
2, ΦS is a timing pulse for SR in the horizontal scanning circuit 12, and ΦS is also a start pulse of the horizontal scanning circuit (various timing pulses of the vertical scanning circuit system). Omitted).

The liquid crystal panel 3 includes the external signal generator 2 described above.
Video signal ΦV input from the device and timing signal Φ
1, Φ2, ΦS are received and the horizontal scanning circuit 12
Or to the vertical scanning circuit 11. The horizontal scanning circuit 12
, SR1 and SR2 ... Start operation based on the start pulse ΦS as a start reference, and timing pulse Φ1,
The switch opening / closing pulses H1, H2, ... Responding to .PHI.2 are generated and output to the next stage SW1, SW2. SW
At 1, SW2 ..., The video signal .PHI.V is taken in based on the switch opening / closing pulse and is output to the source / drain electrode SD of the TFT 13 through the signal line. The TFT 13
Then, the gate electrode G is activated in response to the selection pulse input in the scanning period of the vertical scanning circuit 11. During the active period of the vertical scanning circuit 11, the horizontal scanning circuit 12 sequentially captures image data into each source / drain electrode SD. The video data is supplied to the storage capacitor Cs and the liquid crystal cell LC. In the operation of the liquid crystal cell LC, liquid crystal molecules (not shown) are twisted in an applied voltage direction to stand up by a voltage supplied according to an image level of each pixel, and a liquid crystal panel is utilized by utilizing optical activity of the liquid crystal molecules. An image is displayed on 3.

The operation of the conventional liquid crystal driving device and liquid crystal driving method will be described with reference to FIGS. 3 and 4.

FIG. 4 shows SR1 and S as shown in FIG.
It is a timing chart figure which shows operation | movement of R2 ... and SW1, SW2 ... ΦS in FIG. 4 is a start pulse generated by the external signal generator 2 shown in FIG.
Similarly, Φ2 is a timing pulse generated by the external signal generator 2. Here, the timing pulse Φ2 is an inverted waveform of the timing pulse Φ1. Also, H1, H
.. is a switch opening / closing pulse generated by SR1, SR2 .., and .PHI.V is a video signal in each pixel.

The start pulse ΦS is the SR of the first stage.
1 is input as a rectangular wave having a pulse width of 590 nsec, for example, and is acquired in synchronization with the timing pulses Φ1 and Φ2. The first stage SR1 starts operation with the start pulse ΦS as the start reference, and the timing pulse Φ
At the trailing edge of 1, a switch opening / closing pulse H1 for activating SW1 is output to capture a video signal ΦV corresponding to a predetermined pixel when the switch is opened. SR1 output is SR
.. are sequentially transferred to each of the liquid crystal panels SW2, SW3 ,. Similarly, a switch opening / closing pulse H2 for activating SW2 is output at the trailing edge of the timing pulse Φ2, and the desired video signal ΦV is taken into the next pixel. Here, as shown in FIG. 4, a delay time of Δt occurs between the falling timings of the timing pulses Φ1 and Φ2 and the generation timings of the switch opening / closing pulses H1 and H2 that actually activate the switch circuit. This delay time Δt is due to the reason described below.
Each liquid crystal panel contains a deviation (variation).

That is, the polycrystalline silicon TFT constitutes not only the scanning circuit but also the switching element of each pixel, and the electrical characteristics of this polycrystalline silicon TFT are the crystal grain size of the silicon thin film and the grain boundary due to hydrogen. It greatly depends on the degree of trap termination. Therefore, if the threshold value of the TFT is adjusted to optimize the transistor characteristics of the switching element of each pixel, the termination degree of hydrogen is changed, or the manufacturing process is changed, the signal propagation in the scanning circuit is reduced. Will also be affected. Also,
When a plurality of liquid crystal panels are manufactured from a single wafer, variations in characteristics due to the extraction portion in the wafer (variations in each liquid crystal panel) and the like also affect signal propagation in the scanning circuit. The influence of variations in these characteristics appears as variations in the delay time Δt as described above.

Conventionally, the timing of sending this video signal ΦV to the switch corresponding to each signal line is adjusted in advance by adding a certain time delay with reference to the timing signal generated by itself in the external signal generator 2. It was output as a video signal ΦV.

[0015]

However, in the conventional liquid crystal driving device and liquid crystal driving method, the propagation time until the timing signal input from the external signal generator reaches the switch of the horizontal scanning circuit as described above. , The timing of the input video signal may fluctuate. If such a rubbing of the read timing of the video signal becomes large, the video signal is mixed into the adjacent signal line, so that a virtual image is written in the adjacent pixel, which is a factor of significantly degrading the pixel quality. In addition, this is not a problem for a relatively low pixel liquid crystal panel with a sufficient video signal timing margin, but it can be ignored as the pixel becomes higher definition and the switching time becomes shorter, or as the driving speed increases. There were cases where it was not.

Further, since the dispersion of the propagation time occurs individually for each liquid crystal panel as described above, it is impossible to uniformly perform delay correction on the wafer.
There is a problem that it is difficult to take measures for each liquid crystal panel.

The present invention has been made in consideration of the above points. Even in a high-definition, high-speed driving liquid crystal panel, the influence of variations in the signal propagation characteristics of the scanning circuit in the liquid crystal panel is eliminated to eliminate the influence of the video signal. An object of the present invention is to provide a liquid crystal driving device and a liquid crystal driving method that maintain the writing timing at an optimum level and facilitate the measures for each liquid crystal panel.

[0018]

In order to solve the above-mentioned problems, a liquid crystal driving device of the present invention is a liquid crystal driving device in which a scanning circuit portion and a pixel display portion are integrally formed and generates a timing signal. An external signal generator, a video signal sampled by a timing signal generated by the external signal generator, and a delay shift register for delaying transmission of the timing signal generated by the external signal generator are provided. The output signal of the delay shift register is fed back to the external signal generator to solve the above problem.

Further, in the liquid crystal driving method of the liquid crystal display device in which the scanning circuit portion and the pixel display portion are integrally formed, an external signal generator for generating a timing signal, a video signal sampled by the timing signal, And a delay shift register for delaying transmission of a timing signal generated from an external signal generator. The above problem is solved by adopting the liquid crystal driving method of the liquid crystal display device in which the timing signal is once output from the external signal generator and then returned to the external signal generator again.

[0020]

The liquid crystal driving device of the present invention is a liquid crystal driving device in which a scanning circuit section and a pixel display section are integrally formed, and an external signal generator for generating a timing signal and a timing generated by the external signal generator. The video signal sampled by the signal and the delay shift register for delaying the transmission of the timing signal generated from the external signal generator are provided. Then, the output signal of the delay shift register is fed back to the external signal generator, and the timing signal with a delay time is newly fed back to the external signal generator. As a result, variations in the extraction timing of the video signal are suppressed, and the image quality can be stably maintained.

In the liquid crystal driving method of the liquid crystal display device in which the scanning circuit section and the pixel display section are integrally formed, an external signal generator for generating a timing signal, a video signal sampled by the timing signal, and an external signal generator are provided. And a delay shift register for delaying the transmission of the timing signal generated from the signal generator. Then, this timing signal was once output from the external signal generator and then used as a transmission delay timing signal which was fed back to the external signal generator. For this reason, it is possible to suppress variations in the extraction timing of the video signal and secure a stable image.

[0022]

Embodiments of the liquid crystal driving device and the liquid crystal driving method according to the present invention will be described below with reference to FIGS. Here, the detailed description of the vertical scanning circuit in FIG. 1 is omitted because the present invention assumes the selection time of one scanning line. The same parts as those of the conventional liquid crystal driving device and liquid crystal driving method are designated by the same reference numerals, and the description of their structures and operations will be omitted.

First, the details of the liquid crystal driving device and the liquid crystal driving method of the present invention will be described with reference to FIG. FIG. 1 is a block diagram mainly showing a liquid crystal driving device of the present invention. Reference numeral 100 in the figure indicates the liquid crystal driving device of the present invention. The liquid crystal driving device 100 of the present invention includes an external signal generator 102,
The liquid crystal panel 103 is generally configured. Although not shown, the external signal generator 102 is configured to include a component for an external signal generator of the related art and a unit for regenerating a delayed video signal based on a delay timing signal described later.

The detailed structure of the liquid crystal panel 103 includes a vertical scanning circuit 111 and a horizontal scanning circuit 112 which control the scanning direction.
Is integrally mounted. The horizontal scanning circuit 11
2 is a square wave Φ of 1.7 MHz with a peak value of 13 V, for example.
1 and its inverted waveform Φ2, and is composed of a shift register by a clocked inverter based on the start pulse ΦS. Further, the conventional shift registers SR1, SR2, SR3, SR4 ...
In addition to the shift register SR0 which is a characteristic part of the present invention
Is newly provided and configured. The shift register SR0 is an existing shift register SR in the same liquid crystal panel.
1, SR2, SR3, SR4, ... Have substantially the same delay amount. Furthermore, SR1, SR2,
The switch opening / closing pulses H1, H2, H3, H4, ... Are output from the outputs of SR3, SR4.
It has W4 ... Further, in the vertical scanning circuit 111 and the horizontal scanning circuit 112, TFTs 13 for controlling each pixel are arranged in a matrix.

The liquid crystal panel 103 receives the video signal ΦV output from the external signal generator 102 and the timing signals Φ1, Φ2, ΦS, and ΦI, and supplies them to the horizontal scanning circuit 112 and the vertical scanning circuit 111. To do. In the horizontal scanning circuit 112, the SR1, SR2 ... Start operation with the start pulse .PHI.S as a start reference, generate switch opening / closing pulses H1, H2 ... In response to the timing pulses .PHI.1, .PHI.2, and switch SW1 of the next stage. SW
Output to 2 ... Further, the external signal generator 102 newly outputs the pulse signal ΦI to the shift register SR0.
By providing SR0, a delay time peculiar to the shift register is added while the pulse signal ΦI propagates through SR0, and its output is fed back to the external signal generator 102 as a feedback signal ΦF. Based on this feedback signal ΦF, the external signal generator 102 and the liquid crystal panel 1
The timing of the video signal ΦV is adjusted and output in consideration of the delay amount during the round trip between 03. This allows
The delay time peculiar to the scanning circuit in the liquid crystal panel 103 can be canceled.

.. receives the video signal .PHI.V based on the switch opening / closing pulses H1, H2 ... And outputs it to the source / drain electrode SD of the TFT 13. Thereafter, an image is displayed on the liquid crystal panel 103 in the same manner as in the conventional technique.

Next, the operation of the liquid crystal driving device and the liquid crystal driving method of the present invention will be described with reference to FIG. Φ in Figure 2
S is a start pulse generated by the external signal generator 102 shown in FIG. 1, and Φ1 and Φ2 are timing pulses generated by the external signal generator 102. Here, the timing pulse Φ2 is an inverted waveform of the timing pulse Φ1. Also, H1, H2 ... Are SR1, SR2.
Is a switch opening / closing pulse, and ΦV is a video signal in each pixel.

Then, the start pulse ΦS is inputted to SR1 and taken in in synchronization with the timing pulses Φ1 and Φ2. SR1 starts its operation with the pulse ΦS as a reference, and outputs a switch opening / closing pulse H1 for activating SW1 at the fall of the timing pulse Φ1 to capture a predetermined video signal ΦV when the switch is opened. The output of SR1 is transferred to SR2, and SW
2, SW3 ... And transmitted with a certain phase delay. Similarly, when the timing pulse Φ2 falls, SW
A switch opening / closing pulse H2 for activating 2 is output to capture a predetermined video signal ΦV in the next pixel. here,
Although a delay time of Δt is generated between the falling timing of the timing pulses Φ1 and Φ2 and the generation timing of the switch opening / closing pulses H1 and H2 that actually activates the switch circuit SR, it passes through the newly added dummy of SR0. As a result, the old video signal ΦV is delay-corrected Δt ′ and is output as the delay-corrected video signal ΦV ′. In this way, by adding SR0, the delay amount for each liquid crystal panel can be accurately corrected, and the video signal can be accurately taken out even in the liquid crystal driving device with high definition.

The present invention is not limited to the above embodiment, and various embodiments can be adopted. For example, in the above embodiment, the case where the delay correction of the video signal is performed using the dummy 2-phase clock shift register has been described, but the invention is not limited to the 2-phase clock. It is needless to say that the delay correction of the start pulse can be performed using the dummy shift register, and the delay correction of the timing pulse can also be performed.

[0030]

As described above, according to the liquid crystal driving device and the liquid crystal driving method of the present invention, the delay correction shift register is incorporated in the liquid crystal panel to correct the delay of the video signal. It is possible to eliminate the influence of signal propagation peculiar to the scanning circuit in the panel, and to correct the timing deviation between the video signal and the signal line writing switching due to the characteristic variation due to the manufacturing process and the characteristic variation of each liquid crystal panel. be able to. This allows
The viewer can view a good image without image blur even during high-definition display or high-speed driving.

Further, since the friction of the timing between the video signal and the signal line writing switching due to the variation of the characteristics due to the manufacturing process and the variation of the characteristics of each liquid crystal panel can be corrected in advance, a defect such as a display defect can occur in advance. Can be prevented. Therefore, the process defect rate can be reduced and the manufacturing cost can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing a liquid crystal driving device and a liquid crystal driving method of the present invention.

FIG. 2 is a timing chart showing the operation of the liquid crystal driving device and the liquid crystal driving method of the present invention.

FIG. 3 is a block diagram showing a liquid crystal driving device and a liquid crystal driving method of a conventional technique.

FIG. 4 is a timing chart showing the operation of a conventional liquid crystal driving device and liquid crystal driving method.

[Explanation of symbols]

 1 Conventional liquid crystal drive device 2, 102 External signal generator 3, 103 Liquid crystal panel 4 Input terminal 5 Decoder 6 Sample hold S / H 7 AC amplifier 8 Timing generator TG 9 Pulse driver 11, 111 Vertical scanning circuit 12, 112 Horizontal Scanning circuit 13 TFT A Video signal B Timing signal Cs Storage capacity LC Liquid crystal cell VCOM Common electrode Sync Sync signal FRP Frame pulse

Claims (2)

[Claims] 1. A liquid crystal driving device in which a scanning circuit unit and a pixel display unit are integrally formed, and an external signal generator for generating a timing signal, and sampling by a timing signal generated by the external signal generator. A video signal, a transmission delay means for delaying the transmission of a timing signal generated from the external signal generator, and a feedback means for feeding back the transmission delay timing signal output from the transmission delay means to the external signal generator. A liquid crystal driving device comprising: 2. A liquid crystal driving method of a liquid crystal display device in which a scanning circuit unit and a pixel display unit are integrally formed, the external signal generator generating a timing signal, and the timing generated by the external signal generator. A video signal sampled by a signal, a transmission delay means for performing transmission delay of a timing signal generated from the external signal generator, and a transmission delay timing signal output from the transmission delay means is fed back to the external signal generator. Feedback means, wherein the timing signal is a transmission delay timing signal that is output from the external signal generator to the scanning circuit unit and then fed back to the external signal generator by the feedback means. LCD driving method.