JP2001004981A - Driving method for liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform high-quality black displays in upward and downward parts of a screen and also to eliminate the malfunction of a driver. SOLUTION: First and second stabilization periods are provided among first and second black display periods performing black displays in the upward and downward parts of a screen and video display periods. In this stabilization period, the operation of a gate driver is stopped and, on the other hand, the frequency of a clock signal of a source driver is lowered to one fourth of that in the first and second black display periods and the video display period. Thus, potential levels of all internal nodes of the source driver are stabilized. Moreover, in the first and second black display periods, the frequency of the clock signal of the source driver is made equal to that in the video display period and, on the other hand, the level of the start signal of the source driver is kept at an H. Thus, unevennes of the black displays in the first and second black displays is eliminated and high-quality and constant black displays are to be performed by making the sampling parts of the source drive to be in on-state always. Moreover, the malfunction of the driver is to be prevented by stabilizing the potential levels of the internal nodes of a shift register circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving an active matrix type liquid crystal display device, and more particularly to a liquid crystal display device used when displaying an image having an aspect ratio of 16: 9 on a screen having an aspect ratio of 4: 3. Driving method.

[0002]

2. Description of the Related Art In recent years, active matrix type liquid crystal display devices have been frequently used in TV (television) monitors, portable information terminals and the like. There is a case in which a high-definition broadcast such as the MUSE system is converted into the NTSC system and displayed by a liquid crystal display device mainly using a TV image.

In such a case, an image source having an aspect ratio of 16: 9 is displayed on a liquid crystal display device having a screen aspect ratio of 4: 3, so that an image projected by the liquid crystal display device is as shown in FIG. Black display is performed at the top and bottom of the screen, and the left and right sides of the video are cut as shown in FIG. However, in the latter case, it is conceivable that important information is included in the cut video, and the like, so the former is generally more widely used.

A liquid crystal display device is often used for a video camcorder and the like, and the display screen in such a case often has an aspect ratio of 4: 3. However, in recent years, TVs installed in homes are becoming more and more horizontal.
When an image shot by the video camcorder is displayed on a landscape TV, the top and bottom of the image are cut. Therefore, in order to prevent this, when shooting with the video camcorder, as shown in FIG. 3, when displaying an image in advance on the liquid crystal display device on the video camcorder side, black display is performed vertically, and the image is displayed on a landscape TV. In this case, a technique for preventing the upper and lower portions of the screen from being cut is widely used.

As described above, there is a liquid crystal panel drive circuit disclosed in Japanese Patent Application Laid-Open No. 7-147659 as a device for performing black display above and below the screen of a liquid crystal display device. In the liquid crystal panel drive circuit, the timing control circuit generates the gate clock signal GCLK based on the vertical synchronization signal Vsync as shown in FIG. In this case, the frequency of the gate clock signal GCLK is the same as the clock rate of the input video signal during the video valid period.
On the other hand, the high-speed frequency is higher than the horizontal synchronization frequency in the retrace period interposed between the video effective periods (vertical scanning periods). In the flyback period, a black level is given to the source driver as a video signal. Thus, the necessary black display is performed within a short retrace period.

[0006] In addition to the TVs and video camcorders described above, liquid crystal display devices are widely used in portable information terminals and the like. As one of the most important technologies required for products such as the portable information terminal and the video camcorder where portability is important, reduction in power consumption is mentioned. As an example of the reduction in power consumption, there is a liquid crystal display device which uses a shift register circuit for reducing power consumption by stopping input of a clock signal in a non-active state as a source driver.

[0007]

However, the liquid crystal panel drive circuit disclosed in the above-mentioned conventional Japanese Patent Application Laid-Open No. 7-147659 has the following problems. In the liquid crystal panel drive circuit, the relationship of potential applied to the liquid crystal in each pixel is not specifically described. Therefore, in the following, the problems will be described tentatively assuming a potential relationship.

As is well known, since the liquid crystal needs to be driven by an AC voltage, many liquid crystal panel driving devices are driven by inverting the polarity of the voltage applied to each vertical scanning line. In the liquid crystal panel driving circuit disclosed in Japanese Patent Application Laid-Open No. 7-147659, when black display for a total of N horizontal lines is performed in the upper black display area at the top of the screen and the lower black display area at the bottom, As shown in FIG. 5, scanning of N horizontal lines is performed during the retrace period. However, when the polarity of the voltage applied to each vertical scanning line is inverted as described above, the frequency of the applied voltage to be inverted for each vertical scanning line becomes extremely high when the value of N increases and the black display area increases. This makes it difficult to invert the polarity of each vertical scanning line. Therefore, in such a case, the applied voltage is inevitably inverted for each black display area, but in that case, flicker may occur.

Further, every time one of the vertical scanning lines is selected, a video signal of a black level potential is output from the source driver each time. When the value of N increases, the output time of the black level potential increases. As a result, the black level potential cannot be sufficiently written to the vertical scanning line. Therefore, for example, in the n horizontal lines of the upper black display area,
In the first horizontal line, the black level potential sampled by the source driver is written to the pixel as it is, but the black level potential sampled decreases as the second horizontal line, the third horizontal line,. Therefore, the written black level potential is greatly different between the first horizontal line and the n-th horizontal line. As a result, as shown in FIG. 6, uniform black display is not performed in the black display area, and shading appears.

The liquid crystal display device having the shift register circuit for reducing the power consumption has the following problems. That is, when black display is performed on the upper and lower sides of the screen as described above, the input of the clock signal to the shift register circuit is stopped because the shift register circuit of the source driver is in an inactive state. Therefore, it is necessary to input a clock signal to the shift register circuit of the source driver even during the black display period. However, in that case, in order to perform black display in the all black display area within the vertical blanking period, the frequency of the clock signal in the black display period must be higher than the video display period, and when performing video display, The scanning time of one horizontal line is shortened by that much, and the period of one scanning period differs between the black display line and the video display line.

Therefore, the total time of the writing time and the holding time of the pixel differs between the time of black display and the time of image display, and the potential level of the internal node included in the plurality of latch circuits in the shift register circuit is changed. There is a problem that the operation becomes unstable and a malfunction may occur.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method of driving a liquid crystal display device capable of performing high-quality black display on the upper and lower sides of a display screen and preventing a driver from malfunctioning.

[0013]

According to a first aspect of the present invention, a pixel electrode is connected to a data signal line by a switching element based on a control signal output from a gate driver, and output from a source driver. The supplied data signal is supplied to the pixel electrode via the data signal line, and a driving method of an active matrix type liquid crystal display device for displaying an image based on the data signal in a pixel matrix is provided at an upper portion of a screen. When performing black display in the upper black display area and the lower black display area provided below, a first black display period in which black display is performed in the upper black display area and the upper black display area in one vertical scanning period And a video display period in which video display based on the data signal is performed in a video display area following the lower side of the video display area. And a second black display period in which black display is performed in the lower black display area following the video display area, and a frequency of a clock signal for operating a shift register circuit in the source driver is set to a frequency in the video display period. A stabilization period for stabilizing the potential level of the internal node of the shift register circuit is provided.

According to the above configuration, in one vertical scanning period, between the first and second black display periods in which black display is performed on the upper and lower sides of the screen and the video display period in which image display is performed on the upper and lower middle portions of the screen. A stabilization period is provided, and the frequency of the clock signal of the source driver during this stabilization period is made slower than the video display period to stabilize the potential level of the internal node of the shift register circuit in the source driver. The potential levels of the internal nodes of the plurality of latch circuits constituting the register circuit do not become unstable.

Further, in the driving method of the liquid crystal display device according to the first aspect of the present invention, the frequency of the clock signal of the source driver during the stabilization period is set to 1/2 to 1/32 times the frequency during the video display period. It is desirable to set to.

According to the above configuration, the frequency of the clock signal during the stabilization period is set to be 1/1 / the video display period.
Since the ratio is set to 2 to 1/32, the stabilization processing of all the internal nodes in the shift clock circuit of the source driver is reliably performed within one vertical scanning period.

Further, in the driving method of the liquid crystal display device according to the first invention, the frequency of the clock signal for operating the shift register circuit in the gate driver during the first black display period and the second black display period. It is desirable to make the frequency faster than the frequency of the video display period irrespective of the horizontal blanking period, and to keep the analog switch in the source driver that samples the data signal always on.

According to the above configuration, the frequency of the clock signal of the gate driver in the black display period is made faster than that in the video display period, so that black display is reliably performed in the upper black display area and the lower black display area. . Further, by constantly turning on the analog switch section for sampling the data signal in the source driver, the black display potential level of each horizontal line in the black display area becomes the same. As a result, there is no black display unevenness, and stable black display is performed.

Further, in the driving method of the liquid crystal display device according to the first invention, the frequency of the clock signal for operating the shift register circuit in the gate driver during the first and second black display periods is determined by changing the frequency of the video signal to the video signal. 1.5 to 1 times the display period
It is desirable to set it to 0 times.

According to the above arrangement, when displaying an image with an aspect ratio of approximately 16: 9 on a screen having an aspect ratio of approximately 4: 3, a black display and an image display area for both upper and lower black display areas are displayed. Is reliably displayed. Further, the polarity of the voltage applied to the data signal line is inverted.

Further, in the driving method of the liquid crystal display device according to the first invention, at least one of the gate driver and the source driver includes a plurality of latches connected in series and sequentially transferring a pulse signal in synchronization with a clock signal. It is preferable that the clock signal is constituted by a latch circuit in which the pulse of the pulse signal exists and a shift register circuit which is inputted only to a latch circuit in the vicinity thereof.

According to the above configuration, when at least one of the gate driver and the source driver is composed of a shift register circuit that needs to stabilize the potential level of the internal node, the internal circuit of the shift register circuit By stabilizing the potential level of the node, black display is performed on the black notation area.

Further, in the driving method of the liquid crystal display device according to the first invention, at least one of the gate driver and the source driver includes a plurality of latches connected in series and sequentially transferring a pulse signal in synchronization with a clock signal. It is desirable that the clock signal be constituted by a shift register circuit which is inputted to all the latch circuits.

According to the above configuration, the stabilization is required even when at least one of the gate driver and the source driver is constituted by a shift register circuit that does not need to stabilize the potential level of the internal node. With the same driving method as that of the shift register circuit, black display in the black notation area and video display in the video display area are performed.

In the driving method of the liquid crystal display device according to the first aspect of the invention, it is preferable that at least one of the gate driver and the source driver is formed on the same substrate as the pixel electrode.

According to the above configuration, in a small and inexpensive liquid crystal display device in which at least one of the gate driver and the source driver is formed on the same substrate as the pixel electrode, the potential level of the internal node of the source driver can be stabilized. Is achieved.

In the driving method of the liquid crystal display device according to the first aspect of the present invention, it is preferable that the switching element is a polycrystalline silicon thin film transistor and is formed on a glass substrate at a temperature of 600 ° C. or less.

According to the above configuration, in a low-cost liquid crystal display device in which a polycrystalline silicon thin film transistor as the switching element is formed on a glass substrate at a temperature of 600 ° C. or less and which has a low display quality, The potential level is stabilized.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments. FIG. 1 is a timing chart of one vertical scanning period according to output signals of a gate driver and a source driver for realizing the driving method of the liquid crystal display device of the present embodiment. In the present embodiment, when a video signal conforming to the NTSC standard is displayed on a liquid crystal display device having a screen aspect ratio of about 4: 3, black display areas are provided at the top and bottom of the screen to increase the aspect ratio. The case of displaying at approximately 16: 9 is described. However, the present invention is not limited to the value of the aspect ratio.

First, in the first black display period in which black is displayed in the upper black display area on the upper side of the screen, the frequency of the gate driver clock signal for operating the shift register circuit in the gate driver is set in the video display area of the screen. 3 times 2.5 times the 15.75 kHz of the video display period to be displayed.
Set to 9.4 kHz. Further, as shown in the figure, a gate driver start signal to be input to the shift register circuit of the gate driver is input in synchronization with the rise of the vertical synchronization signal. FIG. 1 shows an example in which the operation is performed in synchronization with the rising edge of each clock. However, when a shift register circuit that operates in synchronization with the falling edge of each clock is used, the shift register circuit is used. It is sufficient to input a start signal at a timing suitable for the above.

Further, in this embodiment, the scanning speed is increased by setting the frequency of the gate driver clock signal in the first black display period to 2.5 times that in the video display period. However, the magnification in that case does not have to be 2.5 times. However, since the relationship between this magnification and the area of the black display area is inversely proportional, it is necessary to select a magnification that is balanced in display.

As described above, most active matrix liquid crystal display devices apply an AC voltage to the liquid crystal, so that the polarity of the voltage applied to each vertical scanning line is often inverted and applied. . In that case, it is necessary to invert the polarity of the voltage applied to each vertical scanning line even when performing the above black display. In consideration of the above, the gate driver clock signal is provided so that black display is performed on all the horizontal lines in the upper black display area and the polarity of the applied voltage can be inverted for each vertical scan. Needs to be determined.

As described above, in the present embodiment,
The magnification is 2.5 times, and the period per vertical scan is 26.4 μs. If this period is significantly shortened, the time during which a voltage is applied to the liquid crystal is also shortened, which may cause insufficient writing. Therefore, considering the above factors including the balance of the black display area and the like, it is desirable that the magnification of the gate driver clock signal is about 1.5 to 10 times.

In the first black display period in which black display is performed on the upper part of the screen, the frequency of the source driver clock signal for operating the shift register circuit in the source driver is equal to the frequency in the video display period. Further, the source driver start signal keeps “H” level during the first black display period.

Here, in the above source driver,
A sampling pulse for sampling video data is created based on a source driver start signal input to the shift register circuit. The sampling unit to which the sampling pulse is input detects the rising of the sampling pulse and performs sampling.

In this case, during the first black display period, the level of the source driver start signal is set to “H”.
Has been maintained. By doing so, all the analog switches constituting the sampling section are always on. As a result, the video signal of the black level potential is always output to all the data signal lines, and even if the number of horizontal lines in the upper black display area increases, the black level potentials of all the horizontal lines become the same. Therefore, in the first black display period, black display unevenness for each horizontal line is eliminated, and stable black display is performed. Further, the potential levels of the internal nodes included in the plurality of latch circuits in the shift register circuit are stabilized.

In the present embodiment, as described above, the sampling section detects a rising edge of a sampling pulse and performs sampling.
However, when the sampling section operates at the falling edge of the sampling pulse, the polarity of the source driver start signal input to the shift register circuit may be changed accordingly. However, there is no need to change the timing of the source driver start signal itself.

Next, a first stabilization period after the end of the first black display period will be described. In the first stabilization period, the gate driver clock signal input to the shift register circuit of the gate driver has only a DC component (level “L”). That is, during the first stabilization period,
The shift register circuit in the gate driver does not operate, and no image data is written to each pixel portion of the liquid crystal panel. Further, in this period, the frequency of the source driver clock signal input to the shift register circuit in the source driver is １ of the frequency of the source driver clock in the video display period and the first black display period.

The length of the first stabilization period has a length of four horizontal scanning periods, and the potential levels of all internal nodes of the shift register circuit of the source driver are multiplied by the time of the four horizontal scanning periods. The process for stabilization is performed. still,
In the present embodiment, the frequency of the source driver clock signal during the first stabilization period is set to の of the first black display period and the video display period, and the length of the first stabilization period is set to four horizontal scanning periods. And However, these values are only examples. However, if the frequency magnification is extremely large, the internal node cannot be stabilized. On the other hand, if it is extremely small, the stabilization processing of all internal nodes cannot be performed within one vertical scanning period. Therefore, the magnification of the frequency is approximately 1/2 to 1 /
It is desirable to set about 32 times. In addition, the first
The length of the stabilization period is desirably about 2 horizontal scanning periods to 32 horizontal scanning periods depending on the magnification of the frequency.

The source driver start signal input to the shift register circuit of the source driver during the first stabilization period is supplied to the first-stage latch circuit of the shift register circuit as shown in FIG. After outputting the sampling pulse based on the frequency-converted source driver clock signal, it is a one-pulse signal for preventing the sampling pulse from being output until the next video display period.

Next, a video display period following the first stable period will be described. The image display processing during this image display period is basically the same as the case of the conventional liquid crystal display device driving method. However, in the present embodiment, when displaying a video signal conforming to the NTSC system on a liquid crystal display device having a screen aspect ratio of about 4: 3,
It is assumed that black display areas are provided above and below the screen, and the aspect ratio of the video display area is approximately 16: 9.
Therefore, for example, when a liquid crystal display device having 230 scanning signal lines is used, the number of scanning signal lines in the video display area is approximately 170 due to the presence of black display areas at the top and bottom of the screen.
It will be around this book. However, since the video signal conforms to the NTSC standard, an image is displayed using the remaining horizontal scanning lines that are thinned out of some 230 effective horizontal scanning lines, or conforms to the NTSC standard. It is necessary to take measures such as temporarily writing the video signal to be written into a video field memory or the like based on a write clock, and reconstructing the video signal with a read clock having a frequency lower than the frequency of the write clock. These techniques are well-known techniques and will not be described here.

Next, the second stabilization period following the video display period will be described. Basically, the gate driver clock signal and gate driver start signal input to the gate driver shift register circuit and the source driver clock signal and source driver start signal input to the source driver shift register circuit are This is the same as the case of the first stabilization period described above. However, if there is no problem in display, the source driver start signal may be a signal having a polarity opposite to that during the first stabilization period (FIG. 1 shows the case of the reverse polarity). Also, the frequency of the source driver clock signal does not need to be the same as the frequency during the first stabilization period,
Any frequency different from the stabilization period may be changed.

Next, the second black display period in which black display is performed in the lower black display area on the lower side of the screen following the first stabilization period will be described. The signals of the gate driver clock signal, gate driver start signal, source driver clock signal, and source driver start signal in the second black display period may be the same as those in the first black display period. Further, the frequency of the gate driver clock signal may be different from that of the first black display period as long as the balance between the widths of the black display areas at the top and bottom of the screen is not lost.

As described above, in the present embodiment,
A first stabilization period is provided between a first black display period in which black display is performed in the upper black display area at the top of the screen and a video display period in which video is displayed in the video display area following the upper black display area. . Further, a second stabilization period is provided between the video display period and a second black display period in which black is displayed in a lower black display area following the video display area. In the stabilization period, while the operation of the shift register circuit of the gate driver is stopped, the frequency of the clock signal of the source driver is reduced to, for example, 1/4 of the first and second black display periods and the video display period. descend. Thus,
That is, the potential levels of all internal nodes of the shift register circuit of the source driver are stabilized.

In the first black display period and the second black display period, the frequency of the clock signal of the gate driver is set to, for example, 2.5 times that in the video display period to increase the scanning speed. The black display is reliably performed in the upper black display area and the lower black display area. Further, the frequency of the source driver clock signal is set to be equal to the frequency during the video display period, while the level of the source driver start signal is maintained at "H" (or "L"). By doing so, the analog switch section for sampling the video signal in the source driver is always turned on, thereby eliminating black display unevenness during the first and second black display periods and performing stable black display. be able to. Further, the potential level of the internal node included in the plurality of latch circuits in the shift register circuit can be stabilized.

That is, according to the present embodiment, when black display is performed on the upper and lower sides of the display screen, there is no black display unevenness.
High quality and stable black display can be performed. Further, the potential level of the internal node in the source driver can be stabilized, so that malfunction of the source driver can be prevented.

The above-described method of driving a liquid crystal display device is an example of a liquid crystal display device that requires stabilization of an internal node in a shift register circuit of a source driver. Can be introduced without any changes. Therefore, if a liquid crystal display device driving circuit based on the driving method of the present embodiment is prepared in advance,
It can be used by connecting to any liquid crystal display device.

As described above, in the present embodiment, when a video signal conforming to the NTSC standard is displayed on a liquid crystal display device having a screen aspect ratio of about 4: 3, black display areas are formed vertically. Is described, and the case where the aspect ratio of the video display area is set to approximately 16: 9 is described. However, when both aspect ratios are not the above values, and when the black display areas provided at the top and bottom of the screen are relatively small, as shown in FIG. 2, in the first and second black display periods, As shown in FIG. 1, it is not necessary to increase the frequency of the gate driver clock signal, and the same effect can be obtained by driving the shift register circuit of the gate driver at the same frequency as the video display period. You can do it.

In the above embodiment, the NTS
Although the case where a video signal of the C system is input is described as an example, for example, VGA which is a video format for a PAL system, a SECAM system, and a personal computer is used.
The present invention can be applied to other video signals such as a (video graphics array) and an XGA (extended video graphics array) system.

In addition, in various video signal formats such as the NTSC system, the signal level of the area corresponding to the vertical blanking period is usually a black level in many cases. The case where the line period is used has been described as an example. However, if a more sufficient black level period is required, black display may be performed by positively inserting the black level period within the vertical blanking period.

Further, the liquid crystal display device to which the method of driving the liquid crystal display device in the above embodiment is applied is not particularly limited, and the switching element switches the pixel electrode based on the control signal output from the gate driver. An active matrix type liquid crystal display device which is connected to a signal line, supplies a video signal output from a source driver to the pixel electrode via the data signal line, and displays a video based on the video signal on a pixel matrix. I just need.

In this case, at least one of the gate driver and the source driver may be formed on the same substrate as the pixel electrode, so that the size and cost can be reduced. In addition, the polycrystalline silicon thin film transistor as the switching element may be formed on a glass substrate at a temperature of 600 ° C. or less to achieve high display quality and low cost.

[0053]

As is apparent from the above description, the driving method of the liquid crystal display device of the first aspect of the present invention performs black display in the black display areas provided at the upper and lower portions of the screen in one vertical scanning period. , The first black display in the upper black display area
The frequency of the clock signal of the source driver is made slower than the video display period between the black display period and the video display period, and between the video display period and the second black display period for performing black display in the lower black display area. Thus, the stabilization period for stabilizing the potential level of the internal node of the shift register circuit is provided, so that the potential levels of the internal nodes of the plurality of latch circuits constituting the shift register circuit can be stabilized. Therefore, malfunction of the source driver can be prevented.

Further, in the driving method of the liquid crystal display device according to the first aspect of the present invention, the frequency of the clock signal of the source driver during the stabilization period is set to 1/2 to 1/32 times the frequency during the video display period. In this case, all internal nodes in the shift clock circuit of the source driver can be stably processed within one vertical scanning period.

Further, in the driving method of the liquid crystal display device according to the first invention, in the first black display period and the second black display period, the frequency of the clock signal of the gate driver is shifted faster than the video display period. Thus, black display can be reliably performed in the black display area. Further, if the analog switch section for sampling the data signal in the source driver is always turned on, the black display potential level of each horizontal line in the black display area can be made the same. Therefore, stable black display can be performed without black display unevenness for each horizontal line.

Further, in the driving method of the liquid crystal display device according to the first aspect of the present invention, the frequency of the clock signal of the gate driver is set to be 1.5 to 1 times the video display period during the black display period.
If set to 0x, when displaying an image with an aspect ratio of approximately 16: 9 on a screen with an aspect ratio of approximately 4: 3, the black display for both upper and lower black display areas and the image for the image display area And display can be performed reliably. Furthermore, the polarity inversion of the voltage applied to the data signal line during the black display period can be reliably performed.

Further, in the driving method of the liquid crystal display device according to the first invention, at least one of the gate driver and the source driver is connected to a plurality of latches which serially transfer a pulse signal in synchronization with a clock signal. And a shift register circuit in which the clock signal is input only to the latch circuit in which the pulse of the pulse signal exists and a latch circuit in the vicinity thereof, the potential level of the internal node of the shift register circuit is reduced. By stabilizing, black display can be performed on the black notation area.

Also, in the driving method of the liquid crystal display device according to the first invention, at least one of the gate driver and the source driver includes a plurality of latches connected in series and sequentially transferring a pulse signal in synchronization with a clock signal. If the shift register circuit is constituted by a circuit and the clock signal is inputted to all the latch circuits, the shift register circuit which does not need to stabilize the potential level of the internal node can be used. The black display in the black notation area and the video display in the video display area can be performed by the same driving method as that of the shift register circuit that needs to be performed.

Further, in the driving method of the liquid crystal display device according to the first aspect of the invention, if at least one of the gate driver and the source driver is formed on the same substrate as the pixel electrode,
In a small and inexpensive liquid crystal display device having the above configuration,
The potential level of the internal node of the source driver can be stabilized.

Further, in the driving method of the liquid crystal display device according to the first invention, if the polycrystalline silicon thin film transistor as the switching element is formed on a glass substrate at a temperature of 600 ° C. or less, the display quality having the above configuration is improved. In a good and inexpensive liquid crystal display device, the potential level of the internal node of the source driver can be stabilized.

[Brief description of the drawings]

FIG. 1 is a timing chart of one vertical scanning period according to output signals of a gate driver and a source driver for realizing the liquid crystal display device driving method of the present invention.

FIG. 2 is a timing chart different from FIG.

FIG. 3 is a diagram showing an example of a screen in which black display is performed vertically.

FIG. 4 is a diagram showing an example of a screen in which the left and right sides of a video are cut.

FIG. 5 is a timing chart of each signal when black display is performed on the upper and lower sides of a screen by a conventional liquid crystal panel drive circuit.

6 is an explanatory diagram of shading appearing on a screen when a black display area is wide in the liquid crystal panel driving circuit shown in FIG. 5;

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Kazuki Washio 22-22 Nagaikecho, Abeno-ku, Osaka City, Osaka Inside (72) Inventor Yasushi Kubota 22-22 Nagaikecho, Abeno-ku, Osaka City, Osaka (72) Inventor Hiroshi Yoneda 22-22 Nagaikecho, Abeno-ku, Osaka City, Osaka F-term (reference) 2H093 NA16 NA43 NC16 NC22 NC23 NC26 NC34 ND09 ND48 ND60 NH16 5C006 AA01 AC27 AF42 AF47 AF51 AF73 BB16 BC13 BF03 FA18 FA22 5C058 AA09 BA02 BA06 BA22 BA28 BB09 BB10 BB23 BB25 5C080 AA10 BB05 DD05 DD09 EE17 FF11 GG08 JJ01 JJ04

Claims (9)

[Claims] 1. A pixel element is connected to a data signal line by a switching element based on a control signal output from a gate driver, and a data signal output from a source driver is supplied to the pixel electrode via the data signal line. Then, in a method of driving an active matrix type liquid crystal display device that displays an image based on the data signal on a pixel matrix, an upper black display area provided at an upper portion of a screen and a lower black display area provided at a lower portion are provided. In performing black display, in one vertical scanning period, a video display based on the data signal is displayed in a first black display period in which black display is performed in the upper black display area and a video display area that is below the upper black display area. Black in the lower black display area following the video display period and between the video display period and the video display area. Between the second black display period and the clock signal for operating the shift register circuit in the source driver, the frequency of the clock signal is lower than the frequency in the video display period. A method for driving a liquid crystal display device, comprising a stabilization period for stabilizing a potential level. 2. The method of driving a liquid crystal display device according to claim 1, wherein the frequency of the clock signal of the source driver during the stabilization period is one of the frequency during the video display period.
A method for driving a liquid crystal display device, wherein the ratio is from 1/2 to 1/32 times. 3. The method of driving a liquid crystal display device according to claim 1, wherein a clock signal for operating a shift register circuit in the gate driver is provided during the first black display period and the second black display period. The frequency is made faster than the frequency of the video display period irrespective of the horizontal blanking period, and the analog switch section in the source driver for sampling the data signal is always turned on. For driving a liquid crystal display device. 4. The driving method of a liquid crystal display device according to claim 3, wherein a frequency of a clock signal for operating a shift register circuit in the gate driver during the first and second black display periods is equal to the video signal. A method for driving a liquid crystal display device, wherein the driving period is 1.5 to 10 times the display period. 5. The method of driving a liquid crystal display device according to claim 1, wherein at least one of the gate driver and the source driver is connected in series and a plurality of latches sequentially transfer pulse signals in synchronization with a clock signal. A liquid crystal display device comprising a latch circuit in which a pulse of the pulse signal is present and a shift register circuit adapted to be input only to a latch circuit in the vicinity thereof. Drive method. 6. The driving method for a liquid crystal display device according to claim 1, wherein at least one of the gate driver and the source driver is connected in series and a plurality of latches sequentially transfer pulse signals in synchronization with a clock signal. A driving method for a liquid crystal display device, comprising: a shift register circuit comprising a circuit, wherein the clock signal is inputted to all the latch circuits. 7. The method for driving a liquid crystal display device according to claim 1, wherein at least one of the gate driver and the source driver is formed on the same substrate as the pixel electrode. A method for driving a liquid crystal display device. 8. The driving method of a liquid crystal display device according to claim 1, wherein the switching element is a polycrystalline silicon thin film transistor. . 9. The method of driving a liquid crystal display device according to claim 8, wherein the switching element is formed at a temperature of 600 ° C. or less on a glass substrate. .