JPH08130375A - Multilayer printed wiring board - Google Patents

Abstract

PURPOSE: To arrange plating leads with a narrow pitch as electrically insulated to enhance a multilayer printed wiring board in mounting density by a method wherein the burrs of plating leads are made small enough not to cause short circuit between the plating leads when the plating leads for electroplating the connection terminals of a multilayer printed wiring board with solder or golds are cut off and insulated by isolation at forming. CONSTITUTION: Plating leads 32 and 33 are formed out of the inner conductors 12 and 13 of a multilayer printed wiring board 100. It is preferable that adjacent outer conductors 11 and 14 are formed not extending but receding on the external end face of the multilayer printed wiring board 100 where plating leads 32 and 33 are provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to soldering a part of a conductor circuit,
The present invention relates to a multi-layer printed wiring board that is electroplated with gold or the like, and more specifically to a multi-layer printed wiring board in which a plating lead for electroplating is cut at an outer end surface.

[0002]

2. Description of the Related Art Conventionally, a printed wiring board on which electronic components such as packaged semiconductor integrated circuits are mounted has solder for connecting external connection terminals of the electronic components by soldering to the connection terminals of the printed wiring board. It has been given. The miniaturization of electronic parts and the increase in the number of pins have led to the miniaturization of external connection terminals and the minimization of lead pitch.The solder is electroplated and the amount of solder is strictly controlled, resulting in poor soldering and poor soldering. It became necessary to prevent short circuits between terminals. Further, in order to perform higher-density mounting, solder plating on connection terminals for flip-chip connection of bare chip semiconductor integrated circuits and nickel or gold plating on connection terminals for wire bonding connection are generally performed by electroplating. Was there.

In order to electroplate these connection terminals, a plating lead pattern is laid out from the outside of the product of the printed wiring board, and the plating lead pattern is cut and punched by punching or router cutting at the time of external processing of the printed wiring board. Let them do it.

On the other hand, in the recent high-density mounting of electronic parts, the front and back surfaces of the printed wiring board are mostly occupied by the electronic parts, so that the area for wiring the conductor circuit is insufficient, and the printed circuit board is printed to improve the electrical characteristics. It became necessary to make the wiring board multi-layered. When soldering or gold plating is applied to the connection terminals of this multilayer printed wiring board by electroplating, plating leads are generally provided in the outer conductor layer on the surface of the substrate, as in the conventional double-sided printed wiring board.

When the plating lead is provided in the outer conductor layer on the surface of the substrate, the burr of the plating lead is caused by punching or router cutting at the time of outer shape processing as in the conventional double-sided printed wiring board. As described above, in a multilayer printed wiring board, the wiring pattern has a higher density, and the electronic components to be mounted are also mounted at a higher density, and the number of connecting terminals is also higher, so the number of plating leads is also higher. Because it has become
The problem of short circuit between the adjacent plating leads due to the burr of the plating leads was serious.

The burr of the plating lead has been devised to suppress it by forming a solder resist on the plating lead on the outer shape processing line, but when the plating lead is formed on the surface of the substrate which is the punch exit side in the punching outer shape. The hold down was invalid. Further, since the solder resist coating is thin and has a low adhesion, the burr can be reduced to some extent, but it is not sufficiently small.

[0007]

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems. The problem to be solved is to apply solder or gold to the connection terminals of a multilayer printed wiring board by electroplating. When the plating lead is cut and separated and insulated at the time of outer shape processing, the burr is sufficiently reduced to prevent a short circuit between the plating leads. The purpose thereof is to further promote high-density mounting on a multilayer printed wiring board by arranging plated leads with a narrow pitch and good insulation.

[0008]

In order to solve the above-mentioned problems, the means adopted by the present invention is to form the plating leads 32, 33 by the inner layer conductors 12, 13 of the multilayer printed wiring board 100. Also, preferably, the plated leads 32, 33
The outer layer conductors 11 and 14 adjacent to each other were formed on the outer peripheral end face portion of the multilayer printed wiring board 100 at the portion where the above was applied by retracting without extending.

[0009]

In the multilayer printed wiring board 100 of the present invention, the plating lead 3 for electroplating solder or gold is used.
2, 33 are formed by the inner layer conductors 12 and 13. Therefore, since the plated leads 32 and 33 are sandwiched by the inner layer insulating material 21 and the outer layer insulating material 22 during outer shape processing,
The burr will be small enough. The outer layer insulating material 22 is thicker than the solder resist, and when the outer layer insulating material 22 is made of a prepreg in which a glass fiber woven cloth is impregnated with resin, the suppressing strength is higher and the adhesive strength is higher, so that burr hardly occurs. .

Preferably, the plated leads 32, 33 are also
The outer layer conductor 1 adjacent to the inner layer conductors 12 and 13 in which the
Nos. 1 and 14 were formed by retreating without extending to the outer end face. Therefore, in this case, the outer conductor 11,
14 does not cause burr, and the inner layer conductors 12, 13
It does not cause a short circuit due to burr.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in detail with reference to the embodiments shown in the drawings.

FIG. 1 is a plan view showing an embodiment of the multilayer printed wiring board according to the present invention. 2 is shown in FIG.
It is sectional drawing cut | disconnected by AA 'of FIG. The manufacturing method is
First, the inner layer conductors 12 and 13 are formed as inner layer substrates on both surfaces of the inner layer insulating material 21, and then the outer layer insulating material 22 is formed by prepreg.
By laminating with the above inner layer substrate, outer layer conductors 11 and 14 and through holes 40 were further formed on the outer layer insulating material 22. Here, the conductors 11, 12, 13 and 14 and the through hole 40 may be formed by using a known subtractive method or an additive method. In this embodiment,
Inner layer insulation material 21 made of glass epoxy with a thickness of 0.5 mm
And a total of four glass epoxy prepregs each having a thickness of 0.1 mm were used to form a four-layer printed wiring board having a total thickness of 1.0 mm.

Then, in order to electroplate a connection terminal (not shown) for connection with an electronic component formed as a part of the outer layer conductors 11 and 14, a plating lead 32 is formed as a part of the inner layer conductors 12 and 13. , 33 are formed. The outer layer conductors 11 and 14 are appropriately connected to the plated leads 32 and 33 by through holes 40.
Reference numeral 33 denotes an end face of the outer shape, which is cut and separated and insulated during outer shape processing. What is important here is that the plating leads 32 and 33 are formed as a part of the inner layer conductors 12 and 33. Therefore, the plating leads 32 and 33 are formed on the outer layer insulating material 22 and the inner layer insulating material 21 during outer shape processing. Since it is firmly sandwiched by and, burr hardly occurs. Conventionally, even if plated leads are formed on outer layer conductors 11 and 14 and held down with solder resist, it is 0.1 to 0.5 mm during external processing.
Compared with the burr, 0.05 mm in this embodiment
I was able to reduce the burr below. Therefore, the wiring pitch of the plating leads is changed from the conventional 0.4mm to 0.15mm.
Could be narrowed to

Although the above embodiment has been described with respect to a four-layer printed wiring board, it can be applied to a multilayer printed wiring board having three or more layers having one or more inner layer conductors. The material of the insulating material is not limited to glass epoxy, and may be glass polyimide, glass triazine, or Teflon.

Further, a part of the plated leads may be formed as the outer layer conductor and the remaining plated leads may be formed as the inner layer conductor. In this case, the plating lead is arranged with the shortest length by the outer layer conductor in the part where the wiring has a margin, and the remaining plating lead is formed as the inner layer conductor with a narrow pitch, so that the plating leads can be reasonably densely arranged. There is an advantage that it can be placed.

[0016]

As described in detail above, in the multilayer printed wiring board according to the present invention, the burr of the plating lead is sufficiently small during the outer shape processing, and therefore the plating lead is arranged at a narrow pitch with good insulation. Therefore, high-density mounting on a multilayer printed wiring board can be further promoted.

[Brief description of drawings]

FIG. 1 is a plan view showing an embodiment of a multilayer printed wiring board according to the present invention.

FIG. 2 is a cross-sectional view taken along the line AA ′ in FIG. 1 showing one embodiment of the multilayer printed wiring board according to the present invention.

[Explanation of symbols]

 11 Outer Layer Conductor 12 Inner Layer Conductor 13 Inner Layer Conductor 14 Outer Layer Conductor 21 Inner Layer Insulating Material 22 Outer Layer Insulating Material 32 Plating Lead 33 Plating Lead 40 Through Hole 100 Multilayer Printed Wiring Board

Claims (2)

[Claims] 1. A multilayer printed wiring board (100) for mounting an electronic component such as a semiconductor integrated circuit, the multilayer printed wiring board (10) for connection with the electronic component.
0) The surface of the conductor circuit (10) is electroplated with solder, gold or the like by the plating leads (32, 33), and the plating leads (32, 33) are cut at the outer end face. 3.) In the multilayer printed wiring board (100), the plated leads (32, 33) are formed by the inner layer conductors (12, 13) of the multilayer printed wiring board (100). 2. The multilayer printed wiring board (10) according to claim 1.
In 0), the outer conductors (11, 14) adjacent to the outer end surface of the multilayer printed wiring board (100) at the portion where the plating leads (32, 33) are applied are retracted without extension. Multilayer printed wiring board characterized by being formed (10
0).