JPH08125214A - Manufacture of thin-film element - Google Patents

Manufacture of thin-film element

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Publication number
JPH08125214A
JPH08125214A JP6278622A JP27862294A JPH08125214A JP H08125214 A JPH08125214 A JP H08125214A JP 6278622 A JP6278622 A JP 6278622A JP 27862294 A JP27862294 A JP 27862294A JP H08125214 A JPH08125214 A JP H08125214A
Authority
JP
Japan
Prior art keywords
film
type semiconductor
semiconductor film
thin
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6278622A
Other languages
Japanese (ja)
Inventor
Kenji Yamazaki
憲二 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Business Innovation Corp
Original Assignee
Fuji Xerox Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Xerox Co Ltd filed Critical Fuji Xerox Co Ltd
Priority to JP6278622A priority Critical patent/JPH08125214A/en
Publication of JPH08125214A publication Critical patent/JPH08125214A/en
Pending legal-status Critical Current

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  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE: To improve manufacturing yield when filming each semiconductor film using each separate filming device in a method of manufacturing a thin-film element where i-type semiconductor film is laminated on n-type semiconductor film. CONSTITUTION: In the manufacturing method of a thin-film element for successively forming a first conductive film (metal electrode), an n-type semiconductor film consisting of amorphous silicon where phosphorus is doped, I-type semiconductor film consisting of amorphous silicon, and a second conductive film (transparent electrode), an n-type semiconductor film 12 is formed and then a film 13a for protecting interface consisting of the i-type semiconductor thin film which is thinner than the i-type semiconductor film is formed. Then, after breaking vacuum, an i-type semiconductor film 13b is formed on the film 13a for protecting interface, thus preventing an n-type semiconductor film 12 from being damaged due to the presence of the film 13a for protecting interface even if a surface treatment such as the elimination of natural oxide film is performed when changing the filming device.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は薄膜素子の製造方法に関
し、より詳しくは半導体膜を導電膜で挟んで構成される
サンドイッチ型フォトダイオ−ドの製造方法に関するも
のである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a thin film element, and more particularly to a method for manufacturing a sandwich type photodiode having a semiconductor film sandwiched between conductive films.

【0002】[0002]

【従来の技術】薄膜素子としてのフォトダイオ−ドは、
n型半導体膜及びi型(真性)半導体膜を導電膜で挟ん
だサンドイッチ構造で構成される。このフォトダイオー
ドは、予め金属膜が着膜されたガラス基板上に、P(リ
ン)をド−ピングしたSi(シリコン)を着膜してn型
半導体膜を形成し、非晶質Si(シリコン)よりなるi
型半導体膜をn型半導体膜上に着膜し、更に金属膜を着
膜することにより製造される。この場合において、前記
n型半導体膜とi型半導体膜は、通常それぞれ独立した
着膜装置において着膜される。
2. Description of the Related Art Photodiodes as thin film elements are
It has a sandwich structure in which an n-type semiconductor film and an i-type (intrinsic) semiconductor film are sandwiched between conductive films. In this photodiode, Si (silicon) doped with P (phosphorus) is deposited on a glass substrate on which a metal film is deposited in advance to form an n-type semiconductor film. ) Consists of i
It is manufactured by depositing a type semiconductor film on an n-type semiconductor film and further depositing a metal film. In this case, the n-type semiconductor film and the i-type semiconductor film are usually formed by independent film forming devices.

【0003】n型半導体膜とi型半導体膜とをそれぞれ
別の着膜装置で着膜する理由としては、各着膜装置を独
立して稼働させることにより、各着膜装置を複数の用途
に使用可能として生産効率を向上させるためである。ま
た、同一の着膜装置で着膜する場合においては、i型半
導体膜が着膜治具に付着するP(リン)で汚染されるこ
とがあり、別の着膜装置で着膜することにより、前記し
た汚染を完全に防止することができる。
The reason for depositing the n-type semiconductor film and the i-type semiconductor film by different film depositing devices is that each film depositing device can be used for a plurality of purposes by operating each film depositing device independently. This is because it can be used to improve production efficiency. Further, when the film is formed by the same film forming apparatus, the i-type semiconductor film may be contaminated by P (phosphorus) attached to the film forming jig, and the film is formed by another film forming apparatus. The above-mentioned contamination can be completely prevented.

【0004】[0004]

【発明が解決しようとする課題】しかし、n型半導体膜
とi型半導体膜とをそれぞれ別の着膜装置で着膜する場
合、i型半導体膜の着膜工程においてi型半導体膜にド
−ム状の気泡が発生するという現象が生じることがあっ
た。このド−ム状の気泡が発生すると、その多くはガラ
ス基板全面にわたって発生するために、フォトダイオー
ド(薄膜素子)の製造歩留りを著しく低下させ、生産に
与える影響は大きいものであった。
However, when the n-type semiconductor film and the i-type semiconductor film are formed by different film forming apparatuses, the i-type semiconductor film is exposed to the film in the step of forming the i-type semiconductor film. There was a case where a phenomenon in which air bubbles were generated. When the dome-shaped bubbles are generated, most of them are generated over the entire surface of the glass substrate, so that the production yield of the photodiode (thin film element) is remarkably reduced and the production is greatly affected.

【0005】上記現象について、図3を参照しながら具
体的に説明する。ガラス基板20に金属薄膜21を着膜
し、この金属薄膜21が着膜されたガラス基板20を着
膜装置内に配置し、P(リン)をド−ピングした非晶質
Si(シリコン)を着膜することによりn型半導体膜2
2を形成する(図3(a))。その後、着膜装置よりガ
ラス基板20を取り出して別の着膜装置内に配置し、非
晶質Si(シリコン)より成るi型半導体膜23を、例
えば基板温度200度,CVD圧力0.5Torrの条件
で着膜する。この際に、n型半導体膜22の表面が大気
中に解放されるため、大気中の酸素によりn型半導体膜
22上に矢印Aに示すように自然酸化膜が形成された
り、コンタミネ−ションが付着したりする。このような
自然酸化膜やコンタミネ−ションを除去するために、バ
ファ−ドフッ酸(BHF)等の薬品を用いてn型半導体
膜の表面処理が行なわれる(図3(b))。
The above phenomenon will be specifically described with reference to FIG. A metal thin film 21 is deposited on the glass substrate 20, the glass substrate 20 on which the metal thin film 21 is deposited is placed in a film deposition apparatus, and amorphous Si (silicon) doped with P (phosphorus) is deposited. By depositing the film, the n-type semiconductor film 2
2 is formed (FIG. 3A). After that, the glass substrate 20 is taken out from the film forming apparatus and placed in another film forming apparatus, and the i-type semiconductor film 23 made of amorphous Si (silicon) is formed, for example, at a substrate temperature of 200 degrees and a CVD pressure of 0.5 Torr. Film is deposited under the conditions. At this time, since the surface of the n-type semiconductor film 22 is released to the atmosphere, a natural oxide film is formed on the n-type semiconductor film 22 by the oxygen in the atmosphere as shown by an arrow A, or contamination is generated. It adheres. In order to remove such a natural oxide film and contamination, the surface treatment of the n-type semiconductor film is performed using a chemical such as buffered hydrofluoric acid (BHF) (FIG. 3 (b)).

【0006】しかしながら、n型半導体膜22の表面を
バファ−ドフッ酸(BHF)処理すると、n型半導体膜
22の表面が局所的にダメ−ジを受けてしまうことがあ
る(図3(c))。その結果、n型半導体膜22とi型
半導体膜23との密着力が低下し、n型半導体膜22と
i型半導体膜23との界面に矢印Bに示すような直径が
数μm〜数mmのド−ム状の気泡が発生することがある
(図3(d))。
However, if the surface of the n-type semiconductor film 22 is treated with buffered hydrofluoric acid (BHF), the surface of the n-type semiconductor film 22 may be locally damaged (FIG. 3C). ). As a result, the adhesive force between the n-type semiconductor film 22 and the i-type semiconductor film 23 is reduced, and the diameter of the interface between the n-type semiconductor film 22 and the i-type semiconductor film 23 is several μm to several mm as shown by an arrow B. Dome-shaped bubbles may occur (FIG. 3 (d)).

【0007】このようなド−ム状の気泡が発生すると、
次工程に進んでいく間にこの気泡が破裂し、i型半導体
膜23に膜剥がれ等の不具合を生じ、所望のパタ−ンが
形成できなくなる(図3(e))。また、フォトダイオ
ードの特性を向上させるため、i型半導体膜23の着膜
条件を変更する場合がある。例えば、i型半導体膜23
の膜厚分布の均一化を図るため、基板温度250度,C
VD圧力0.3Torrの条件で着膜した場合には、i型
半導体膜23の膜ストレス等の膜質が変化することによ
り、前記ダメ−ジを受けたn型半導体膜22とi型半導
体膜23との密着力がさらに低下し、ド−ム状の気泡の
発生率が高くなり、製造歩留りに与える影響は大きいも
のであった。
When such dome-shaped bubbles are generated,
The bubbles burst during the next step, causing a problem such as film peeling on the i-type semiconductor film 23, making it impossible to form a desired pattern (FIG. 3E). In addition, in order to improve the characteristics of the photodiode, the deposition condition of the i-type semiconductor film 23 may be changed. For example, the i-type semiconductor film 23
Substrate temperature of 250 degrees C
When the film is formed under the condition of VD pressure of 0.3 Torr, the film quality such as film stress of the i-type semiconductor film 23 is changed, and thus the damaged n-type semiconductor film 22 and i-type semiconductor film 23. Further, the adhesion force with and the generation rate of dome-shaped bubbles increased, which had a great influence on the manufacturing yield.

【0008】このようなド−ム状の気泡の発生を回避す
る手法の一つとしては、例えば、P(リン)をド−ピン
グしたn型半導体膜(第2の半導体膜)の着膜前に、連
続的に第一半導体膜と同種のi型半導体膜を着膜する方
法が提案されている(特開平1−11187号公報参
照)。しかしながら上記した方法は、i型半導体膜を第
1の半導体膜とし、その上にP(リン)をド−ピングし
たn型半導体膜(第2の半導体膜)を着膜する場合のも
のであり、前記したようなバファードフッ酸(BHF)
処理等によるn型半導体膜(第1の半導体膜)表面の局
所的なダメ−ジによる気泡の発生を解決するものではな
い。
As one of the methods for avoiding the generation of such dome-shaped bubbles, for example, before deposition of an n-type semiconductor film (second semiconductor film) doped with P (phosphorus) A method for continuously depositing an i-type semiconductor film of the same type as the first semiconductor film has been proposed (see JP-A-11-11187). However, the above-mentioned method is a case where the i-type semiconductor film is used as the first semiconductor film, and the n-type semiconductor film (second semiconductor film) doped with P (phosphorus) is deposited thereon. , Buffed hydrofluoric acid (BHF) as described above
It does not solve the generation of bubbles due to local damage on the surface of the n-type semiconductor film (first semiconductor film) due to treatment or the like.

【0009】本発明は上記実情に鑑みてなされたもの
で、n型半導体膜上にi型半導体膜を積層した薄膜素子
の製造方法において、前記各半導体膜を別々の着膜装置
で着膜する場合に、製造歩留りの向上を図ることができ
る方法を提供することを目的とする。
The present invention has been made in view of the above circumstances, and in the method of manufacturing a thin film element in which an i-type semiconductor film is laminated on an n-type semiconductor film, the respective semiconductor films are formed by different film forming devices. In this case, it is an object to provide a method capable of improving the manufacturing yield.

【0010】[0010]

【課題を解決するための手段】上記問題点を解決するた
め本発明方法は、第1の導電膜と、リンをド−ピングし
た非晶質シリコンからなるn型半導体膜と、非晶質シリ
コンからなるi型半導体膜と、第2の導電膜とを順次形
成する薄膜素子の製造方法において、前記n型半導体膜
を形成した後に、前記i型半導体膜に比べて薄いi型半
導体薄膜から成る界面保護用膜を形成し、次いで真空を
破った後に、界面保護用膜上に前記i型半導体膜を形成
することを特徴とする。
In order to solve the above problems, the method of the present invention comprises a first conductive film, an n-type semiconductor film made of amorphous silicon doped with phosphorus, and amorphous silicon. In a method of manufacturing a thin film element, in which an i-type semiconductor film made of and a second conductive film are sequentially formed, after the n-type semiconductor film is formed, the i-type semiconductor thin film is thinner than the i-type semiconductor film. The interface protection film is formed, then the vacuum is broken, and then the i-type semiconductor film is formed on the interface protection film.

【0011】[0011]

【作用】本発明方法によれば、n型半導体膜の着膜後
に、連続的にi型半導体膜から成る界面保護用膜を着膜
し、その後、n型半導体膜の着膜装置とは別の着膜装置
により界面保護用膜上にi型半導体膜を着膜するので、
着膜装置を変更する場合において自然酸化膜を除去する
等の表面処理を行なっても、前記界面保護用膜の存在に
よりn型半導体膜に損傷を与えることを防止することが
できる。
According to the method of the present invention, after the n-type semiconductor film is deposited, the interface protection film made of the i-type semiconductor film is continuously deposited, and then the n-type semiconductor film deposition device is separately provided. Since the i-type semiconductor film is deposited on the interface protection film by the film deposition device of
Even if a surface treatment such as removal of a natural oxide film is performed when changing the film deposition apparatus, it is possible to prevent the n-type semiconductor film from being damaged by the presence of the interface protection film.

【0012】[0012]

【実施例】以下、本発明の薄膜素子の製造方法の一実施
例として、フォトダイオ−ドを作製する場合の製造工程
について、図1及び図2を参照しながら説明する。ガラ
ス基板10上に膜厚200nmのTi膜をスパッタリン
グ法により着膜し、フォトダイオ−ドの下部電極となる
金属薄膜11を形成する。ガラス基板10を超純水等に
より十分に洗浄した後、後述するフォトダイオ−ドの光
電変換層13bと前記金属薄膜11とがオ−ミック接触
となるように、膜厚0.1μmのP(リン)をド−ピン
グした非晶質Si(シリコン)(n型半導体膜)12を
着膜する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As an embodiment of the method of manufacturing a thin film element of the present invention, a manufacturing process for manufacturing a photodiode will be described below with reference to FIGS. A Ti film having a thickness of 200 nm is deposited on the glass substrate 10 by a sputtering method to form a metal thin film 11 which will be a lower electrode of the photodiode. After the glass substrate 10 is thoroughly washed with ultrapure water or the like, a P (thickness of 0.1 μm is formed so that the photoelectric conversion layer 13b of the photodiode described later and the metal thin film 11 are in ohmic contact with each other. Amorphous Si (silicon) (n-type semiconductor film) 12 doped with phosphorus is deposited.

【0013】ここで、前記n型半導体膜12の着膜は、
例えば平行平板型のプラズマCVDを用いて以下のよう
にして行なう。すなわち、前記金属薄膜11が着膜され
たガラス基板10をプラズマの対向電極の接地電極側に
設置し、10-2Pa程度まで真空排気した後、基板温度
がおよそ250℃になるまで加熱する。その後、1%P
3/SiH4ガスを流量1000SCCMに制御しなが
らプラズマの対向電極のRF電極側に設けられたシャワ
−プレ−ト(ガス導入孔)よりチャンバ−内に導入し、
39.9Paとなるようにコンタクタンスバルブにより
自動調整しながら十分に温度安定させる。十分な温度安
定及びガス安定後に、RF電極に13.56MHzで1
00WのRFパワ−を印加し、平行平板電極にプラズマ
を発生させ、前記金属薄膜11上にn型半導体膜12を
着膜する(図1(a))。
Here, the deposition of the n-type semiconductor film 12 is
For example, parallel plate type plasma CVD is used as follows. That is, the glass substrate 10 on which the metal thin film 11 is deposited is placed on the ground electrode side of the counter electrode of plasma, evacuated to about 10 −2 Pa, and then heated to a substrate temperature of about 250 ° C. After that, 1% P
The H 3 / SiH 4 gas was introduced into the chamber through a shower plate (gas introduction hole) provided on the RF electrode side of the counter electrode of the plasma while controlling the flow rate at 1000 SCCM.
Sufficiently stabilize the temperature while automatically adjusting the contactance valve to 39.9 Pa. After sufficient temperature and gas stabilization, the RF electrode is set to 1 at 13.56MHz.
RF power of 00 W is applied to generate plasma on the parallel plate electrodes, and the n-type semiconductor film 12 is deposited on the metal thin film 11 (FIG. 1A).

【0014】次に、プラズマCVD装置の真空を破るこ
となく、後述するフォトダイオ−ドの光電変換層13b
と同じ部材であるノンド−プの非晶質Si(シリコン)
(i型半導体膜)で形成される界面保護用膜13aを、
膜厚が12nmとなるように連続的に着膜する。すなわ
ち、100%SiH4ガスを流量1000SCCMに制
御しながらチャンバ−内に導入し、39.9Paとなる
ようにコンダクタンスバルブにより自動調整しながらガ
ス安定させる。その後、RF電極に13.56MHz,
100WのRFパワ−で前記n型半導体膜12上にi型
半導体膜の界面保護用膜13aを着膜する。その後、反
応室から取出室にガラス基板10を移動させ、取出室内
にN2を導入し大気圧とし、CVD装置よりガラス基板
10を取り出す(図1(b))。
Next, the photoelectric conversion layer 13b of the photo diode described later is not broken without breaking the vacuum of the plasma CVD apparatus.
Non-doped amorphous Si (silicon) which is the same member as
The interface protection film 13a formed of (i-type semiconductor film)
The film is continuously deposited so that the film thickness is 12 nm. That is, 100% SiH 4 gas is introduced into the chamber while controlling the flow rate to 1000 SCCM, and the gas is stabilized by automatically adjusting the conductance valve to 39.9 Pa. Then, 13.56MHz on the RF electrode,
An i-type semiconductor film interface protection film 13a is deposited on the n-type semiconductor film 12 with an RF power of 100 W. After that, the glass substrate 10 is moved from the reaction chamber to the extraction chamber, N 2 is introduced into the extraction chamber to bring it to atmospheric pressure, and the glass substrate 10 is taken out from the CVD device (FIG. 1B).

【0015】次に、大気中に取り出すことにより界面保
護用膜13aの表面に形成された自然酸化膜を除去する
ために、フッ酸(HF)とフッ酸アンモニウム(NH4
F)が容量比で1:200のバッファ−ドフッ酸(BH
F)を用い、1分〜1分30秒程度ガラス基板10上の
界面保護用膜13aの表面をライトエッチする(図1
(c))。
Next, in order to remove the natural oxide film formed on the surface of the interface protection film 13a by taking it out into the atmosphere, hydrofluoric acid (HF) and ammonium hydrofluorate (NH 4 ) are used.
F) has a volume ratio of 1: 200 buffered hydrofluoric acid (BH
F) is used to perform light etching on the surface of the interface protection film 13a on the glass substrate 10 for about 1 minute to 1 minute 30 seconds (FIG. 1).
(C)).

【0016】次に、大気中に触れないようにN2雰囲気
をガラス基板10を保持したまま、プラズマCVD装置
に仕込み、プラズマの対向電極の接地電極側にガラス基
板10を固定し、10-2Pa程度まで真空排気しながら
基板温度がおよそ200℃になるまで加熱する。着膜は
例えば以下のようにして行なう。100%SiH4ガス
を流量1000SCCMに制御しながらチャンバ−内に
導入し、66.5Paとなるようにコンダクタンスバル
ブにより自動調整しながら十分に温度安定及びガス安定
させる。十分安定させた後に、RF電極に13.56M
Hzで150WのRFパワ−を印加し、平行平板電極に
プラズマを発生させ、前記界面保護用膜13a上にフォ
トダイオ−ドの光電変換層となる膜厚1.3μmのi型
の非晶質Si(シリコン)(i型半導体膜)13bを着
膜する。その後、反応室から取出室にガラス基板10を
移動させ、取出室内にN2を導入し大気圧とし、CVD
装置よりガラス基板10を取り出す(図1(d))。次
に、i型半導体膜13b上に、膜厚60nmのITO膜
をスパッタリング法により着膜して、フォトダイオ−ド
の上部電極となる透明電導膜14を形成する(図1
(e))。
Next, while keeping the glass substrate 10 in an N 2 atmosphere so as not to come into contact with the atmosphere, the glass substrate 10 is charged into the plasma CVD apparatus, and the glass substrate 10 is fixed to the ground electrode side of the counter electrode of plasma, and 10 −2 is set. The substrate is heated to a temperature of about 200 ° C. while being evacuated to about Pa. The film deposition is performed as follows, for example. 100% SiH 4 gas is introduced into the chamber while controlling the flow rate to 1000 SCCM, and the temperature and gas are sufficiently stabilized by automatically adjusting the conductance valve to 66.5 Pa. After stabilizing sufficiently, 13.56M on the RF electrode
RF power of 150 W at Hz is applied to generate plasma in the parallel plate electrodes, and an i-type amorphous film having a thickness of 1.3 μm to be a photoelectric conversion layer of a photodiode is formed on the interface protection film 13a. A Si (silicon) (i-type semiconductor film) 13b is deposited. After that, the glass substrate 10 is moved from the reaction chamber to the extraction chamber, N 2 is introduced into the extraction chamber to bring it to atmospheric pressure, and CVD is performed.
The glass substrate 10 is taken out from the device (FIG. 1 (d)). Next, an ITO film having a thickness of 60 nm is deposited on the i-type semiconductor film 13b by a sputtering method to form a transparent conductive film 14 which will be an upper electrode of the photodiode (FIG. 1).
(E)).

【0017】上記工程によりガラス基板10上に金属薄
膜11,n型半導体膜12,界面保護用膜13a,i型
半導体膜13b,透明電導膜14を順次形成した積層膜
上に、所望のレジストパタ−ン15を形成し(図2
(a))、前記透明電導膜14を純水により1:7に希
釈した塩酸(HCl)を用いてエッチングする(図2
(b))。更に界面保護用膜13a、i型半導体膜13
b、n型半導体膜12の3層を一度にSF6、C2HCl
23、O2 のガスを用いてドライエッチングする(図2
(c))。その後、前記レジストパタ−ン15をO2
ラズマアッシング及びレジスト剥離液を用いて剥離し、
所望の島状のフォトダイオ−ド形状を得る(図2
(d))。
A desired resist pattern is formed on the laminated film in which the metal thin film 11, the n-type semiconductor film 12, the interface protection film 13a, the i-type semiconductor film 13b, and the transparent conductive film 14 are sequentially formed on the glass substrate 10 by the above steps. 15 to form (Fig. 2
(A)), the transparent conductive film 14 is etched using hydrochloric acid (HCl) diluted 1: 7 with pure water (FIG. 2).
(B)). Further, the interface protection film 13a and the i-type semiconductor film 13
The three layers of the b and n-type semiconductor films 12 are simultaneously formed into SF 6 , C 2 HCl.
Dry etching is performed using 2 F 3 and O 2 gas (see FIG. 2).
(C)). Then, the resist pattern 15 is stripped using O 2 plasma ashing and a resist stripping solution,
A desired island-shaped photo diode shape is obtained (FIG. 2).
(D)).

【0018】最後に、フォトダイオ−ドの下部電極とな
る金属薄膜11のパタ−ン形成のためのフォトレジスト
パタ−ンを新たに形成し、金属薄膜11をエッチングす
ることにより、フォトダイオ−ドが完成する。
Finally, a photoresist pattern for forming a pattern of the metal thin film 11 which will be the lower electrode of the photo diode is newly formed and the metal thin film 11 is etched to form a photo diode. Is completed.

【0019】本実施例では、i型半導体薄膜で構成され
る界面保護膜13aの膜厚を12nmとしたが、n型半
導体膜12がバッファ−ドフッ酸(BHF)による局所
的なダメ−ジを回避するに十分な膜厚であればよい。ま
た、i型半導体膜13bは、照射光によりキャリアを発
生させるためのものであり、本実施例においては膜厚を
1.3μmとした。また、この膜厚は、分光感度特性を
考慮した場合、500nm以上であることが望ましい。
すなわち、i型半導体膜13bの膜厚は、図3の従来例
におけるi型半導体膜23の膜厚に相当するものであ
り、従って、i型半導体層としては界面保護用膜13a
のi型半導体薄膜分だけ厚くなる。
In this embodiment, the thickness of the interface protective film 13a composed of the i-type semiconductor thin film is set to 12 nm, but the n-type semiconductor film 12 causes local damage due to buffered hydrofluoric acid (BHF). The film thickness may be enough to avoid it. The i-type semiconductor film 13b is for generating carriers by irradiation light, and has a film thickness of 1.3 μm in this embodiment. Further, this film thickness is preferably 500 nm or more in consideration of the spectral sensitivity characteristic.
That is, the film thickness of the i-type semiconductor film 13b corresponds to the film thickness of the i-type semiconductor film 23 in the conventional example of FIG. 3, and therefore, as the i-type semiconductor layer, the interface protection film 13a.
The i-type semiconductor thin film becomes thicker.

【0020】また、上記製造方法によれば、界面保護用
膜(i型半導体薄膜)13aはn型半導体膜12と同一
の着膜装置で着膜されるので、界面保護用膜13aがP
(リン)により汚染される可能性があるが、界面保護用
膜13aの膜厚は12nmと薄膜であり、フォトダイオ
ードの光電変換層はi型半導体膜13bで形成されるの
で、フォトダイオードの特性に悪影響を与えることはな
い。
Further, according to the above manufacturing method, since the interface protection film (i-type semiconductor thin film) 13a is deposited by the same film deposition apparatus as the n-type semiconductor film 12, the interface protection film 13a is formed by P
Although it may be contaminated by (phosphorus), the film thickness of the interface protection film 13a is as thin as 12 nm, and the photoelectric conversion layer of the photodiode is formed of the i-type semiconductor film 13b. Will not be adversely affected.

【0021】[0021]

【発明の効果】本発明によれば、n型半導体膜の着膜後
に、連続的にi型半導体膜から成る界面保護用膜を着膜
し、その後、n型半導体膜の着膜装置とは別の着膜装置
により界面保護用膜上にi型半導体膜を着膜するので、
着膜装置を変更する場合において自然酸化膜を除去する
等の表面処理を行なっても、前記界面保護用膜の存在に
よりn型半導体膜に損傷を与えることを防止することが
できる。従って、従来方法のように、n型半導体膜とi
型半導体膜との間にド−ム状の気泡が生じることを防
ぎ、薄膜素子の製造において歩留の向上を図ることがで
きる。
According to the present invention, after depositing an n-type semiconductor film, an interface protection film made of an i-type semiconductor film is continuously deposited, and thereafter, an n-type semiconductor film deposition apparatus is provided. Since the i-type semiconductor film is deposited on the interface protection film by another film deposition device,
Even if a surface treatment such as removal of a natural oxide film is performed when changing the film deposition apparatus, it is possible to prevent the n-type semiconductor film from being damaged by the presence of the interface protection film. Therefore, the n-type semiconductor film and i
It is possible to prevent the formation of dome-shaped bubbles between the semiconductor film and the semiconductor layer, and to improve the yield in the production of thin film elements.

【図面の簡単な説明】[Brief description of drawings]

【図1】 (a)ないし(e)は、本発明方法による薄
膜素子の作製工程の一部を示す断面説明図である。
1 (a) to 1 (e) are cross-sectional explanatory views showing a part of a manufacturing process of a thin film element by the method of the present invention.

【図2】 (a)ないし(d)は、本発明方法による薄
膜素子の作製工程の一部を示す断面説明図である。
2 (a) to 2 (d) are cross-sectional explanatory views showing a part of a manufacturing process of a thin film element by the method of the present invention.

【図3】 (a)ないし(e)は、従来の薄膜素子の作
製工程の一部を示す断面説明図である。
3 (a) to 3 (e) are cross-sectional explanatory views showing a part of a conventional manufacturing process of a thin film element.

【符号の説明】[Explanation of symbols]

10…ガラス基板、 11…金属薄膜(第1の導電
膜)、 12…n型半導体膜、 13a…界面保護用
膜、 13b…i型半導体膜、 14…透明電導膜(第
2の導電膜)、 15…レジストパタ−ン
Reference numeral 10 ... Glass substrate, 11 ... Metal thin film (first conductive film), 12 ... N-type semiconductor film, 13a ... Interface protection film, 13b ... i-type semiconductor film, 14 ... Transparent conductive film (second conductive film) , 15 ... Resist pattern

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 第1の導電膜と、リンをド−ピングした
非晶質シリコンからなるn型半導体膜と、非晶質シリコ
ンからなるi型半導体膜と、第2の導電膜とを順次形成
する薄膜素子の製造方法において、 前記n型半導体膜を形成した後に、前記i型半導体膜に
比べて薄いi型半導体膜から成る界面保護用膜を形成
し、 次いで真空を破った後に、界面半導体膜上に前記i型半
導体膜を形成することを特徴とする薄膜素子の製造方
法。
1. A first conductive film, an n-type semiconductor film made of amorphous silicon doped with phosphorus, an i-type semiconductor film made of amorphous silicon, and a second conductive film are sequentially formed. In the method of manufacturing a thin film element to be formed, after forming the n-type semiconductor film, an interface protection film made of an i-type semiconductor film thinner than the i-type semiconductor film is formed, and then, after breaking the vacuum, the interface is formed. A method of manufacturing a thin film element, comprising forming the i-type semiconductor film on a semiconductor film.
JP6278622A 1994-10-19 1994-10-19 Manufacture of thin-film element Pending JPH08125214A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6278622A JPH08125214A (en) 1994-10-19 1994-10-19 Manufacture of thin-film element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6278622A JPH08125214A (en) 1994-10-19 1994-10-19 Manufacture of thin-film element

Publications (1)

Publication Number Publication Date
JPH08125214A true JPH08125214A (en) 1996-05-17

Family

ID=17599850

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6278622A Pending JPH08125214A (en) 1994-10-19 1994-10-19 Manufacture of thin-film element

Country Status (1)

Country Link
JP (1) JPH08125214A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140154833A1 (en) * 2012-12-03 2014-06-05 Canon Kabushiki Kaisha Manufacturing method for detection apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140154833A1 (en) * 2012-12-03 2014-06-05 Canon Kabushiki Kaisha Manufacturing method for detection apparatus

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