JPH08115136A - Current source circuit and voltage source circuit - Google Patents

Abstract

PURPOSE: To enlarge output resistance without narrowing down the range of an output voltage and complicating the circuit concerning the current source circuit to be used for a semiconductor integrated circuit. CONSTITUTION: Concerning the current source circuit serially connecting field effect transistors(FET) A and B of the same polarity, the gates of two FET are commonly connected, the source of the FET B is connected to a power source, and the source of the FET A and the drain of the FET B are connected. Then, the FET A is operated in a saturated area with the drain of the FET A as its output, the characteristics of the FET A and B are decided so that the FET B can be operated at an operating point near the saturated area of a linear area, and a current control signal is impressed to the gates of two commonly connected FET.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current source circuit and a voltage source circuit used in a semiconductor integrated circuit,
In particular, it is composed of a field effect transistor such as a MOS transistor.

With the improvement of MOS integrated circuit technology, analog MOS integrated circuits have been put into practical use, but analog circuits are difficult to integrate. Therefore, it is desired to develop analog circuits that are easy to integrate with MOS transistors.

Current sources are often used in analog circuits,
The characteristics of the current source greatly affect the performance of the analog circuit.
The current source used in the analog circuit has a large output resistance,
That is, it is necessary to prevent the output current from being influenced by the load fluctuation, and a current source circuit or a voltage source circuit that satisfies such conditions is required.

[0004]

2. Description of the Related Art FIG. 7 is an explanatory diagram 1 of a conventional technique. In FIGS. 7A and 7C, 100 is a field effect transistor, which is an N-channel MOS transistor.

S is a source, D is a drain, and G is a gate. FIG. 7A is an example of the simplest current source circuit. When the field effect transistor 100 is used as a current source circuit, a power source is connected to the source to operate in the saturation region. A current control signal is applied to the gate.

FIG. 7 (b) shows the relationship between the output voltage and the output current of the field effect transistor 100 of FIG. 5 (A). When the threshold voltage of the gate of the field effect transistor is Vth and the current control signal voltage (current control signal input), that is, the gate-source potential is Vth + ΔV, the range of the output voltage that can be used as the output current is V> (Vth + ΔV From -Vth = ΔV, V> ΔV (ΔV is the voltage value in the saturation region set to obtain the required output).

Further, for example, assuming that ΔV is the lowest voltage in the saturation region, even in the saturation region where V> ΔV, the output current increases as the output voltage increases due to the channel length modulation effect of the field effect transistor 100. The output resistance at that time is represented by Rds. Rds = dV / dI. When using a transistor as a current source circuit, this output resistance Rds needs to be as large as possible.

As a method of increasing the output resistance, there is a method of adding a resistance R between the source of the field effect transistor and the power supply as shown in FIG. 7 (c). At that time, assuming that the mutual contact of the transistors is gm and the resistance value of the added resistance is R, the output resistance is approximately Rds (1
+ GmR). Since gm is about several hundred μS (microsiemens), a resistance of several tens of kΩ or more is required to increase the output resistance of FIG. 7 (c). By the way, it is also possible to use a MOS transistor operating in the saturation region as the resistor.

FIG. 8 is an explanatory diagram 2 of the conventional technique. FIG.
(a) shows a circuit configuration when a MOS transistor operating in a saturation region is used as a resistance for increasing the output resistance. FIG. 8B shows a case where a current mirror circuit is configured using the circuit of FIG. 8A. FIG. 8 (c) is FIG.
An example of a circuit obtained by improving the circuit of (b) is shown.

In FIG. 8 (a), 110 and 111 are MO
It is an S transistor. The current control signal input 1 is applied to the gate of the MOS transistor 110, and the current control signal input 2 is applied to the gate of the MOS transistor 111.

The output resistance of the MOS transistor 111 is set to R
If ds, the output resistance of the circuit is Rds (1 + gmR
ds). Therefore, comparing with the circuit in Fig. 7 (a),
In the circuit of FIG. 8A, the output resistance is (1 + gmRds) times.

FIG. 8B shows an example in which the circuit of FIG. 8A is used to form a current mirror circuit. In FIG. 8B, 115 and 116 are MOS transistors.

Reference numerals 117 and 118 denote MOS transistors. 120 is a series circuit X, which is a series circuit of a MOS transistor 115 and a MOS transistor 116.

Reference numeral 121 is a series circuit Y, which is a series circuit of a MOS transistor 117 and a MOS transistor 118. Reference numeral 119 represents a current source (another current source circuit).

In FIG. 8B, the MOS transistor 1
The current control signal voltage applied to the gate of 16 is Vth + Δ
V. Therefore, the current control signal voltage applied to the gate of the MOS transistor 115 is 2 (Vth + ΔV). Therefore, since the voltage applied to the gate of the MOS transistor 117 is 2 (Vth + ΔV), the voltage range that can be used as the output is V> 2 (Vth + ΔV) −Vth = Vth + 2ΔV Therefore, V> Vth + 2ΔV, and FIG. ) Smaller than the voltage range.

FIG. 8C shows a modification of this point.
In FIG. 8C, 135 and 136 are MOS transistors.

Reference numerals 137 and 138 are MOS transistors. 139 and 140 are MOS transistors. 14
Reference numeral 1 is a series circuit X, which is a series circuit of a MOS transistor 135 and a MOS transistor 136.

Reference numeral 142 is a series circuit Y, which is a series circuit of a MOS transistor 137 and a MOS transistor 138. 143 is a series circuit Z, which is a series circuit of a MOS transistor 139 and a MOS transistor 140.

Reference numeral 145 represents a current source. In the configuration of FIG. 8C, the series circuit X (141) and the series circuit Y (142)
Is the same as in FIG. 8B and constitutes a current mirror circuit.

Similar to FIG. 8B, the MOS transistor 1
The current control signal voltage applied to the gate of 36 is Vth + Δ
V. The current control signal voltage applied to the gate of the MOS transistor 135 is 2 (Vth + ΔV). Therefore, the voltage applied to the gate of the MOS transistor 139 is about Vth + 2ΔV, and the voltage range that can be used as the output is V> 2ΔV.

FIG. 9 shows the structure of an integrated circuit of a conventional current source circuit (FIG. 8 (b)). In FIG. 9, a MOS transistor 115 has a drain region and a source region, and has a gate via an insulating film (not shown).

A MOS transistor 116 has a drain region and a source region, and has a gate via an insulating film (not shown). A MOS transistor 117 has a drain region and a source region,
It has a gate through an insulating film (not shown).

Reference numeral 118 denotes a MOS transistor which has a drain region and a source region and has a gate via an insulating film (not shown). 120 is a series circuit X
And is a series circuit of the MOS transistor 115 and the MOS transistor 116.

Reference numeral 121 is a series circuit Y, which is a series circuit of a MOS transistor 117 and a MOS transistor 118. Reference numeral 119 is a current source, which is actually a circuit of another current source, but is omitted in the figure.

Further, although there is a wiring layer for connecting each region of each field effect transistor, the wiring is shown by a solid line connecting the regions in the figure. A wiring for connecting the gate and the drain region of the MOS transistor 116, a wiring for connecting the gate of the MOS transistor 116 and the gate of the MOS transistor 118, a wiring for connecting the gate and the drain region of the MOS transistor 115, a gate of the MOS transistor 115 and the MOS transistor A wiring connecting the gate of 117, a wiring connecting the current source 119 and the drain region of the MOS transistor, a wiring connecting the drain region of the MOS transistor 117 and the output, etc. are required respectively.

[0026]

The current source circuit of the circuit of FIG. 8 (c) has a large output resistance and a wide output voltage range. However, since a plurality of current control signals are required, The circuit to generate becomes complicated. The current mirror circuit itself is complicated and the wiring of the integrated circuit is complicated, which makes the design of the integrated circuit difficult. The configuration of the conventional circuit other than that shown in FIG. 8 (c) is relatively simple, but has a drawback that the voltage range that can be taken out as an output is narrow.

An object of the present invention is to provide a current source circuit or a voltage source circuit having a large output resistance without narrowing the output voltage range and complicating the circuit.

[0028]

According to the present invention, field effect transistors A and B having the same polarity are used.
In the current source circuit in which the two field effect transistors A and B are connected in common, the source of the field effect transistor B is connected to the power source, and the source of the field effect transistor A and the field effect transistor B are connected. The characteristics of the field transistor A and the field transistor B are determined so that the drain is connected, the field effect transistor A operates in a saturation region, and the field effect transistor B operates at an operating point close to a saturation region in a linear region. The drain of the field effect transistor A is used as an output, and the current control signal is applied to the gates of the two field effect transistors A and B connected in common.

FIG. 1 shows the basic configuration of the present invention. In FIG. 1, 1 is a field effect transistor A, Sa is a source, Da is a drain, and Ga is a gate.

Reference numeral 2 is a field effect transistor B, and S
b is a source, Db is a drain, and Gb is a gate. Three
Is a current control signal input for inputting a current control voltage.

Reference numeral 4 denotes an output, which outputs a voltage or a current. The source Sb of the field effect transistor B (2) is connected to the power supply. Field effect transistor A (1)
Source Sa and the drain Db of the field effect transistor B (2) are connected. The gate Ga of the field effect transistor A (1) and the gate Gb of the field effect transistor B (2) are connected and a common current control signal is input. The drain of the field effect transistor A (1) is used as an output.

The present invention can be applied to both N-channel field effect transistors and P-channel field effect transistors. In the circuit of FIG. 1, when the N-channel field effect transistor is used, the power source is a reference potential (ground potential), and when the P-channel field effect transistor is used, the power source is a positive power source voltage.

[0033]

In the configuration of FIG. 1, the field effect transistor A
(1) operates in the saturation region, and field effect transistor B (2)
Defines the characteristics of the field effect transistors A and B so that they operate in a linear region close to the saturation region. For example,
The driving force of the field effect transistor B (2) is made smaller than that of the field effect transistor A (1) (the size of the gate region of the field effect transistor B (2) (the ratio of the channel width W to the channel length W / L ) Is a field effect transistor A (1)
Smaller than the size of the gate area). By doing so, a circuit satisfying the above conditions can be obtained. Also, the resistance of the field effect transistor B (2) is the resistance obtained by the operation in the linear region close to the saturation region,
The output resistance Rsd is large, and the output resistance can be increased when the circuit of FIG. 1 is used as a current source circuit.

The applied voltage of the current control signal input is Vth + Δ
It is about V. At this time, the field effect transistor A (1)
Since the gate voltage of is also about Vth + ΔV, the voltage range that can be taken out as an output is V> ΔV. Therefore, according to the circuit configuration of FIG. 1, a current source circuit and a voltage source circuit having a wide output voltage range can be obtained with a large output resistance.

[0035]

EXAMPLE 1 FIG. 2 shows Example 1 of the present invention. In FIG. 2, 11 is a field effect transistor A, Sa is a source, Da is a drain, and Ga is a gate.

Reference numeral 2 is a field effect transistor B, and S
b is a source, Db is a drain, and Gb is a gate. Three
Is a current control signal input for inputting a current control voltage.

14 is the output 1. 15 is an output 2. 16 is a current source.

Drain D of field effect transistor A (11)
a and the gate Ga are connected. Field effect transistor B
The source Sb of (2) is connected to the power supply. Source Sa of field effect transistor A (1) and field effect transistor B (12)
The drain Db of is connected. Field effect transistor A
The gate Ga of (1) and the gate Gb of the field effect transistor B (12) are connected to be a common current control signal input.

The driving force of the field effect transistor B (12) is made smaller than that of the field effect transistor A (11). In this way, the field effect transistor A (11) operates in the saturation region and the field effect transistor B (12) operates in the linear region close to the saturation region.

The output voltage of the output 1 is Vth + ΔV.
Since the output 2 is somewhat lower than the voltage obtained by subtracting Vth from the voltage of the drain Da, the voltage of the output 2 is slightly less than ΔV. It is possible to obtain the output from the output 1 or the output 2 or both of them.

FIG. 3 shows a second embodiment of the present invention. A current mirror circuit that uses the current source 26 as a reference current is configured by the series circuit X (30) (the circuit of the first embodiment shown in FIG. 2) and the series circuit Y (31) (the circuit shown in FIG. 1). ) Is to take the output from.

In the series circuit X (30), 21 is a field effect transistor A, Sa is a source, Da is a drain, and Ga is a gate.

22 is a field effect transistor B,
Sb is a source, Db is a drain, and Gb is a gate.
The drain Da and the gate G of the field effect transistor A (21)
Connect a. Source S of field effect transistor B (22)
a is connected to a power source. The source Sa of the field effect transistor A (21) and the drain Db of the field effect transistor B (22)
Connect. Gate Ga of field effect transistor A (21)
Is connected to the gate Gb of the field effect transistor B (22),
Input a common current control signal.

The driving force of the field effect transistor B (22) is made smaller than that of the field effect transistor A (21). In this way, the field effect transistor A (11) operates in the saturation region and the field effect transistor B (12) operates in the linear region close to the saturation region.

The drain voltage of the field effect transistor A (21) is Vth + ΔV, and the gate G of the series circuit Y (31) is
It is input to the series circuit Y (31) as a current control signal voltage of c and the gate Gd.

In the series circuit Y (31), 23 is a field effect transistor C, Sc is a source, Dc is a drain, and Gc is a gate.

24 is a field effect transistor D,
Sd is a source, Dd is a drain, and Gd is a gate.
27 is an output which outputs a voltage or a current.

Source Sd of field effect transistor D (24)
Connect to the power supply. The source Sc of the field effect transistor C (23) and the drain Dd of the field effect transistor D (24) are connected. The gate Gc of the field effect transistor C (23) and the gate Gd of the field effect transistor D (24) are connected and a common current control signal is input.

The field effect transistor C (23) operates in the saturation region, and the field effect transistor D (24) operates in the linear region close to the saturation region. Therefore, the driving force of the field effect transistor D (24) is
It should be smaller than the driving force of 3). In this way, the field effect transistor D (24) operates in the saturation region close to the linear region, so that the output resistance Rsd is large and the output resistance when used as a current source circuit can be increased.

In the configuration of FIG. 3, the current control signal voltage applied to the gate Gc is Vth + ΔV, so the output voltage of the series circuit Y (31) is V> (Vth + ΔV) -Vt.
Since h = ΔV, V> ΔV. In addition, the field effect transistor D (2
By making the ratio K of the driving force of 4) and the ratio of the driving force of the field effect transistor C (23) to the field effect transistor A (21) equal, a current that can be taken out from the output 27 is generated by the current source 26.
Can be K times.

FIG. 4 shows the relationship between the reference current and the output voltage of the circuit of the present invention and the conventional circuit obtained by circuit simulation. The horizontal axis is the reference current. The vertical axis is the output voltage.

(A) The circuit of the present invention, (B),
(C) is a conventional circuit. (A) -1 in the graph
Is the output of the output terminal 1 of the circuit (A), and (A) -2 is the output of the output terminal 2 of the circuit (A). (B) -1 is the output of the output terminal 1 of the circuit (B). (C) -1 is the output of the output terminal 1 of the circuit (C), and (C) -2 is the output of the output terminal 2 of the circuit (C).

The output from the output terminal 2 of the circuit (A) of the present invention has a low output voltage and a large output resistance. Therefore, a stable output can be obtained for a wide range of voltages.
The output from the output terminal 1 of the circuit (A) of the present invention is
The output voltage is lower than the output from the output terminal 1 of the conventional circuit (C). Therefore, the output voltage can be used in a wider range of voltage as compared with the conventional circuit (C).

FIG. 5 shows the relationship between the output voltage and the output current of the circuit of the present invention and the conventional circuit obtained by simulation. The horizontal axis is the output voltage and the vertical axis is the output current.

(A) The circuit of the present invention, (B),
(C) is a conventional circuit. The circuit (A) of the present invention has a higher output resistance than the conventional circuit (B) and can keep the output current constant in a wide output voltage range. Further, the circuit (A) of the present invention has a lower voltage in the saturation region than the conventional circuit (C). Therefore, the circuit (A) of the present invention has a wider usable voltage range than the conventional circuit (C).

FIG. 6 shows the structure of an integrated circuit according to the second embodiment of the present invention. 30 is a series circuit X. Series circuit X (30)
21 is a field effect transistor A, and 22
Is a field effect transistor B.

Reference numeral 31 is a series circuit Y. Series circuit Y (3
In 1), 23 is a field effect transistor C,
24 is a field effect transistor D.

Reference numeral 26 denotes a current source, which is another current source circuit, but the device configuration is omitted in the figure. In an actual integrated circuit, there is a wiring layer, but in the figure only solid lines and connections are shown.

As compared with the configuration of the conventional integrated circuit device of the circuit shown in FIG. 9, the integrated circuit configuration of the circuit of the present invention simplifies wiring and facilitates integration.

[0060]

According to the present invention, in the current source circuit using the field effect transistor, the output resistance can be increased without narrowing the output voltage range, and the current source circuit capable of obtaining a stable output is constructed. can do.
Moreover, since the circuit configuration is simple, the circuit can be easily integrated, and the burden of designing the integrated circuit can be reduced.

[Brief description of drawings]

FIG. 1 is a diagram showing a basic configuration of the present invention.

FIG. 2 is a diagram showing a first embodiment of the present invention.

FIG. 3 is a diagram showing a second embodiment of the present invention.

FIG. 4 is a diagram showing a relationship between a reference current and an output voltage.

FIG. 5 is a diagram showing a relationship between an output voltage and an output current.

FIG. 6 is a diagram showing a configuration of an integrated circuit according to a second embodiment of the present invention.

FIG. 7 is a diagram showing an explanatory diagram 1 of a conventional technique.

FIG. 8 is a diagram showing an explanatory diagram 2 of a conventional technique.

9 is a diagram showing a configuration of an integrated circuit of the current source circuit of FIG. 8 (c).

[Explanation of symbols] 1: Field effect transistor A 2: Voltage effect transistor B 3: Current control signal input 4: Output

Claims (3)

[Claims] 1. In a current source circuit in which field effect transistors A and B having the same polarity are connected in series, the gates of the two field effect transistors are commonly connected, and the source of the field effect transistor B is a power supply. , The source of the field effect transistor A is connected to the drain of the field effect transistor B, the drain of the field effect transistor A is used as an output, the field effect transistor A operates in a saturation region, and the field effect transistor B is linearly connected. The characteristics of the electric field transistor A and the electric field transistor B are determined so that the electric field transistor A and the electric field transistor B are operated at an operating point close to a saturation region of the region, and a current control signal is applied to the gates of the two field effect transistors connected in common. And current source circuit. 2. A voltage source circuit comprising a current source in which a field effect transistor A and a field effect transistor B having the same polarity are connected in series, wherein the gates of the two field effect transistors are connected in common, The source of B is connected to the power supply, the source of field effect transistor A and the drain of field effect transistor B are connected,
A current source is connected to the drain of the field effect transistor A, the common gate is connected to the drain of the field effect transistor A, and either or both of the drain of the field effect transistor A and the drain of the field effect transistor B are connected. A voltage source circuit characterized by being an output. 3. A series circuit X of a field effect transistor A and a field effect transistor B having the same polarity, and a series circuit Y of a field effect transistor C and a field effect transistor D having the same polarity. , Y are connected as a current mirror circuit, the series circuit X includes two field effect transistors A and B.
, The source of the field effect transistor B is connected to the power source, the source of the field effect transistor A and the drain of the field effect transistor B are connected, and the common gate is connected to the drain of the field effect transistor A. Connected, the drain of the field effect transistor A is connected to the gate of the series circuit Y, the field effect transistor A operates in the saturation region, and the field effect transistor B operates at an operating point close to the saturation region of the linear region. The characteristics of the electric field transistor A and the electric field transistor B are determined as described above, the series circuit Y connects the gates of the two field effect transistors C and D in common, and the source of the field effect transistor D is connected to the power source. , The source of the field effect transistor C and the drain of the field effect transistor D are connected, C operates in the saturation region, the electric field transistor C as the field effect transistor D is operated at an operating point close to the saturation region in the linear region, it defines the characteristics of the field transistor D, the field effect transistor current source A
A current source circuit, characterized in that it is connected to the drain of the field effect transistor C and outputs the drain of the field effect transistor C.