JPH08107700A - Output voltage detector for inverter - Google Patents

Abstract

PURPOSE: To provide an output voltage detector for an inverter capable of detecting with a high accuracy the fundamental wave of an output voltage of the inverter containing many harmonics. CONSTITUTION: An inverter 21 converts a DC supply voltage to a three-phase AC voltage in accordance with the control command from a control circuit 30 and outputs it from output terminals 24a to 24c. Output voltage of an inverter 21 is detected by detecting capacitors 26a to 26c and input to insulation amplifiers 27a ... PWM-modulated wave taken out through an insulation amplifier 27a is sent to the control circuit 30 after removing its noise by a filter. The control circuit 30 performs sample holding at each neutral point in ON-OFF section of PWM pulses by S/H circuit 31 and inputs it to A/D converter 32. Output of this A/D converter 32 comes to a ripple compensation circuit 33 where the ripple is removed and then the phase delay is corrected by a delay compensating circuit 34, and then the output is sent to a voltage detecting circuit 35 and the voltage is detected.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter output voltage detecting device for detecting an output voltage due to switching of an inverter.

[0002]

2. Description of the Related Art Conventionally, as a means for controlling the rotation of an induction motor, there is a method of controlling a drive voltage by using an inverter. In this case, in order to control the induction motor, it is necessary to detect the output voltage of the inverter. Conventionally, the inverter output voltage detection device shown in FIG. 6 has been considered.

In FIG. 6, reference numeral 1 is an inverter, which supplies a DC voltage Vdc supplied between input terminals a and b to three phases (R, S,
It is converted into an AC voltage of T) and supplied to the induction motor 2. A capacitor C is provided between the input terminals a and b of the inverter 1.
1 is connected. In addition, the input terminals a and 3 of the inverter 1
Photodiodes 3 forming photocouplers 3, 4, and 5 are provided between the output lines of the phases (R, S, T), respectively.
A series circuit of a, 4a, 5a and resistors R1, R2, R3 is connected.

The DC voltage Vdc on the input side of the inverter 1 is picked up by the isolation amplifier 6 and input to one input end of the buffer 7. Although the DC voltage Vdc1 is taken out from the buffer 7, a part of the DC voltage Vdc1 is fed back to the other input terminal of the buffer 7. In this case, the DC voltage Vdc1 output from the buffer 7 is set to about 1V with respect to the DC voltage 100V of the inverter 1, for example. Also,
Between the output end of the buffer 7 and the ground, there are resistors R4, R5, R
A series circuit of 6 and the phototransistors 3b, 4b, 5b constituting the photocouplers 3, 4, 5 is provided.
The resistors R4, R5, R6 and the phototransistor 3b,
The voltages VRO, VSO, and VTO generated between 4b and 5b are taken out by the buffers 11, 12, and 13, respectively, and the resistance R
The average phase voltages VR, VS, VT are output through a filter composed of 7, R8, R9 and capacitors C2, C3, C4.

The R, S and T phase voltages of the induction motor 2 are
When it is equal to the voltage of the input terminal a or b of the inverter 1 and the voltage of the R phase is equal to the voltage of the terminal a,
No current flows through the photodiode 3a, and only when the current is equal to the terminal b, a current flows so that the phototransistor 3b becomes conductive and the terminal voltage VRO becomes zero. That is, only when the voltage of the R phase is equal to the voltage of the terminal a, the terminal voltage VRO proportional to the DC voltage Vdc is generated, that is, the voltage corresponding to the pulse width and the peak value of the output voltage is generated, and as a result, the terminal of the capacitor C2 is generated. An R-phase average voltage VR is generated by the filter action of the resistor R7 and the capacitor C2.

Similarly, for the S-phase and T-phase of the induction motor 2, terminal voltages VSO and V proportional to the DC voltage Vdc are applied only when the S-phase and T-phase voltages are equal to the voltage at the terminal a.
A TO occurs and a resistor R8 is placed between the terminals of capacitors C3 and C4.
, R9 and the capacitors C3, C4 are filtered to generate average voltages VS, VT for the S and T phases. Then, the terminal voltage (line voltage) of the induction motor 2, that is,
The output of the inverter 1 is the average voltage VR, VS,
It can be calculated from VT.

[0007]

The output voltage of the inverter 1 can be obtained as described above. However, in the above-mentioned conventional device, a phenomenon peculiar to the inverter in which the midpoint voltage (reference voltage) fluctuates due to the switching operation of the inverter 1 becomes a detection error as it is. Further, in order to prevent the voltage ripple caused by the switching of the inverter 1 from exceeding the frequency limit of the frequency response of the isolation amplifier 6, a filter may be put in the input in advance to suppress the influence of the ripple, and a high response frequency is obtained. There was a problem such as the need for the isolation amplifier 6. In this case, resistors R7 and R
8 and R9 and capacitors C2, C3 and C4 filters,
If you try to obtain even the ripple of the voltage, the problem that the original waveform is rounded occurs. In addition, the DC voltage Vdc of the inverter 1
If the waveforms are combined based on the above, a difference occurs in the ON voltage of the inverter 1, so that a large error occurs in the inverter having a low DC voltage Vdc.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an output voltage detection device for an inverter, which can detect the fundamental wave of the output voltage of the inverter including many harmonics with high accuracy.

[0009]

An inverter output voltage detecting apparatus according to the present invention divides a DC supply voltage into a multi-phase AC voltage, and a voltage detecting resistor divides the supply voltage to the inverter into two equal parts. Voltage detection means obtained by, and a detection capacitor connected between the output terminal of each phase of the inverter and the voltage detection means via a resistor, respectively,
An isolation amplifier for extracting the voltage across the detection capacitors, an A / D converter to which the output of the isolation amplifier is input via a filter, and an A / D converter for the on / off section of the PWM pulse of the inverter. The sampling means for performing sampling operation at each midpoint, the ripple correction means for correcting the ripple of the output of the A / D converter, the delay correction means for correcting the delay of the output of the ripple correction means, and the delay correction means And a voltage detecting means for detecting the corrected voltage.

[0010]

[Function] The output terminal of the inverter and the midpoint of the voltage detection resistor are connected in series with the same resistor and the detection capacitor, respectively, and the voltage across the detection capacitor is detected to suppress the influence of the fluctuation of the midpoint potential. A pulse filtered voltage can be obtained. In addition, the sampling of the A / D converter that is input via the isolation amplifier is PWM
By carrying out at the midpoint of the pulse on / off section, it is possible to sample a waveform with a stable voltage change, and suppress the influence of the deviation of the sampling point due to the phase delay in the filter by the ripple correction means. Although the ripple-corrected waveform has a phase delay with respect to the inverter output voltage due to the filter, it can be corrected by the delay correction means and the voltage waveform can be accurately detected with only one sampling delay.

[0011]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a configuration diagram of an output voltage detection device for an inverter according to an embodiment of the present invention. In FIG. 1, 21
Is an inverter, to which the DC bus smoothing capacitor 22 is connected between the input terminals a and b, and the voltage detection resistors 23a and 23b connected in series are connected. The voltage detection resistors 23a and 23b have the same resistance value and the inverter 2
The DC voltage Vdc applied between the first input terminals a and b is divided into two equal parts. The inverter 21 converts the DC voltage Vdc supplied between the input terminals a and b into a three-phase (R, S, T) AC voltage, and outputs it from the output terminals 24a, 24b and 24c to an external load. Then, the inverter output terminals 24a, 24b, 24c and the voltage detection resistors 23a, 2
The same resistance 25a, 25b, and
25c and the detection capacitors 26a, 26b, 26c are connected in series, and the detection capacitors 26a, 26b, 26c are connected.
The voltage across both ends of the isolated amplifier 27a, 27b, 2
Enter in 7c. In FIG. 1, only one phase of the isolation amplifier 27a is shown, and the other isolation amplifiers 27b and 27c are omitted. The output signal of the isolation amplifier 27a is sent to a control circuit 30 using a microcomputer or the like via a low pass filter including a resistor 28a and a capacitor 29a. The resistor 28a and the capacitor 2
The filter composed of 9a is set to have a time constant that cuts harmonics at least higher than the PWM carrier frequency, for example.

The control circuit 30 comprises an S / H (sample and hold) circuit 31, an A / D converter 32, a ripple correction circuit 33, a delay correction circuit 34, and a voltage detection circuit 35. The control circuit 30 performs PWM control on the inverter 21 and operates the S / H circuit 31 in synchronism with the PWM pulse so that the signal sent from the isolation amplifier 27a is turned on / off during the PWM pulse. The sample is held at the middle point and input to the A / D converter 32. In this case, the sampling pulse can be generated by, for example, PWM using a microcomputer or a gate array. As one example, there is a method in which a compare match with "0" of the counter for PWM generation or a compare match with the maximum value is used as the sampling pulse. Further, when the sampling is made in analog, it can be easily obtained by detecting the peak of the PWM triangular wave carrier.

Then, in the A / D converter 32, A /
The D-converted signal is ripple-corrected by the ripple correction circuit 33, the delay is corrected by the delay correction circuit 34, and the signal is sent to the voltage detection circuit 35. The control circuit 30 is provided with the same function as that of the isolation amplifier 27a for signals sent from the other isolation amplifiers 27b and 27c.

Next, the operation of the above embodiment will be described with reference to the isolation amplifier 27a.
The system of the signal input to will be described. Since the same processing is performed in the system of the signal input to the other isolation amplifier, the description will be omitted.

The inverter 21 operates in accordance with a control command from the control circuit 30, converts the DC voltage Vdc supplied between the input terminals a and b into a three-phase (R, S, T) AC voltage, and outputs it. Output from 24a to 24c to an external load.

The output voltage of the inverter 21 is detected by the detection capacitors 26a to 26c provided via the resistors 25a to 25c between the output terminals 24a to 24c and the midpoint of the voltage detection resistors 23a and 23b. , The detected voltages are input to the isolation amplifiers 27a ,.
The PWM modulated wave taken out through the isolation amplifier 27a is sent to the control circuit 30 after noise is removed through the filter including the resistor 28a and the capacitor 29a.

In the control circuit 30, first, in the S / H circuit 31, as shown in FIG.
The sample is held at the midpoint S of each ON / OFF section of the M pulse and input to the A / D converter 32. As described above, by performing the sample hold at the midpoint of the ON / OFF section of the PWM pulse, ideally, it is not affected by the ripple of the voltage waveform as shown in FIG. But actually,
Detection resistors 25a to 25c and detection capacitors 26a to 26
Due to the phase delay of the filter constituted by c, it is affected by ripple as shown in FIGS. 3 (a) and 5 (a). FIG. 2 is a signal waveform diagram showing an ideal detection operation of the PWM voltage waveform, and shows the relationship between the PWM pulse, the output voltage, and the desired voltage. Further, FIG. 3A is a signal waveform diagram showing the actual detection operation of the PWM voltage waveform, in which the output voltage includes a ripple component. FIG. 5A shows the signal waveform input to the A / D converter 32, and shows the waveform of the command voltage one sample before and the sampled voltage.

If the midpoint of the PWM pulse is simply sampled as described above, ripple occurs due to the phase delay of the filter composed of the detection resistors 25a to 25c and the detection capacitors 26a to 26c. FIG. 3B is the same as FIG.
FIG. 2A is an enlarged view of the A portion of (a), where E1 is the ripple of the output voltage of the inverter 21 at the time of sample S1, and E1 is
Reference numeral 2 indicates the ripple at the time of sample S2 in which the phase is delayed by the filter.

When sampling is performed in synchronization with the midpoint when the PWM pulse is turned on and when it is turned off as described above, FIG.
As shown in (b), the value of the ripple E2 at each sample, that is, the ripple E at the rising time (sample S1)
The value a of 2 and the ripple E2 at the time of descending (sample S2)
The value b of is almost the same, and its average value is almost zero.
The ripple correction circuit 33 has an A /
By processing the digital signal output from the D converter 32, that is, by obtaining the average value (a + b / 2) of the value a at the sample S1 time and the value b at the sample S2 time of the ripple E2, the influence of the ripple is obtained. The true value is obtained except for. FIG. 5B shows a waveform in which the ripple is removed by the ripple correction circuit 33, that is, a waveform of the command voltage one sample before and the sampled voltage.

The signal ripple corrected by the ripple correction circuit 33 is detected by the detection resistor 25a and the detection capacitor 26a.
Delay of the filter composed of and the noise removal resistor 2
Since the filter constituted by 8a and the capacitor 29a has a delay, the delay of this signal is corrected by the delay correction circuit 34. That is, the delay correction circuit 34 equivalently corrects the influence of the delay by performing the delay correction process of the inverse model on the filter 41 including the detection resistor 25a and the detection capacitor 26a as shown in FIG. . Figure 5
(C) shows the waveform of the command voltage one sample before and the sampled voltage whose phase delay has been corrected by the delay correction circuit 34.

As described above, the ripple included in the output voltage of the inverter 21 is removed by the ripple correction circuit 33, and the phase delay caused by the filter is corrected by the delay correction circuit 3.
It is corrected in 4 and sent to the voltage detection circuit 35. Therefore,
The voltage detection circuit 35 can accurately obtain the fundamental wave of the output voltage of the inverter 21 as data.

[0022]

As described above in detail, according to the present invention, the voltage supplied to the inverter is divided by the voltage detection resistor, and the detection capacitor is connected between the midpoint and the inverter output terminal via the resistor. Since the voltage across the capacitor is detected, it is possible to obtain the PWM modulated wave in which the potential fluctuation at the neutral point of the inverter is suppressed. Moreover, since the sample pulse is held at each midpoint of each ON / OFF section of the PWM pulse and input to the A / D converter, the ripple correction process thereafter can be performed reliably and easily. Further, by performing delay correction on the ripple-corrected signal, it is possible to detect the fundamental wave of the output voltage of the inverter, which contains many harmonics, with high accuracy.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an output voltage detection device for an inverter according to an embodiment of the present invention.

FIG. 2 is a signal waveform diagram showing an ideal detection operation of a PWM voltage waveform.

3A is a signal waveform diagram showing an actual detection operation of a PWM voltage waveform, and FIG. 3B is an enlarged diagram showing a part of the signal waveform in FIG. 3A.

FIG. 4 is a conceptual diagram showing the principle of a delay correction circuit.

FIG. 5 is a diagram showing a state of a detection voltage of each part in the control circuit.

FIG. 6 is a configuration diagram of a conventional inverter output voltage detection device.

[Explanation of symbols]

 21 Inverter 23a, 23b Voltage detection resistor 24a-24c Inverter output terminal 25a-25c 26a-26c Detection capacitor 27a Insulation amplifier 30 Control circuit 31 S / H (sample / hold) circuit 32 A / D converter 33 Ripple correction circuit 34 Delay correction Circuit 35 Voltage detection circuit

Claims (1)

[Claims] 1. An inverter for converting a DC supply voltage into a multi-phase AC voltage, a voltage detection means obtained by equally dividing the supply voltage to the inverter by a voltage detection resistor, and output terminals for each phase of the inverter. Between the voltage detecting means and the voltage detecting means via a resistor, an insulating amplifier for extracting the voltage across the detecting capacitor, and the output of the insulating amplifier is input via a filter A /
A D converter, a sampling means for sampling the A / D converter at each midpoint of each ON / OFF section of the PWM pulse of the inverter, and a ripple correction means for correcting ripple of the output of the A / D converter,
An output voltage detection device for an inverter, comprising: a delay correction unit that corrects a delay in the output of the ripple correction unit; and a voltage detection unit that detects a voltage corrected by the delay correction unit.