JPH08107631A - Synchronizing system of sampling - Google Patents

Abstract

PURPOSE: To eliminate time distortion of a sampling period at the time of switchover by a method wherein a temporary main station substituted due to occurrence of a fault of a transmission line for the former main station which synchronizes sampling of all subordinate stations before occurrence of the fault controls the timing of transmission of frame data so as not to disturb the previous sampling time. CONSTITUTION: A frame generating part 1 generates a frame after a prescribed time Ts from a sampling synchronous timing. The time Ts is determined by subtracting a transmission line delay time Tdn /2 from a sampling period T and set in a frame delivery delay time setting part 3. During initialization of a main station, a free-running sampling period T is generated 4. CPU 2 executes a synchronization processing by the free-running period T and makes input to a synchronous timing generating part 5. Making a switching part 6 conduct switchover from the generating part 4 to 5, the CPU 2 sets 3 a delay and the frame data are transmitted downstream by the frame generating part 1. Although the CPU 2 of a subordinate station becoming a temporary main station due to a fault of a transmission line first executes processing by the free-running period T, it makes the frame data be transmitted downstream when a delay time of forward and backward transmission of the transmission line is determined. According to this constitution, synchronization distortion is prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sampling synchronization system for simultaneously sampling current or the like at a plurality of electric stations.

[0002]

2. Description of the Related Art A PCM current differential relay performs a protection calculation based on a current difference sampled at each electric station installed in a power transmission and distribution system. In order to obtain this current difference, it is necessary to perform current sampling between electric power stations at the same time and transmit this sampling data to the partner electric power station. In many other protection relays, voltage and the like are simultaneously sampled between electric stations and transmitted to each other.

An example of a data transmission system between electric stations is shown in FIG. Station A of transmission module configuration at each electric station
E is provided, the stations are coupled by an upstream and a downstream dual transmission path (electrical or optical transmission path), station A is a master station, and stations B, C and D are intermediate stations (slave stations), and station E Is used as a loopback station (slave station), and downlink transmission from the master station A to the loopback station E and uplink transmission from the loopback station E to the master station A are performed.

In contrast to the open loop system shown in (a) of the figure, the loop system shown in (b) is a loop provided with a backup route (shown by a broken line) for directly connecting the master station A and the return station E. It is formed on the transmission line, and the transmission function can be secured even if a transmission line failure occurs.

For example, when a failure occurs in the transmission path between the intermediate stations B and C, the intermediate station C that has detected the failure in the transmission path becomes the temporary master station, the intermediate station B becomes the temporary loopback station, and the temporary master station C to the station D-
E-A-B downlink transmission, and temporary folding station B to station AE
-Uplink transmission to DC. When the transmission line failure is restored, the original configuration of the parent station A to the return station E is restored.

Next, the sampling synchronization method between each station will be described.

As shown in the format of FIG. 6, the transmission data has a frame structure composed of synchronization (header), sampling address SA, and sampling data DA to DE of each station A to E. In this frame data, data cyclically sampled by each station is sequentially written in association with the sampling address SA.

For example, the master station A writes the data sampled by itself in the data DA and forwards it to the slave station B, and the slave station B writes the data sampled by itself in the data DB and the slave station C. The process of downlink transmission is repeated.

In these processes, the data sampled by each station at the sampling cycle is performed for each sampling address SA. In the example of FIG. 6, the master station A writes the sampling data of its own station in DA1, and writes the next sampling data in DA2.

[0010] The sampling period is in the power system frequency 50H _Z system 600H _Z (1.666ms), 60
The H _Z system is 720H _Z (1.388ms).

The downlink transmission data in which the sampling data is written in each of the stations A to E is looped back by the slave station E which is a loopback station and transmitted to the master station A as uplink transmission data. The time relationship between the downlink transmission data and the uplink transmission data is as shown in FIG.

The data transmitted by the master station A at a certain time is transmitted to the slave station B with a transmission time delay according to the distance between the stations, and further transmitted to the slave stations C to E. Has a transmission time delay. Then, the data is transmitted to the master station A with a transmission time delay between the respective stations even when the data is returned as uplink transmission.

Therefore, in each of the stations A to E, the round trip delay time of the transmission path from the time when a certain transmission data is received as the downlink data to the time when the transmission data is received as the uplink data is constant for each station when the transmission route configuration is the same. .

This time is from T _d0 to each of the stations A to _D.
It becomes T _{d3 and} becomes 0 at the slave station E. Each of the stations A to E has a round trip delay time T _{d0 to} T _d3 of the downlink / upstream transmission line for each station, which is 1 of 0.
Simultaneous sampling data of each station is obtained by setting / 2 as the sampling synchronization point.

That is, each station uses a sampling synchronization point at an intermediate time between the timing of receiving downlink data for each station and the timing of receiving the same data (same sampling address SA) as upstream data, and the data sampled at this time. The synchronization is obtained by making each station the data of the same time.

[0016]

In the conventional system adopting the sampling synchronization method, the master station function is replaced when a transmission line failure occurs, and the transparency of information is secured by reconfiguring the transmission route. When this master station is replaced, the downlink / upstream transmission route is determined with reference to the temporary master station, so that the continuity of the transmission frame before and after the occurrence of the transmission path failure is impaired.

FIG. 8 shows discontinuity of sampling synchronization when a transmission path failure occurs. In the system having the backup route shown in FIG. 5B, the slave station C reports that a transmission path failure has occurred between the slave stations B and C in the sampling synchronization state where the sampling cycle T is the station A as the master station. When it is judged that reception is impossible for a certain period of time, it becomes a temporary master station and starts transmission.

The slave station C of the temporary master station starts transmitting downlink data when it determines that the data cannot be received, and obtains sampling synchronization by the time T _d2 'before receiving this data as uplink data.

As a result, the sampling synchronization by the master station and the sampling synchronization time by the temporary master station start from different phases. That is, since there is no mechanism for synchronizing the clock source used for sampling synchronization between the master station and the temporary master station, the sampling synchronization is reestablished between the stations.

During this re-taking, depending on how the time distortion of the sampling cycle (there is a time other than the constant cycle T), the relay CP that performs processing at the sampling cycle.
The U software processing may be overrun (processing cannot be completed due to a shortened cycle).

An object of the present invention is to provide a sampling synchronization system which eliminates the occurrence of time distortion of the sampling period when switching the master station.

Another object of the present invention is to provide a sampling synchronization system which reduces the time distortion of the sampling period when the master station is switched.

[0023]

In order to solve the above-mentioned problems, the present invention performs loop coupling between stations through a transmission line having a backup route, and frame data sampled at each station from a master station to a return slave station. The downlink transmission and the uplink transmission from the loopback slave station to the master station are performed, and each station has 1 / one of the transmission path delay time until the downlink transmission frame data is received by the uplink transmission.
In a sampling synchronization method for obtaining a sampling synchronization point from two hours, each station has a free-running T-cycle timing generation unit that generates a timing signal having a sampling period T, and a sampling synchronization timing that generates a timing signal sampling-synchronized between stations. The station includes a generator and means for setting a frame transmission delay setting time T _S that is obtained by subtracting 1/2 of the transmission path delay time from the sampling cycle T. The transmission path delay time and the frame transmission delay setting time T _S are obtained by transmitting and receiving, and the timing delayed by the frame transmission delay setting time T _S from the timing of the sampling synchronization timing generator when the synchronization of each station is established. It is characterized by switching to and transmitting frame data To.

Further, according to the present invention, the stations are loop-coupled by a transmission line having a backup route, and the frame data sampled by each station is transmitted downstream from the master station to the return slave station and from the return slave station to the master station. In a sampling synchronization method in which each station performs uplink transmission and each station obtains a sampling synchronization point from half the transmission line delay time until receiving downlink transmission frame data in uplink transmission, a station that becomes a slave station A sampling synchronization timing generator for generating a timing signal synchronized with sampling and a means for setting a frame transmission delay setting time T _S obtained by subtracting 1/2 of the transmission path delay time from the sampling period T for this timing signal. The sampling synchronization timing generation unit includes a PLL unit that is subordinately synchronized with the sampling synchronization timing signal. Characterized by generating a sampling synchronization timing signal synchronization pull.

[0025]

[Action]

(First invention) Until the transmission line failure occurs, the fact that all the slave stations are sampling-synchronized by the old master station is used, and the temporary master station which is replaced by the occurrence of the transmission line failure is By controlling the transmission timing of the frame data so as not to affect the sampling timing, the time distortion of the sampling cycle T at the time of switching the master station is eliminated.

(Second invention) Each station generates the sampling synchronization timing by the synchronization pull-in by the PLL unit, so that when the transmission line failure occurs, each station gradually pulls the synchronization according to the phase control amount of the PLL unit. , Reduce the time distortion of the sampling cycle when switching the master station.

When the phase control amount is switched between the normal time and the occurrence of a transmission line failure, the fluctuation of the sampling synchronization in the normal time can be reduced and the synchronization pull-in at the time of switching the master station can be speeded up. .

[0028]

【Example】

(First Embodiment) FIG. 1 shows an embodiment of the present invention and shows a frame transmission timing processing block of each station.

The frame generator 1 generates a frame after a fixed time T _S from the sampling synchronization timing. This time T _S is, as shown in FIG.
CP as the time obtained by subtracting the transmission line delay time T _dn / 2 from
It is obtained on the U2 side and set in the frame transmission delay time setting unit 3.

At the time of initializing the master station when the system is started up, since the sampling synchronization timing does not exist, the timing signal of the free-running sampling period T is generated until the sampling synchronization timing is fixed. This timing signal is generated by the self-propelled T-cycle timing generator 4.

The CPU 2 performs the sampling synchronization processing with the free-running period T, and obtains the sampling synchronization timing signal from the sampling synchronization timing generator 5. And
When the sampling synchronization becomes stable, the CPU 2 switches the switching unit 6 to the signal from the sampling synchronization timing generation unit 5 instead of the timing signal from the free-running T cycle timing generation unit 4, and delays the delay by the frame transmission delay setting unit 3. Then, the frame generation timing is given and the frame data generated by the frame generation unit 1 is transmitted as downlink transmission data.

Next, in the sampling synchronization by the slave station n, which has become the temporary master station due to the occurrence of the transmission path failure, the CPU 2 uses the switching unit 6 to measure the transmission path round trip delay time T _dn.
, So that the self-propelled T cycle timing generation unit 4
The frame generation unit 1 generates a frame at the timing.

However, in this frame generation, each slave station receiving this does not perform sampling synchronization processing,
Sampling synchronization control prohibition information is added in the frame.

When the CPU 2 of the slave station n, which has become the temporary master station, can measure the round-trip delay time T _dn of the transmission line, the setting section 3 is set / updated by _obtaining the frame generation delay time T _S , and the switching section. The switching of 6 delays the timing signal from the sampling synchronization timing generator 5 by the time T _S to generate a frame. This T _S becomes T- (T _dn / 2).

From this time, the sampling synchronization control information in the frame is validated so that the sampling synchronization control can be performed in each slave station.

Therefore, according to the present embodiment, the slave station which has become the temporary master station immediately starts the frame generation by the free-running T-cycle timing generation unit 4, and when the sampling synchronization is obtained thereafter, the frame transmission delay is generated. Since the frame is generated by adding the time, it is possible to eliminate the occurrence of the time distortion of the sampling period T when the master station is switched when the transmission path failure occurs.

(Second Embodiment) FIG. 2 shows another embodiment of the present invention and shows the configuration of the sampling synchronization timing generator (5 in FIG. 1) provided in the master station and each slave station. The sampling synchronization point calculation unit 11 obtains the sampling synchronization point from 1/2 time T _dn from the reception of the frame data of the downlink transmission to the reception of the frame data of the uplink transmission, as in the conventional case.

The PLL unit 12 is formed of a digital or analog PLL (phase locked loop) circuit, uses the sampling synchronization signal from the sampling synchronization point calculation unit 11 as a phase comparison input, and outputs a signal of timing subordinately synchronized with this. To occur. This signal is synchronized with sampling timing.

In the present embodiment, the master station has the configuration shown in FIG. 1 and the sampling synchronization timing generator 5 shown in FIG. Each slave station omits the free-running T-cycle timing generation unit 4 and the switching unit 6, and the time T _S of the frame transmission delay time setting unit 3 is fixed.

When the transmission path is normal, each slave station obtains 1/2 of the time difference T _dn between the downlink and the uplink from the master station by the sampling synchronization point calculation unit 11 and uses this as the sampling synchronization point, and the PLL The section 12 obtains the dependently synchronized sampling signal.

When a transmission path failure occurs, each slave station, including the temporary master station, has a sampling time of 1/2 of the time difference T _d0 between the downstream and upstream transmissions performed by the old master station. Then, the sampling synchronization point is gradually moved by the cascade synchronization by the PLL unit 12 without shifting to a new sampling time (T _dn / 2) all at once.

For this control, the PLL section 12 sets the amount of phase control to ± α and gradually moves the time distortion with respect to the sampling period T at a maximum of ± α.

FIG. 3 shows a synchronization pull-in process by the PLL unit 12. When the transmission path is normal, each station is sampling-synchronized at the sampling cycle T ± α. In this state, when a failure of the transmission path occurs between the slave stations B and C, the transmission route in which the slave station C becomes the temporary master station is reconfigured, but the temporary master station and each slave station (old master station) are reconfigured. (Including) also moves the sampling synchronization point while pulling the synchronization by ± α with respect to the deviation of the sampling synchronization.

As a result, in the present embodiment, the sampling synchronization deviation at the time of switching the master station due to the occurrence of the transmission failure is converged over time by each slave station, so that the time distortion with respect to the sampling period T becomes maximum ± α. Can be suppressed.

Further, since each slave station converges by the same algorithm, the sampling synchronization point becomes the same for all stations as a result.

In order to shorten the synchronization pull-in time, it is realized by appropriately increasing the phase control amount ± α of the PLL unit 12, but sampling synchronization error and sampling are not asynchronous, and the CPU does not become overrun state. Limit to range.

In addition, the PLL unit 12 is digital (D
When using a PLL, the fluctuation of the sampling signal can be evaluated digitally.

(Third Embodiment) FIG. 4 shows another embodiment of the present invention. By providing the sampling synchronization range verification unit 13 in the configuration of FIG.
The case of switching α is shown.

The synchronization range verification unit 13 detects the synchronization deviation between the sampling signal from the sampling synchronization point calculation unit 11 and the previous sampling signal, and verifies whether this synchronization deviation is within a certain range or outside the range. This range is set to, for example, several tens of microseconds, which is an allowable sampling fluctuation width viewed from the relay performance.

This verification result shows that when the synchronization deviation is within a certain range, the phase control amount ± α of the PLL unit 12 is reduced,
If it exceeds a certain range, the phase control amount ± α is increased.

For example, if it is within the range, α is set to 1 clock (several hundred nanoseconds to several microseconds) to perform the synchronization pull-in of the PLL unit 12, and if it is out of the range, it is set to n clocks (several tens of microseconds). .

By switching the phase control amount, the deviation of the sampling synchronization is within the verification range in the normal state where the transmission line is normal, and the sampling synchronization with small fluctuation is obtained by the small phase control amount.

When the shift amount of the sampling synchronization becomes large, such as when a transmission line failure occurs, a high-speed sampling synchronization pull-in is obtained by a large phase control amount.

As a result, in this embodiment, in addition to the effects of the above-described embodiment, by switching the phase control amount, it is possible to reduce the fluctuation of the sampling synchronization and speed up the convergence for the synchronization deviation.

In this embodiment, the switching of the phase control amount by the synchronization range verification unit 13 can be performed in two or more steps.

[0056]

As described above, according to the present invention, the fact that all the slave stations are sampling-synchronized by the old master station before the occurrence of the transmission path failure is utilized, and the transmission path failure occurs. Since the temporary master station, which is switched by, controls the frame data transmission timing so as not to affect the sampling timing up to that point, it is possible to eliminate the occurrence of time distortion in the sampling cycle T when the master station is switched.

Further, according to the present invention, each station causes the sampling synchronization timing generation by the synchronization pull-in by the PLL unit, so that when each transmission line fault occurs, each station receives P
Since the synchronization pull-in is gradually performed according to the phase control amount of the LL unit, it is possible to reduce the time distortion of the sampling period when the master station is switched.

Further, when the phase control amount is switched between the normal time and the transmission line failure occurrence, the fluctuation of the sampling synchronization in the normal time can be reduced and the synchronization pull-in at the time of switching the master station can be speeded up. .

[Brief description of drawings]

FIG. 1 is a frame transmission timing process according to an embodiment of the present invention.

FIG. 2 is a PLL processing of a sampling signal showing another embodiment of the present invention.

FIG. 3 is a diagram showing a synchronization pull-in process by a PLL in another embodiment.

FIG. 4 is a PLL processing of a sampling signal showing another embodiment of the present invention.

FIG. 5 is a transmission system diagram.

FIG. 6 is an example of a transmission format of frame transmission.

FIG. 7 is an explanatory diagram of sampling synchronization points.

FIG. 8 is a diagram showing discontinuity of sampling synchronization when a transmission path fails.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Frame generation part 2 ... CPU 3 ... Frame transmission delay time setting part 4 ... Free-running T-cycle timing generation part 5 ... Sampling synchronization timing generation part 6 ... Switching part 11 ... Sampling synchronization point calculation part 12 ... PLL part 13 ... Sampling Sync range verification section

Claims (2)

[Claims] 1. A station is loop-coupled with a transmission path having a backup route, and frame data sampled by each station is transmitted downstream from a master station to a return slave station and upstream transmission from the return slave station to a master station. , Each station has 1 / one of the transmission line delay time until it receives the downlink transmitted frame data by the uplink transmission.
In a sampling synchronization method for obtaining a sampling synchronization point from 2 hours, each station includes a free-running T-cycle timing generation unit that generates a timing signal having a sampling period T, and a sampling synchronization timing that generates a timing signal sampling-synchronized between the stations. comprising: a generating unit, and means for setting a frame sending delay setting time T _S obtained by subtracting half of the transmission path delay time from the sampling period T, each station, the frame data by the free-running T cycle timing generator The transmission path delay time and the frame transmission delay setting time T _S are obtained by transmitting and receiving, and the timing delayed by the frame transmission delay setting time T _S from the timing of the sampling synchronization timing generator when the synchronization of each station is established. It is special to switch to the mode to generate and transmit frame data. Sampling synchronization method to be. 2. The station is loop-coupled with a transmission path having a backup route, and the frame data sampled at each station is transmitted downstream from the master station to the loopback slave station and upstream from the loopback slave station to the master station. , Each station has 1 / one of the transmission line delay time until it receives the downlink transmitted frame data by the uplink transmission.
In a sampling synchronization method that obtains a sampling synchronization point from two hours, a station that becomes a slave station has a sampling synchronization timing generation unit that generates a timing signal that is sampling synchronized between stations, and the transmission from the sampling cycle T to the timing signal. Means for setting a frame transmission delay setting time T _S obtained by subtracting 1/2 of the path delay time, wherein the sampling synchronization timing generation unit is a sampling synchronization unit that performs a synchronization pull-in by a PLL unit that is subordinately synchronized with the sampling synchronization timing signal. A sampling synchronization method characterized by generating a timing signal.