JPH08107057A - Method and apparatus for baking - Google Patents

Abstract

PURPOSE: To provide a baking apparatus by which a thin film whose outer circumferential part has a large film thickness can be etched to the required extent at any place. CONSTITUTION: 1st, 2nd and 3rd wafer heating regions 1a, 1b and 1c whose heating temperatures are increased from a circumferential part to a center part are provided on a hot plate 1. A semiconductor wafer 3 is provided coaxially on the hot plate 1 to apply 8 heat treatment to polyimide resin 4. By increasing the heating temperatures of the semiconductor wafer 3 toward the center part, the etching rate of a thin film having the difference in film thickness can be increased toward the outer circumferential part of the semiconductor wafer 3, so that the any place of the thin film can be etched to the required extent.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a baking method and apparatus, and more particularly to a baking technique for heating a semiconductor wafer to heat-treat a solution applied on the surface of the semiconductor wafer.

[0002]

2. Description of the Related Art For example, in a wafer processing process in a manufacturing process of a semiconductor device, various external factors affecting a device are removed, or an unstable factor already existing in the device is removed to form a semiconductor wafer. In order to stabilize the device characteristics, a passivation process for forming a predetermined protective film is performed.

Examples of such passivation technology described in detail include "Latest LSI Process Technology" (published on July 25, 1983), P337 to P346, published by Kogyo Kogyo Kenkyukai.

[0004]

During the passivation process, a semiconductor wafer on which a device is formed is spin-coated with a solution of a polyimide resin or the like, and this is baked using a hot plate or the like to form a thin film (film layer). There is a method in which a contact hole is formed by patterning a thin film corresponding to the chip electrode with a photoresist and removing it by etching.

Here, if the solution to be applied has a high viscosity, when the solution is spin-coated on the semiconductor wafer, the solution is thickened toward the outer peripheral portion of the semiconductor wafer by the centrifugal force due to the spin. Therefore, when the entire semiconductor wafer is baked using a hot plate that regulates the temperature to a constant temperature, the heat applied to the solution at the outer peripheral portion and the central portion of the semiconductor wafer is constant, so that the film quality is the same in the plane of the semiconductor wafer. However, a thin film having a thicker film on the outer peripheral portion is formed.

In the case of the passivation process, when the thin film having such a film thickness difference is subjected to the etching process to form the above-mentioned contact hole, the etching rate itself becomes uniform due to the same film quality. A contact hole having an insufficient depth where the chip electrode is not exposed is formed as it goes to the outer peripheral portion.

Therefore, an object of the present invention is to provide a baking technique capable of etching a film layer, which is formed on a semiconductor wafer and has a thick outer peripheral portion, to a desired degree at any position. To do.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0009]

The typical ones of the inventions disclosed in the present application will be outlined below.

That is, in the baking method according to the present invention, a semiconductor wafer in which a predetermined solution is applied thicker toward the outer peripheral portion is prepared, and the heating temperature of the semiconductor wafer increases from the outer peripheral portion toward the central portion. Thus, the solution is heat-treated.

Further, in the baking method according to the present invention, a semiconductor wafer in which a predetermined solution is applied thicker toward the outer peripheral portion is prepared, and a plurality of different semiconductor wafers are heated from the outer peripheral portion toward the central portion. The heat treatment is applied to the solution by heating in different temperature ranges.

In the baking method according to the present invention, a semiconductor wafer in which a predetermined solution is applied thicker toward the outer peripheral portion is prepared, and the semiconductor wafer is heated from the outer peripheral portion toward the central portion so that the heating time becomes longer. Then, the solution is heat-treated.

A baking apparatus according to the present invention is a baking apparatus for heating a semiconductor wafer coated with a predetermined solution, and has a plurality of wafer heating regions having a high temperature region from the outer peripheral portion toward the central portion. A hot plate is provided, in which the semiconductor wafer is coaxially arranged on the hot plate, and the thicker solution is heat-treated toward the outer periphery of the semiconductor wafer.

In this case, the plurality of wafer heating regions are composed of first, second and third wafer heating regions from the outer peripheral portion toward the central portion, and the heating temperature by the first wafer heating region is about 105.degree. The outer diameter is equal to or larger than the diameter of the semiconductor wafer, and the heating temperature by the second wafer heating region is about 120.
The outer diameter is about 2 mm smaller than the diameter of the semiconductor wafer at ℃, and the heating temperature by the third wafer heating area is about 125 ℃.
The diameter of the semiconductor wafer can be smaller than that of the semiconductor wafer by about 10 mm.

The baking apparatus according to the present invention is a baking apparatus for heating a semiconductor wafer coated with a predetermined solution, and has a plurality of wafer heating regions each having a longer heating time from the outer peripheral portion toward the central portion. A hot plate is provided, the semiconductor wafer is coaxially arranged on the hot plate, and the thickened solution is heat-treated toward the outer periphery of the semiconductor wafer.

In the above case, the outer diameter of the outermost wafer heating region may be smaller than the diameter of the semiconductor wafer to be heated. When the diameter of the semiconductor wafer is smaller than the diameter of the semiconductor wafer, the wafer heating region is composed of the first and second wafer heating regions from the outer peripheral portion toward the central portion, and the heating temperature by the first wafer heating region is about 105 ° C. The outer diameter is smaller than the diameter of the semiconductor wafer by about 2 mm, the heating temperature by the second wafer heating region is about 125 ° C., and the diameter can be formed by about 10 mm smaller than the diameter of the semiconductor wafer.

The baking apparatus according to the present invention comprises:
A baking apparatus for heat-treating a semiconductor wafer coated with a predetermined solution, wherein a hot plate having a diameter smaller than that of the semiconductor wafer to be heated and having a single wafer heating area is provided, and the semiconductor wafer is hot. The solution is applied coaxially on the plate and is thickened toward the outer peripheral portion of the semiconductor wafer, and is subjected to heat treatment.

[0018]

According to the above-described means, the heating temperature of the semiconductor wafer coated with the solution thicker toward the outer peripheral portion is increased toward the central portion, so that there is a difference in film thickness formed by the heat treatment. The etching rate of the film layer can be increased toward the outer peripheral portion of the semiconductor wafer.

Therefore, etching can be performed to a desired degree at any position of the film layer, and it becomes possible to eliminate a position where etching is insufficient.

Further, since the etching rate of the thick film portion is increased and the etching is performed quickly, the etching time can be shortened.

[0021]

Embodiments of the present invention will now be described in detail with reference to the drawings.

(Embodiment 1) FIG. 1 is a perspective view showing a main part of a baking apparatus according to an embodiment of the present invention, and FIG.
-II is sectional drawing which follows the line, FIG. 3 is a top view which shows the baking apparatus of FIG.

As shown in FIGS. 1 and 3, the hot plate 1 of the baking apparatus according to the present embodiment has first, second and third wafer heating regions 1a, 1b and 1c from the outer peripheral portion toward the central portion. Are formed concentrically.

As a heating source (not shown), for example, an infrared heater is used for each wafer heating region 1a,
1b and 1c are respectively connected to the first, second and third temperature controllers 2a, 2b and 2c so that temperature control independent from each other is possible. Therefore, the semiconductor wafer 3 mounted coaxially on the hot plate 1 is
The area becomes heated at three different temperatures.

Here, the semiconductor wafer 3 to be heat-treated by the hot plate 1 is one in which a predetermined device (not shown) is built after the wafer processing process is completed. Then, in order to eliminate external factors affecting the device and instability factors existing in the device by subjecting the device formation surface to passivation treatment, as shown in FIG. Viscosity polyimide resin (solution) 4 is spin-coated (= a technique of dropping a predetermined solution on the center of a semiconductor wafer, rotating the semiconductor wafer, stretching the solution by centrifugal force due to rotation, and applying the solution over the entire surface). Is.

The thickness of the spin-coated polyimide resin 4 tends to become thicker toward the outer peripheral portion of the semiconductor wafer 3 because of its high viscosity, and in general, the thickness of the thickest portion and the thinnest portion is about double. It has a gap. Explaining this semiconductor wafer concretely, the first portion S ₁ of about 1 mm from the outer peripheral edge toward the center portion is about 30 μm.
m, the second portion S ₂ from this first portion S ₁ to about 4 mm further toward the center is about 18 μm, and the third portion S ₃ surrounded by the _second portion S ₂ is It is about 15 μm.

The diameter of the hot plate 1 on which such a semiconductor wafer 3 is held by, for example, vacuum suction, in other words, the outer diameter of the first wafer heating region 1a located at the outermost portion of the hot plate 1 is the semiconductor wafer 3 Is formed to have a diameter greater than or equal to. That is, when the diameter of the semiconductor wafer 3 is 150 mm, the outer diameter of the first wafer heating area 1a is 160 mm, for example. The outer diameter of the first wafer heating area 1 a is sufficient if it is equal to or larger than the diameter of the semiconductor wafer 3, and thus may be the same as the semiconductor wafer 3.

The outer diameter of the second wafer heating region 1b is smaller than the diameter of the semiconductor wafer 3 by about 2 mm.
Therefore, the radius of the second wafer heating region 1b is smaller than the radius of the semiconductor wafer 3 by about 1 mm, and the polyimide resin 4 of about 1 mm thick is applied from the outer peripheral edge of the semiconductor wafer 3 toward the center. The first part S
₁ is heated by the above-mentioned first wafer heating area 1a.

The diameter of the third wafer heating area 1c is smaller than the diameter of the semiconductor wafer 3 by about 10 mm.
Therefore, the radius of the third wafer heating region 1c is smaller than the radius of the semiconductor wafer 3 by about 5 mm, and the polyimide having a width of about 4 mm located inside the outer peripheral edge by about 1 mm from the outer peripheral edge by about 1 mm. The second portion S ₂ coated with the resin 4 with a slightly thicker thickness is heated by the second wafer heating area 1b. Then, the third portion S ₃ located on the inner side of this and coated with the thinnest polyimide resin 4 is heated by the third wafer heating region 1c.

Heat insulating material 5 for preventing mutual temperature interference
The first, second and third wafer heating regions 1a, 1b and 1c, which are capable of being held at the temperatures set by the respective temperature controllers 2a, 2b and 2c, by means of the respective temperature controllers 2a, 2b and 2c, The heating temperature is set by 2c such that the temperature rises from the first wafer heating region 1a located at the outermost portion to the third wafer heating region 1c located at the central portion. Therefore, the portion where the polyimide resin 4 is applied thinner is heated at a higher temperature. The heating temperature in this embodiment is, for example, about 105 ° C. in the first wafer heating area 1a, about 120 ° C. in the second wafer heating area 1b, and about 125 ° C. in the third wafer heating area 1c. It is set.

The heating temperature is partially varied in one semiconductor wafer 3 as described above for the following reason.

That is, the present inventors
Attention was paid to the fact that when the heating temperature is changed in the heat treatment after the polyimide resin 4 is applied to the film, the etching rate of a thin film (film layer) (not shown) formed by curing the polyimide resin 4 changes. Then, it was revealed that this etching rate changes in an inversely proportional relationship with the heating temperature, that the etching rate becomes lower as the heating temperature is raised and becomes higher as the heating temperature is lowered. Therefore, when there is a difference in the thickness of the polyimide resin 4 spin-coated on the semiconductor wafer 3, if the etching rate of the thin film is partially changed by increasing the heating temperature of the thin portion, the etching process I was convinced that it would be possible to eliminate the inadequate part of.

Then, the experiment is repeated from such a viewpoint, and, for example, each of the wafer heating regions 1a, 1 as described above is used.
Under the dimensional conditions of b and 1c and the heating temperature conditions, a baking apparatus capable of etching a thin film to a desired degree at any place in the surface area of the semiconductor wafer 3 was obtained.

The semiconductor wafer 3 on which the polyimide resin 4 has been spin-coated is heated by the baking apparatus having the hot plate 1 having the above-mentioned structure, and the polyimide resin 4 is heated.
When heat treatment is performed on the semiconductor wafer 3, first, the semiconductor wafer 3 is held coaxially with the hot plate 1 by, for example, vacuum suction.

Next, the first, second and third temperature controllers 2a, 2b and 2c are adjusted to set the first, second and third wafer heating areas 1a, 1b and 1c to about 1 each.
Apply heating temperature of 05 ℃, 120 ℃, 125 ℃ 10
The semiconductor wafer 3 is heated for ˜15 minutes to cure the applied polyimide resin 4 to form a thin film.

Then, with respect to the thin film formed by such heat treatment, a thin film of a portion corresponding to a chip electrode (not shown) is patterned by photoresist, and the portion is removed by etching to form a contact hole (not shown). Form.

At this time, as described above, the etching rate of the formed thin film is highest in the first portion S ₁ having a large film thickness, and the second portion S ₂ and the third portion S ₃ have the same film thickness. Becomes thinner as the thickness becomes thinner, the etching progress rate becomes fastest in the first portion S _{1 and} becomes slowest in the third portion S ₃ . That is, at the same etching time,
The thicker first portion S ₁ that needs to be etched earlier is so etched to expose the chip electrode, and the thinner second and third portions S ₂ , S _2
3 is etched later, exposing the tip electrode as well.

As described above, by increasing the heating temperature of the semiconductor wafer 3 coated with the polyimide resin 4 thicker toward the outer peripheral portion by the spin coating toward the central portion, the film thickness formed by the heat treatment. Since the thin film having the difference is etched to any desired degree at any place, it is possible to prevent the contact hole having an insufficient depth where the chip electrode is not exposed from being formed in the outer peripheral portion of the semiconductor wafer 3.

After the contact holes are formed, the semiconductor wafer 3 is diced to cut semiconductor chips (not shown), which are bonded to die pads of a lead frame (not shown) and wire-bonded.
The semiconductor device is completed by being sealed by the sealing body.

(Embodiment 2) FIG. 4 is a perspective view showing an essential part of a baking apparatus according to another embodiment of the present invention, and FIG.
FIG. 6 is a cross-sectional view taken along the line V-V, and FIG. 6 is a plan view showing the baking apparatus of FIG.

As shown in FIG. 4, the hot plate 11 of the baking apparatus according to this embodiment has first and second wafer heating regions 11a and 11 from the outer peripheral portion toward the central portion.
b are formed concentrically, and each wafer heating area 1
1a and 11b are first and second temperature controllers 1
Example 1 in that they are respectively connected to 2a and 12b.
Different from baking equipment by. Further, as is clear from FIGS. 5 and 6, the diameter of the hot plate 11 on which the semiconductor wafer 3 is coaxially held, that is, the first wafer heating region 11 located at the outermost portion of the hot plate 11 is located.
The outer diameter of a is also smaller than the diameter of the semiconductor wafer 3, which is also different from the baking apparatus according to the first embodiment. In other respects, it is the same as the above-mentioned baking apparatus, and therefore, in the following description, the same members are designated by the same reference numerals.

The polyimide resin 4 applied by spin coating
In the case of the present semiconductor wafer, the thickness of the first portion S ₁ from the outer peripheral edge to the center portion is about 1 mm.
Is about 30 μm, and the second portion S ₂ extending from the first portion S ₁ toward the center further by about 4 mm is about 18 μm.
And the third portion S ₃ surrounded by the _second portion S ₂ is about 15 μm.

The outer diameter of the first wafer heating area 11a is formed to be about 2 mm smaller than the diameter of the semiconductor wafer 3, and thus the first wafer heating area 11a is about 1 mm away from the outer peripheral edge of the semiconductor wafer 3 toward the center thereof. The portion S _{1 of} is not directly heated by the first wafer heating region 11a, but is heated by heat propagation from the _second portion S ₂ which is heated by the first wafer heating region 11a. . Therefore, the first portion S ₁ near the outer peripheral edge is heated at a lower temperature than the second portion S ₂ .

The diameter of the second wafer heating region 11b is smaller than the diameter of the semiconductor wafer 3 by about 10 mm. Therefore, the second portion S ₂ is heated by the first wafer heating area 11a and the third portion S ₃ is heated by the second wafer heating area 11b.

The first and second wafer heating regions 11a and 11b, which are prevented from interfering with each other by the heat insulating material 5, have the first and second temperature controllers 12a and 12 respectively.
The heating temperature is set by b so that the first wafer heating area 11a is higher in temperature than the second wafer heating area 11b. Thus, at lower temperatures towards the thicker coating portions polyimide resin 4, i.e., the direction of the second portion S ₂ at a temperature lower than the third section S _3, from the second portion S ₂ First portion S heated by heat transfer
₁ is heated at a temperature lower than that of the second portion S ₂ , respectively. In the case of this embodiment, the heating temperature is, for example, the first
The wafer heating area 11a is set to about 105 ° C., and the second wafer heating area 11b is set to about 125 ° C.

Also by the baking apparatus according to this embodiment, the first portion S ₁ having the thickest film thickness of the polyimide resin 4 spin-coated on the semiconductor wafer 3 has the lowest temperature and the second portion S _{2 having} the thinner thickness, Since the third portion S ₃ is heated at a higher temperature, the etching rate of the thin film formed by the heat treatment is the highest in the _first portion S ₁ and the second portion S 3.
₂ , it becomes lower as going to the third portion S ₃ .

Therefore, the semiconductor wafer 3 is coaxially held on the hot plate 11 having such a configuration and heated for, for example, 15 minutes, the polyimide resin 4 is heat-treated to form a thin film, and this is etched to form a contact hole. Also in the case of forming, the chip electrode is exposed in any part of the semiconductor wafer 3, which is good.

(Embodiment 3) FIG. 7 is a perspective view showing an essential part of a baking apparatus according to still another embodiment of the present invention.

As shown in the drawing, the hot plate 21 of the baking apparatus according to this embodiment has first, second and third wafer heating regions 21a, 21b formed concentrically from the outer peripheral portion toward the central portion. , 21c, first, second and third temperature timers 22a, 22 for adjusting the heat generation time of the respective wafer heating areas 21a, 21b, 21c.
This is different from the baking apparatus according to the first embodiment in that b and 22c are connected. Then, the semiconductor wafer 3 formed by the respective wafer heating areas 21a, 21b, 21c
The heating temperature for each is the same. In other respects, it is the same as the baking apparatus according to the first embodiment, and therefore, in the following description, the same members are designated by the same reference numerals.

Also in this embodiment, the thickness of the polyimide resin spin-coated on the semiconductor wafer 3 is about 1 mm from the outer peripheral edge toward the center of the first portion S ₁
Is about 30 μm, and the second portion S ₂ extending from the first portion S ₁ toward the center further by about 4 mm is about 18 μm.
And the third portion S ₃ surrounded by the _second portion S ₂ is about 15 μm.

The first temperature timer 22a provided in this baking apparatus heats the first wafer heating area 21a for a shorter time than the second temperature timer 22b, and the second temperature timer 22b functions as the third temperature timer. The second wafer heating area 21b is caused to generate heat for a shorter time than 22c. For example, in the case of the present embodiment, the heat generation time of the first wafer heating area 21a by the first temperature timer 22a is 10 minutes, and the heat generation time of the second wafer heating area 21b by the second temperature timer 22b is 12 minutes. , Third
The third wafer heating area 21c by the temperature timer 22c of
The heat generation time is 15 minutes. Therefore, the heating time of the polyimide resin heated by each of the wafer heating regions 21a, 21b, 21c depends on the semiconductor wafer 3
The outer peripheral portion of the semiconductor wafer 3 is shorter and the central portion thereof is longer. As a result, the semiconductor wafer 3 is heated at a lower temperature near the outer peripheral portion.

In this way, the first, second and third wafer heating regions 2 in which mutual heat interference is prevented by the heat insulating material 5 are provided.
1a, 21b and 21c are the first, second and third temperature timers 22a, 22b and 22c, respectively.
b so that the heating time is shorter than that of the second wafer heating area 21b.
The heating time is set so that the heating time is shorter than that.

The semiconductor wafer 3 placed on the hot plate 21 has the first, second and third wafer heating regions 21.
a, 21b, and 21c simultaneously start heating at the same temperature of 125 ° C., for example, 10 minutes later, heating by the first wafer heating area 21a and 2 minutes after that, heating by the second wafer heating area 21b, respectively. Be stopped. Then, after a further 3 minutes, the heating by the third wafer heating area 21c is stopped and the heating process is completed.

According to the baking apparatus of this embodiment,
Since the thickest part of the polyimide resin spin-coated on the semiconductor wafer 3 is heated for the shortest time and the thinner part is heated for a longer time, the etching rate of the thin film formed by the heat treatment is It becomes lower from the outer peripheral portion of the wafer 3 toward the central portion.

Therefore, even if the semiconductor wafer 3 is coaxially held by the hot plate 21 having such a structure and the polyimide resin is heat-treated to form a thin film, when this is etched to form a contact hole. Becomes a contact hole in which the chip electrode is exposed in any part of the semiconductor wafer 3.

(Embodiment 4) FIG. 8 is a perspective view showing essential parts of a baking apparatus according to still another embodiment of the present invention.

As shown in the drawing, the hot plate 31 of the baking apparatus according to this embodiment has a diameter smaller than that of the semiconductor wafer 3 to be heated and a single wafer heating area 31a.
Are formed. As described above, when the diameter of the semiconductor wafer 3 to be heated is relatively small, a single wafer heating area 31a is provided, and the temperature controller 32 heats the polyimide resin to a predetermined temperature such as 125 ° C. May be.

Even with such a baking apparatus, the etching rate of the polyimide resin spin-coated on the semiconductor wafer 3 becomes low in the outer peripheral portion, and the chip electrodes are exposed from any contact hole formed.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the embodiments and various modifications can be made without departing from the scope of the invention. Needless to say.

For example, according to this embodiment, the polyimide resin 4 which is a solution is spin-coated to form the semiconductor wafer 3
However, the method of applying the polyimide resin 4 is not limited to this, and as a result, the thickness after application becomes thicker on the outer peripheral portion of the semiconductor wafer 3. If you have.

In the present embodiment, the case where the present invention is applied to the passivation process which is one of the embodiments has been described. For example, a resist applied in a photoresist process for forming a predetermined circuit element on the semiconductor wafer 3. It can also be applied to liquid etching and the like. Needless to say, the applied solution is not limited to the polyimide resin 4.

Wafer heating regions 1a and 1b according to this embodiment
... are divided into two or three wafer heating areas having different heating temperatures or heating times, but the wafer heating areas 1a, 1b ... May be. Therefore, the wafer heating areas 1a, 1b ... Of the hot plates 1, 21 having a diameter of the semiconductor wafer 3 or more are provided at two or four or more locations, or continuously provided so that the temperature changes continuously. The wafer heating regions 11a, 11 of the hot plates 11, 31 having a smaller diameter than the semiconductor wafer 3 may be used.
b ... may be provided at three or more locations, or may be provided steplessly so that the temperature changes continuously.

Further, the wafer heating areas 1a, 1b ... Of the hot plates 1, 11 ... Shown in this embodiment.
Numerical values such as the thickness of the semiconductor wafer 3 or the applied polyimide resin 4 are merely examples of desirable embodiments. Therefore, each member can be set to various arbitrary dimensions without being restricted by these numerical values.

Then, the wafer heating areas 1a, 1b ...
Various heating sources such as an electric resistance heater other than the infrared heater can be used as the heating source provided in the hot plate 1, 11 ...
As for the holding method with respect to, it is possible to adopt proximity or the like in addition to vacuum adsorption.

[0065]

The effects obtained by the typical ones of the inventions disclosed in this application will be briefly described as follows.

(1) That is, according to the baking technique of the present invention, the heating temperature of the semiconductor wafer coated with the solution thicker toward the outer peripheral portion is increased toward the central portion, so that the heat treatment is performed. The etching rate of the formed film layers having a film thickness difference becomes higher toward the outer peripheral portion of the semiconductor wafer.

(2) Therefore, etching can be performed to a desired degree in any part of the film layer, and the part where the etching is insufficient can be eliminated, so that the throughput can be improved. Become.

(3) Further, since the etching rate of the thick portion is increased and the etching of the portion is quickly performed, the etching time can be shortened.

[Brief description of drawings]

FIG. 1 is a perspective view showing a main part of a baking apparatus according to a first embodiment of the present invention.

FIG. 2 is a sectional view taken along line II-II in FIG.

FIG. 3 is a plan view showing the baking apparatus of FIG.

FIG. 4 is a perspective view showing a main part of a baking apparatus according to a second embodiment of the present invention.

5 is a cross-sectional view taken along the line VV of FIG.

6 is a plan view showing the baking apparatus of FIG. 4. FIG.

FIG. 7 is a perspective view showing a main part of a baking apparatus according to a third embodiment of the present invention.

FIG. 8 is a perspective view showing a main part of a baking apparatus according to a fourth embodiment of the present invention.

[Explanation of symbols]

1 Hot Plate 1a First Wafer Heating Area 1b Second Wafer Heating Area 1c Third Wafer Heating Area 2a First Temperature Controller 2b Second Temperature Controller 2c Third Temperature Controller 3 Semiconductor Wafer 4 Polyimide Resin (Solution) ) 5 heat insulating material 11 hot plate 11a first wafer heating area 11b second wafer heating area 12a first temperature controller 12b second temperature controller 21 hot plate 21a first wafer heating area 21b second wafer heating area 21c Third wafer heating area 22a First temperature timer 22b Second temperature timer 22c Third temperature timer 31 Hot plate 31a Wafer heating area 32 Temperature controller S ₁ First part S ₂ Second part S ₃ Second Part 3

Claims (9)

[Claims] 1. A semiconductor wafer in which a predetermined solution is applied thicker toward the outer peripheral portion is prepared, and the heating temperature of the semiconductor wafer is increased to a higher temperature from the outer peripheral portion toward the central portion. A baking method characterized by performing a heat treatment. 2. A semiconductor wafer in which a predetermined solution is applied thicker toward the outer peripheral portion is prepared, and the semiconductor wafer is divided into a plurality of different temperature regions in which the temperature increases from the outer peripheral portion toward the central portion. A baking method comprising heating and subjecting the solution to a heat treatment. 3. A semiconductor wafer in which a predetermined solution is applied thicker toward the outer peripheral portion is prepared, and the semiconductor wafer is heated so that the heating time becomes longer from the outer peripheral portion toward the central portion, and the solution is heated. A baking method, characterized in that a heat treatment is applied to the. 4. A baking apparatus for heat-treating a semiconductor wafer coated with a predetermined solution, comprising a hot plate having a plurality of wafer heating regions having a high temperature region from an outer peripheral portion toward a central portion. A baking apparatus, wherein the semiconductor wafer is coaxially arranged on the hot plate, and the solution applied thicker toward the outer peripheral portion of the semiconductor wafer is subjected to heat treatment. 5. The plurality of wafer heating regions are composed of first, second, and third wafer heating regions from the outer peripheral portion toward the central portion, and the heating temperature by the first wafer heating region is about 105 ° C. The outer diameter is equal to or larger than the diameter of the semiconductor wafer, and the heating temperature by the second wafer heating region is about 12
At 0 ° C., the outer diameter is smaller than the diameter of the semiconductor wafer by about 2 mm, the heating temperature by the third wafer heating region is about 125 ° C., and the diameter is about 10 mm smaller than the diameter of the semiconductor wafer.
The baking apparatus according to claim 4, wherein the baking apparatus is formed to be small. 6. A baking device for heating a semiconductor wafer coated with a predetermined solution, comprising a hot plate having a plurality of wafer heating regions having a longer heating time from the outer peripheral portion toward the central portion. A baking apparatus, wherein the semiconductor wafer is coaxially arranged on the hot plate, and the solution applied thicker toward the outer peripheral portion of the semiconductor wafer is subjected to heat treatment. 7. The baking apparatus according to claim 4, wherein an outer diameter of the wafer heating region located at the outermost portion is smaller than a diameter of the semiconductor wafer to be heated. 8. The wafer heating region comprises first and second wafer heating regions from the outer peripheral portion toward the central portion,
The heating temperature by the first wafer heating area is about 105 ° C.
The outer diameter is smaller than the diameter of the semiconductor wafer by about 2 mm, and the heating temperature by the second wafer heating region is about 12 mm.
The baking apparatus according to claim 7, wherein the diameter of the semiconductor wafer is formed to be about 10 mm smaller than the diameter of the semiconductor wafer at 5 ° C. 9. A baking apparatus for heat-treating a semiconductor wafer coated with a predetermined solution, wherein a hot plate having a diameter smaller than that of the semiconductor wafer to be heated and having a single wafer heating region is provided. A baking apparatus, wherein the semiconductor wafer is coaxially arranged on the hot plate, and the solution applied thicker toward the outer peripheral portion of the semiconductor wafer is subjected to heat treatment.