JPH0810238B2 - Sweep circuit - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sweep circuit used for an oscilloscope or the like in the field of measurement equipment.

2. Description of the Related Art Conventionally, an oscilloscope having a plurality of sweep circuits generally includes a main sweep circuit and a delay sweep circuit.
The main sweep circuit generates a ramp signal in synchronization with the input bird. After the slope signal has a constant level, that is, after the delay time has elapsed, the delay sweep circuit operates and immediately starts the delay sweep, or the input bird starts the delay sweep in synchronization with the signal. In this way, the delayed sweep circuit produces a ramp signal. Delayed sweep can be observed only during the main sweep period to observe the phenomenon that occurred during the main sweep period at different sweep times.

In addition, the tilt signal generated from the main sweep circuit and the delayed sweep circuit is connected to the horizontal amplifier of the oscilloscope through a switch that can be switched at the repetition cycle of the main sweep signal, so that the sweep by the main sweep and the sweep by the delayed sweep are alternately switched to a cathode ray tube. Can be displayed. Further, during the main sweep period, by performing brightness modulation on the delayed sweep portion, the delayed sweep portion can be confirmed by the main sweep, and at the same time, the waveform can be enlarged and observed by the delayed sweep.

Problems to be Solved by the Invention However, in the above-described conventional example, the delay sweep is limited to one time with respect to the main sweep, and it is not possible to magnify and see waveforms at two or more locations during the main sweep period. There was a point.

The present invention solves such a conventional problem, in which delay sweep of n times is continuously performed during the main sweep period, and the display position of the cathode ray tube is moved in the vertical or horizontal direction one after another for display. An object of the present invention is to provide an excellent sweep circuit capable of stereoscopically confirming a waveform and displaying n sweep periods by brightness modulation in a waveform display period by a main sweep.

In order to achieve the above object, the present invention provides a hold-off circuit in the delay sweep circuit so that the delay sweep is repeatedly performed during the main sweep period, and the number of delay sweep sweeps is counted. A counting circuit and a D / A conversion circuit for D / A converting the numerical value are arranged to move the display position of the CRT vertically or horizontally. Further, during the delayed sweep period, the delayed sweep gate signal is connected to the Z-axis amplifier to perform brightness modulation so that the delayed sweep portion can be recognized even during the waveform display period by the main sweep.

Action The present invention has the following actions with the above-mentioned configuration. That is, the observed waveform after the delay time can be repeatedly displayed by delay sweep, and can be stereoscopically captured by moving the display position. Further, in the waveform display period by the main sweep, the delayed sweep portion is brightness-modulated, and it is possible to confirm which portion of the main sweep is the three-dimensional surface.
In particular, when observing a composite waveform of a video signal of a television or the like, line signals can be sequentially displayed three-dimensionally, which is effective for finding an abnormal signal and finding a phase shift of each line signal.

Embodiment FIG. 2 shows a circuit configuration of an oscilloscope having a typical delay sweep circuit. A vertical axis input 1 is connected to the vertical preamplifier 2. The input signal is amplified and delayed by the delay line 3, and becomes the input signal of the vertical amplifier 4. Here, the input signal is amplified to a voltage required to drive the vertical deflection plate of the cathode ray tube 31. A part of the input signal from the vertical preamplifier 2 is a signal switching circuit 6
It is connected to the. The signal switching circuit 6 has an input 5 for an external bird and switches a signal from the vertical preamplifier 2 to supply a synchronization signal to the main sweep circuit 7 and the delay sweep circuit 8. Reference numeral 7 is a main sweep circuit, which shapes the signal from the signal switching circuit 6 to generate a tilt signal in synchronization with this, and transmits it to the emitter of the transistor 19 through the resistor 13. Reference numeral 8 is a delay sweep circuit, which shapes the signal from the switching circuit 6 and generates a tilt signal synchronized with this. However, the main sweep circuit 7 is operated by the signal from the comparator 12 that compares the tilt signal from the main sweep circuit 7 and the reference voltage from the variable resistor 11.
The delayed sweep is stopped until the tilt signal generated from the reference voltage exceeds the reference voltage of the variable resistor 11. Moreover, the delayed sweep can also generate a ramp signal immediately at the output of the comparator 12. The ramp signal generated from the delay sweep circuit 8 is supplied to the emitter of the transistor 20 through the resistor 15.

The bistable flip-flop 10 inputs the sweep gate signal from the main sweep circuit 7 and inverts the state at the sweep end point. That is, the logical values of Q and of the flip-flop 10 change. The switches 9 and 30 are switches for resetting and setting the flip-flop 10, and set the state of the flip-flop 10 in preference to the CK input of the flip-flop 10. From the Q terminal of the flip-flop 10 through the vertical amplifier 4 and the resistor 16, the base of the transistor 18, and Z
It is connected to a part of the input of the axis amplifier 22. The vertical amplifier 4 moves the vertical position by the signal of the flip-flop 10. The transistor 18 controls the delay sweep gradient signal generated by the delay sweep circuit 8. The Z-axis amplifier 22 controls the brightness modulation operation. The flip-flop 10 is connected to the base of the transistor 17 through the resistor 14. The transistor 17 controls the main sweep gradient signal generated by the main sweep circuit 7. Transistors 17, 19 and transistors
The slope signals of the main sweep and the delayed sweep are alternately switched by 18 and 20 and transmitted to the input of the horizontal amplifier 21. The horizontal amplifier 21 amplifies the signals from the transistors 19 and 20 into the sweep signal required to drive the horizontal deflection plate of the cathode ray tube 25. The Z-axis amplifier 22 receives the gate signals of the main sweep circuit 7 and the delay sweep circuit 8 and the switching signal from the flip-flop 10 as input and controls the grid voltage of the cathode ray tube 25 to perform brightness modulation.

FIG. 3 is a waveform diagram showing the operation of FIG. a is the second
It is a reference voltage supplied from the variable resistor 11 in the figure. b shows the main sweep slope signal output from the main sweep circuit 7 of FIG. c is the main sweep circuit 7 and the delay sweep circuit 8 to Z
It is a gate signal connected to the shaft amplifier 22. d is the Q output voltage of the flip-flop 10 shown in FIG. e is a comparison voltage output from the comparator 12. f is a delay sweep slope signal output from the delay sweep circuit 8 in FIG. g is a delayed sweep gate signal connected from the delayed sweep circuit 8 to the Z-axis amplifier 22.

In this way, the main sweep slope signal is compared with 12 reference voltages, and the delay sweep circuit 8 starts to operate at the portion exceeding the reference voltage. The tilt signal of the main sweep and the tilt signal of the delayed sweep are tilt signals of the main sweep depending on the state of switch 9 or 30.
Alternate the main sweep slope signal and the delayed sweep slope signal for each main sweep cycle. Delayed sweep ramp signal. Are output to the input of the horizontal amplifier 21 and displayed on the cathode ray tube 25.

FIG. 1 is a circuit diagram showing an embodiment of the present invention.
It is a detailed diagram of the delay sweep circuit 8 of the figure. Terminal 31 is shown in Figure 3c.
Is connected to the base of the transistor 35 through the resistor 34. The collector of 35 is connected to the collector of transistor 47. The terminal 32 is applied with a waveform of the trigger signal supplied from the trigger signal switching circuit 6 of FIG. 2 to the delayed sweep circuit 8 and is connected to the clock terminal of the bi-stable flip-flop 36, that is, the delayed sweep gate input terminal. There is. An ON-OFF signal for operating the function of the present invention is input to the terminal 33 and is connected to the hold-off circuit 38. The terminal 59 is connected to e in FIG. 3, and is differentiated by the capacitor 60 and the resistor 61, and the differential signal is applied to the input of the NOR gate 39. 2 Q of stable flip-flop 36
Is connected through resistor 40 to the base of transistor 41. The emitter of the transistor 41 is grounded, and the collector is connected to a constant current source 42 and a time axis capacitor 43 supplied from a time axis circuit to generate a delay sweep gradient signal.
The ramp signal is connected to the gate of field effect transistor 44. The source of 44 forms a source follower by connecting to -Vb through the resistors 45 and 46 and the drain to + Va,
The impedance is converted, and the delayed sweep slope signal is output to the terminal 55. Terminal 55 is connected to resistor 15 from delay sweep circuit 8 in FIG.
Is supplied to the wire connected to. The connection point of the resistors 45 and 46 is connected to the base of the transistor 47.
The collector of transistor 47 is connected to the input of NOR39. The output of NOR39 is connected to the base of the transistor 47 through the resistor 50 and the diode 49, and the transistor 47 whose output of 39 is high level keeps the ON state. Output of NOR39 is 0
Pin 59 or hold-off circuit
The high level signal supplied from 38 is required. Reference numeral 51 is a counter, which is in an operating state when the input signal from the terminal 31 is 0 level, and is reset when the input signal is high level. The clock input of the counting circuit 51 receives the delayed sweep reference gate signal from Q of the bistable flip-flop 36 to perform the counting operation. The E input of the counting circuit 51 is a signal input for performing a counting operation according to an operation instruction from the terminal 33. 52 is a D / A converter, which converts the count value output of the counting circuit 51 into an analog quantity. Five
6 and 57 are D / A conversion output terminals, and D / A through resistors 53 and 54
A signal is provided at the output of the converter 52. The terminal 56 is connected to the terminal 24 in FIG. 2 and the terminal 57 is connected to the terminal 23 in FIG. Terminal
24 is connected to the vertical position adjustment circuit of the vertical lamp 4 and the terminal
Reference numeral 23 is connected to the horizontal position adjusting circuit of the horizontal amplifier 21, and moves the waveform display position of the cathode ray tube 25 by the output signal of the D / A converter 52. The hold-off circuit 38 uses the hold-off capacitor 37 to connect the Q of the flip-flop 36.
The output is set to 0 after T _H elapses from the time when the output becomes high level. The operation can be stopped by an instruction from the terminal 33.

With the above configuration, when the operation start instruction of the present invention is given from the terminal 33, the hold-off circuit 38 and the counting circuit 51 start operating. When a signal indicating that the main sweep is started is applied from the terminal 31, the transistor 35 is turned off and the counting circuit 51 is turned on. At this time, when a positive pulse is applied from the terminal 59, the output of NOR39 becomes 0 and the flip-flop 36
Enters the standby state for the waveform-shaped trigger signal. At this time, if a signal is input from the terminal 32, the output of the flip-flop 36 is inverted and the Q output becomes 0. Therefore, the transistor 41 is turned off, and the delayed sweep reference inclination signal is output to the terminal 55. When the tilt signal reaches a certain level, the transistor 47 is turned on and the output of the NOR 39 becomes high level, and this state is maintained. Then flip-flop 36
Is set and the tilt signal returns to the original level, but the transistor 47 remains ON. Further, the counting circuit 51 carries out one counting operation, and the D / A converter 52 outputs a constant voltage. As a result, the waveform display position of the cathode ray tube is moved.
Further, the hold-off circuit 38 operates to set the output of NOR 39 to "0" after T _{H has} elapsed. As a result, the flip-flop 36 enters a waiting state for the waveform-shaped trigger signal and repeats the above operation.

The above operation is repeated during the main sweep period, and the display position of the cathode ray tube is moved one after another. FIG. 4 is a waveform diagram showing the above operation. 4 h is the reference potential of the variable resistor 11 of FIG. 2, i of FIG. 4 is the main sweep waveform of the main sweep circuit 7 of FIG. 2,
In FIG. 4, j is the delayed sweep reference gradient signal waveform at the terminal 55 in FIG. 1, k in FIG. 4 is the flip-flop 36Q output waveform in FIG. 1, and l in FIG. 4 is the D / A conversion in FIG. The output voltage of the device 52 is shown.

As described above, in the above-described embodiment, the delay sweep signal is successively operated within the main sweep period width by the circuit shown in FIGS. 1 and 2, and the waveform can be displayed by moving the display position of the cathode ray tube. Therefore, the waveform can be displayed three-dimensionally. Further, by connecting the terminal 63 in FIG. 1 to the Z-axis amplifier 22 in FIG. 2, luminance modulation can be applied only in the delayed sweep period in the main sweep period. Furthermore, the switches 9 and 30 in FIG.
In this state, the three-dimensional display of the main sweep and the delayed sweep to which the brightness modulation is applied can be alternately displayed on the surface of the cathode ray tube. This allows the observer to know which part of the waveform displayed by the main sweep is stereoscopically displayed. FIG. 5 shows a display state of the above waveform.

EFFECTS OF THE INVENTION As is apparent from the above-described embodiments, the present invention is a Z-axis amplifier that performs brightness modulation according to a delayed sweep period, a hold-off circuit that repeatedly sweeps delayed sweep, and a counting circuit that counts the sweep circuit of delayed sweep. , And the D / A conversion output of this counting circuit is used as a part of the position adjustment input voltage of the vertical or horizontal amplifier of the cathode ray tube. Therefore, a delayed sweep is performed multiple times for one main sweep. Thus, each waveform can be displayed three-dimensionally on the surface.

[Brief description of drawings]

1 is a circuit diagram of a sweep circuit according to an embodiment of the present invention, FIG. 2 is a block diagram of a general oscilloscope, FIG. 3 is a signal waveform diagram of FIG. 2, and FIG. 4 is a signal waveform of FIG. Figure, fifth
The drawing is a tube view according to this embodiment. 35 …… transistor, 36 …… 2 stable flip-flop,
38 …… Hold-off circuit, 39 …… NOR circuit, 41 …… Transistor, 42 …… Current source, 44 …… Field effect transistor, 47 …… Transistor, 49 …… Diode, 51 …… Counting circuit, 52 …… D / A converter.

Claims (1)

[Claims] 1. A main sweep circuit for sweeping on the surface of a cathode ray tube according to a trigger signal, a delay sweep circuit for sweeping on the surface of the tube by delaying the main sweep by a desired time, and a luminance according to the delay sweep period. A Z-axis amplifier for modulation, a hold-off circuit for repeatedly sweeping the delayed sweep, a counting circuit for counting the number of sweeps of the delayed sweep, and a signal of this counting circuit for D /
Equipped with a D / A conversion circuit for A conversion and a vertical and horizontal position adjustment circuit that moves the display position of the cathode-ray tube according to the output of this D / A conversion circuit. Sweep circuit characterized by changing.