JPH079961B2 - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPH079961B2 JPH079961B2 JP63127308A JP12730888A JPH079961B2 JP H079961 B2 JPH079961 B2 JP H079961B2 JP 63127308 A JP63127308 A JP 63127308A JP 12730888 A JP12730888 A JP 12730888A JP H079961 B2 JPH079961 B2 JP H079961B2
- Authority
- JP
- Japan
- Prior art keywords
- resin material
- semiconductor device
- resin
- island portion
- lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は樹脂封止形半導体装置に関し、特に半導体素子
搭載用のアイランド部および該素子にワイヤ接続される
内部リード部を有する複数のリードフレームからなりか
つこれらアイランド部と内部リード部が封止樹脂材で一
体的に樹脂封止されるリードフレーム枠体の改良に関す
る。The present invention relates to a resin-sealed semiconductor device, and more particularly to a plurality of lead frames each having an island portion for mounting a semiconductor element and an internal lead portion wire-connected to the element. The present invention relates to an improvement of a lead frame body which is made of and is integrally resin-sealed with an encapsulation resin material for these island portions and internal lead portions.
従来この種の樹脂封止形半導体装置は、概略第３図に示
すような構成とされていた。これを簡単に説明すると、
図中符号１は半導体素子で、この半導体素子１は、素子
搭載用アイランド部２の素子搭載面2a上にろう材等の接
合材で固着して設けられている。３は半導体素子１の周
囲に配列される複数本のリードフレームで、その内部リ
ード部3aの内方端に対し前記半導体素子１の各電極端子
（図示せず）から引出されたワイヤ４がボンディング用
金属メッキ等を介して接続されている。５はこれら半導
体素子１、ワイヤ４、リードフレーム３の内部リード部
3aなどを封止樹脂材により一体的に樹脂封止してなるパ
ッケージ本体で、このパッケージ本体５の側方から前記
リードフレーム３の外部リード部3bが外部に露呈するよ
うに引出され、これら外部リード部3bによって半導体素
子１が図示しない外部端子側に外部接続される。Conventionally, this type of resin-encapsulated semiconductor device has a structure as schematically shown in FIG. To explain this briefly,
In the figure, reference numeral 1 is a semiconductor element, and the semiconductor element 1 is fixedly provided on the element mounting surface 2a of the element mounting island portion 2 with a bonding material such as a brazing material. Reference numeral 3 denotes a plurality of lead frames arranged around the semiconductor element 1. Wires 4 drawn from electrode terminals (not shown) of the semiconductor element 1 are bonded to the inner ends of the inner lead portions 3a. Are connected via metal plating or the like. Reference numeral 5 is an internal lead portion of the semiconductor element 1, the wire 4, and the lead frame 3.
A package body formed by integrally sealing 3a and the like with a sealing resin material, and external lead portions 3b of the lead frame 3 are drawn out from the sides of the package body 5 so as to be exposed to the outside. The semiconductor element 1 is externally connected to an external terminal side (not shown) by the lead portion 3b.
そして、このような樹脂封止形半導体装置において、半
導体素子１、ワイヤ４等は封止樹脂材によって外部環境
から保護されており、また使用時はパッケージ本体５か
ら外部に延設されているリードフレーム３の外部リード
部3bから電気信号が入力され、ワイヤ４を通って半導体
素子１に導かれ、この素子１で所定の処理が行なわれて
再びワイヤ４を通ってリードフレーム３から外部に出力
されるように動作する。In such a resin-encapsulated semiconductor device, the semiconductor element 1, the wire 4, etc. are protected from the external environment by the encapsulating resin material, and the leads extending from the package body 5 to the outside during use. An electric signal is input from the external lead portion 3b of the frame 3, is guided to the semiconductor element 1 through the wire 4, is subjected to predetermined processing by the element 1, and is output again from the lead frame 3 through the wire 4 again. Works as it is.
ところで、このような樹脂封止形半導体装置において素
子搭載用のアイランド部２および内、外リード部3a,3b
からなる複数のリードフレーム３は、第４図から明らか
なように、外枠6aや接続用リブ（アイランド部２を支持
する支持リブを図中6bで示す）等によって一体的に構成
されたリードフレーム枠体６として構成される。そし
て、このような枠体６に対し、半導体素子１を搭載しか
つ該素子１と内部リード部3aとのワイヤ４による電気的
な接続を行なうとともにこれらを封止樹脂材で樹脂封止
することでパッケージ本体５が成形され、しかる後外部
リード部4bの折曲げ加工などと共に、外枠6a等の切断、
切離し加工などが行なわれ、これにより樹脂封止形半導
体装置が形成されるようになっている。なお、上述した
パッケージ本体５を成形するトランスファ成形は、通常
180℃前後の温度条件によって行なわれる。By the way, in such a resin-encapsulated semiconductor device, the element mounting island portion 2 and the inner and outer lead portions 3a, 3b are provided.
As shown in FIG. 4, the plurality of lead frames 3 each of which is composed of a lead integrally formed by an outer frame 6a and connecting ribs (support ribs for supporting the island portion 2 are shown by 6b in the figure) and the like. It is configured as a frame body 6. Then, the semiconductor element 1 is mounted on the frame body 6 and the element 1 and the internal lead portion 3a are electrically connected by the wire 4, and these are resin-sealed with a sealing resin material. The package body 5 is molded with, and then the outer lead portion 4b is bent and the outer frame 6a is cut,
Separation processing or the like is performed, and thereby a resin-sealed semiconductor device is formed. The transfer molding for molding the package body 5 described above is usually performed.
It is performed under the temperature condition of around 180 ° C.
ところで、このような従来の樹脂封止形半導体装置によ
れば、その構成部品や使用材料間でそれぞれの線膨張係
数に差があり、特に封止樹脂材によるパッケージ本体５
における線膨張係数は、他の構成部品や形成材料などの
線膨張係数に比べて大きいことから、この装置をプリン
ト配線基板などに実装する場合などにおいて、その温度
変化により装置各部分に引張り、圧縮、曲げなどの複雑
な応力が発生するという問題を生じている。このような
応力は装置各部分での角部や端部等に集中し、封止樹脂
材と他の構成部品や形成材料との界面での剥離現象を招
いたり、その応力の集中度合がより一層増大することで
封止樹脂材によるパッケージ本体５にクラック等が発生
するといった問題があった。たとえばパッケージ本体５
を形成する封止樹脂材は20×10-6／℃前後であるが、シ
リコンを用いた半導体素子１は2.3×10-6／℃、さらに4
2アロイによるアイランド部２や内部リード部3aを有す
るリードフレーム３は、3.5×10-6／℃程度であり、特
にこの封止樹脂材と他の各部との間での差が大きい。By the way, according to such a conventional resin-encapsulated semiconductor device, there is a difference in the coefficient of linear expansion between the constituent parts and the materials used, and particularly, the package body 5 made of the encapsulating resin material.
Since the coefficient of linear expansion in (1) is larger than the coefficient of linear expansion of other components and forming materials, when this device is mounted on a printed wiring board, etc. However, there is a problem that complicated stress such as bending occurs. Such stress concentrates on the corners and edges of each part of the device, leading to delamination at the interface between the encapsulating resin material and other components and forming materials, and the degree of concentration of the stress is greater. There is a problem that cracks and the like occur in the package body 5 due to the sealing resin material due to the further increase. For example, package body 5
The encapsulating resin material that forms the film is around 20 × 10 -6 / ° C, but the semiconductor element 1 using silicon has a density of 2.3 × 10 -6 / ° C.
The lead frame 3 having the island portion 2 and the internal lead portion 3a formed by the two-alloy is about 3.5 × 10 −6 / ° C., and the difference between the sealing resin material and other portions is particularly large.
そして、このような従来装置において、特にリード形状
がガルウィング型やＪリード型である表面実装型の半導
体装置では、実装時に装置全体が昇温されるものであ
り、しかも封止樹脂材の線膨張係数は半導体素子１やア
イランド部２を形成する材料に比べて充分に大きいの
で、温度上昇により膨張現象が生じると、実装前の保管
中に水分を吸収し吸湿状態となって接合力が弱くなって
いるアイランド部裏面2bと封止樹脂材との間などに剥離
現象（図中７で剥離部を示す）が生じ、第３図中想像線
で示すようにクラック８が発生するという問題があり、
これらの問題点を一掃し得る何らかの対策を講じること
が望まれている。In such a conventional device, particularly in a surface mounting type semiconductor device in which the lead shape is a gull wing type or a J lead type, the temperature of the entire device is raised during mounting, and the linear expansion of the sealing resin material is also caused. Since the coefficient is sufficiently larger than that of the material forming the semiconductor element 1 and the island portion 2, if the expansion phenomenon occurs due to the temperature rise, it absorbs moisture during storage before mounting and becomes a moisture absorbing state, and the bonding strength becomes weak. There is a problem in that a peeling phenomenon (the peeling portion is shown by 7 in the figure) occurs between the back surface 2b of the island portion and the sealing resin material and a crack 8 occurs as shown by an imaginary line in FIG. ,
It is desired to take some measures that can eliminate these problems.
本発明はこのような事情に鑑みてなされたもので、装置
実装時などにおける温度変化や吸湿後の熱ストレスの印
加時においても、パッケージ本体を構成する封止樹脂材
でのクラックの発生を防止し得るようにした樹脂封止形
半導体装置を得ることを目的としている。The present invention has been made in view of such circumstances, and prevents the occurrence of cracks in the encapsulating resin material that constitutes the package body even when the temperature changes during device mounting or the application of thermal stress after moisture absorption. It is an object of the present invention to obtain a resin-encapsulated semiconductor device that can be manufactured.
このような要請に応えるために本発明に係る樹脂封止形
半導体装置は、半導体素子搭載用のアイランド部の樹脂
封止材と接する裏面部を、加工可能な限りの最密千鳥格
子状を呈する凹凸面形状で形成し、該封止樹脂材と接す
る比表面積を、従来のような単純な平坦面形状である場
合よりも少なくとも60％以上に増大させ、封止樹脂材と
の間での密着力を増大させ得るように構成したものであ
る。In order to meet such a demand, the resin-sealed semiconductor device according to the present invention has a backside portion of the island portion for mounting the semiconductor element, which is in contact with the resin sealing material, in a densest zigzag pattern as long as it can be processed. The specific surface area formed by presenting the uneven surface shape and contacting with the sealing resin material is increased to at least 60% or more as compared with the case of the conventional simple flat surface shape. It is configured to increase the adhesion.
本発明によれば、リードフレーム枠体を構成するアイラ
ンド部の封止樹脂材と接する裏面部の比表面積を、加工
可能な限り増大させるように構成しているため、アイラ
ンド部裏面部と封止樹脂材との間の密着力を増大させる
ことが可能で、これにより実装時の温度上昇や吸湿後の
熱ストレス印加時において、特にアイランド部裏面部と
封止樹脂材との間の剥離現象を抑制し、パッケージ本体
でのクラックの発生を防止し得るものである。According to the present invention, the specific surface area of the back surface portion of the island portion constituting the lead frame frame, which is in contact with the sealing resin material, is configured to be increased as much as possible. It is possible to increase the adhesive force with the resin material, which prevents the phenomenon of peeling between the back surface of the island part and the encapsulating resin material when the temperature rises during mounting or when heat stress is applied after moisture absorption. It is possible to suppress the occurrence of cracks in the package body.
第１図および第２図は本発明に係る樹脂封止形半導体装
置の一実施例を示すものであり、これらの図において前
述した第３図および第４図と同一または相当する部分に
は同一番号を付してその説明は省略する。FIGS. 1 and 2 show an embodiment of a resin-sealed semiconductor device according to the present invention. In these figures, parts identical to or corresponding to those in FIGS. 3 and 4 described above are identical. A number is attached and the description is omitted.
さて、本発明によれば、前述したような樹脂封止形半導
体装置において、半導体素子１搭載用のアイランド部２
における裏面2bやリードフレーム３の内部リード部3a
（本実施例ではアイランド部裏面2bのみを例示してい
る）を、第１図および第２図から明らかなように、加工
可能な限りの最密千鳥格子状を呈する凹凸面形状（図中
符号10で示す）に形成し、該封止樹脂材と接する比表面
積を、加工可能な限り（従来のような単純な平坦面形状
である場合よりも少なくとも60％以上に）増大させ、封
止樹脂材との間での密着力を増大させ得るように構成し
たところに特徴を有している。Now, according to the present invention, in the resin-sealed semiconductor device as described above, the island portion 2 for mounting the semiconductor element 1 is mounted.
On the back surface 2b and the inner lead portion 3a of the lead frame 3
As is clear from FIGS. 1 and 2, (in this embodiment, only the back surface 2b of the island portion is illustrated), the shape of the uneven surface having the closest zigzag lattice shape (in the drawing) (Denoted by reference numeral 10), and the specific surface area in contact with the sealing resin material is increased as much as possible (at least 60% or more as compared with the case of the conventional simple flat surface shape), and sealing is performed. It is characterized in that it is configured so as to increase the adhesion force with the resin material.
ここで、本実施例では、上述した凹凸面形状10を、第１
図から明らかなように、千鳥格子形状を呈するエッチン
グパターンで構成した場合を例示し、その凸部を図中10
aで示している。そして、このような千鳥格子形状のエ
ッチングパターンにおいて、格子間隔a,bおよび格子辺
長さｃを、加工可能な限り最小とすることにより、また
エッチング深さｄをアイランド部２の厚みに近づけてい
くことにより、エッチング部分での凹部内側の側面積が
大きくなるもので、この側面積の総和分だけ接合面積が
増大することは容易に理解されよう。たとえば10mm×6m
mのアイランド部２において、その裏面2bをエッチング
により最密千鳥格子状を呈する凹凸面形状10とした場合
の面積増加率は、以下の通りである。すなわち、最小正
方形である格子辺長さｃ（mm）である場合に、格子の総
数ｎは、 となる。また、このような凹凸面による溝側面積Ｓは、 Ｓ＝４×ｎ×ｄ×ｃ であり、また凹凸面のない溝無し面積は、６×10＝60mm
2となるため、面積増加率Ｚは、 となる。Here, in this embodiment, the above-mentioned uneven surface shape 10 is
As is clear from the figure, an example is shown in which the etching pattern has a zigzag pattern, and the protrusions are shown in FIG.
It is indicated by a. Then, in such a zigzag lattice-shaped etching pattern, the lattice spacings a and b and the lattice side length c are minimized as much as possible to make the etching depth d close to the thickness of the island portion 2. It can be easily understood that the side area inside the concave portion in the etched portion is increased by the increase and the joint area is increased by the total of the side areas. For example, 10mm × 6m
The area increase rate when the back surface 2b of the m island portion 2 is etched to form the uneven surface shape 10 having a close-packed houndstooth check pattern is as follows. That is, when the lattice side length c (mm) is the smallest square, the total number n of lattices is Becomes Further, the groove side area S due to such an uneven surface is S = 4 × n × d × c, and the grooveless area without the uneven surface is 6 × 10 = 60 mm
2. Therefore, the area increase rate Z is Becomes
最密千鳥格子の一辺の長さｃが0.2mm、エッチング深さ
ｄが0.075mmとすると、 一辺の長さｃが0.1mm、エッチング深さｄが0.075mmとす
ると、 の面積増加率となる。If the length c of one side of the closest zigzag lattice is 0.2 mm and the etching depth d is 0.075 mm, If the side length c is 0.1 mm and the etching depth d is 0.075 mm, Area increase rate.
そして、このような構成によれば、アイランド部裏面2b
と封止樹脂材（パッケージ本体５）との接着面積が、従
来に比べて充分に大きくなるため、界面接合力が強化さ
れ、また第２図に示すようなアイランド部裏面2bでのデ
ィンプル形状によって、実装時の温度上昇の際の発生応
力が分散されることにより、実装時に厳しい熱ストレス
が装置全体に印加されたとしても、アイランド部裏面2b
と封止樹脂材側との剥離現象を抑制することができ、こ
れによりパッケージ本体５でのクラックの発生を適切か
つ確実に防止し得る。すなわち、アイランド部裏面2bの
ディンプル形状による接着面積増加率とパッケージ本体
５のクラック発生率との関係を、第５図に示しており、
面積増加率が約60％以上であれば、クラックの発生率
が、従来のような凹凸のない単純な平坦面である場合に
比べて十分に小さくなることが理解されよう。Then, according to such a configuration, the back surface 2b of the island portion
Since the bonding area between the sealing resin material and the package resin material (package body 5) is sufficiently larger than in the past, the interfacial bonding force is strengthened, and the dimple shape on the back surface 2b of the island portion as shown in FIG. Since the stress generated when the temperature rises during mounting is dispersed, even if severe thermal stress is applied to the entire device during mounting, the backside of the island 2b
It is possible to suppress the peeling phenomenon between the sealing resin material side and the sealing resin material side, and thereby to appropriately and surely prevent the occurrence of cracks in the package body 5. That is, FIG. 5 shows the relationship between the rate of increase in the adhesion area due to the dimple shape on the back surface 2b of the island portion and the rate of cracks occurring in the package body 5,
It will be understood that when the area increase rate is about 60% or more, the crack occurrence rate is sufficiently smaller than that in the case of a conventional simple flat surface having no unevenness.
さらに、このようにクラックの発生を適切かつ確実に防
止できることにより、本発明による樹脂封止形半導体装
置では、その耐湿性を必要かつ充分な状態で維持するこ
とが可能で、これにより装置信頼性を向上させ得るもの
である。Further, by appropriately and surely preventing the occurrence of cracks in this manner, the resin-sealed semiconductor device according to the present invention can maintain its moisture resistance in a necessary and sufficient state, thereby improving device reliability. Can be improved.
なお、本発明は上述した実施例構造に限定されず、樹脂
封止形半導体装置としての各部の形状、構造等を、適宜
変形、変更することは自由で、種々の変形例が考えられ
よう。たとえば上述した実施例では、リードフレーム枠
体６においてアイランド部裏面2bにのみ千鳥格子形状の
パターン加工を施して凹凸面形状10を形成したが、内部
リード部4a側にも同様あるいはこれに類似する加工を施
すようにしてもよく、これによりこの内部リード部4aと
封止樹脂材との接着面積を増大させ、装置全体の耐熱ス
トレス性や耐湿性を向上させ得る等の利点を奏すること
が可能となる。It should be noted that the present invention is not limited to the structure of the embodiment described above, and the shape, structure, etc. of each part of the resin-encapsulated semiconductor device can be freely modified or changed, and various modifications can be considered. For example, in the above-described embodiment, the uneven surface shape 10 is formed by performing the staggered pattern on only the back surface 2b of the island portion in the lead frame frame 6, but the same or similar to the internal lead portion 4a side. May be subjected to processing, thereby increasing the bonding area between the internal lead portion 4a and the sealing resin material, and it is possible to improve the heat stress resistance and moisture resistance of the entire device. It will be possible.
以上説明したように本発明に係る樹脂封止形半導体装置
によれば、半導体素子搭載用のアイランド部の樹脂封止
材と接する裏面部を、加工可能な限りの最密千鳥格子状
を呈する凹凸面形状で形成し、該封止樹脂材と接する比
表面積を、従来のような単純な平坦面形状である場合よ
りも少なくとも60％以上に増大させるように構成したの
で、簡単かつ安価な構成にもかかわらず、リードフレー
ム枠体を構成するアイランド部の封止樹脂材と接する裏
面部の比表面積を、従来に比べて加工可能な限り増大さ
せ、これによりアイランド部裏面部と封止樹脂材との間
での接合強度を確保し高い密着性を確保することが可能
で、その結果従来のような装置実装時の温度変化や吸湿
後の熱ストレス印加時などにおける封止樹脂材によるパ
ッケージ本体でのクラック発生等といった問題を適切か
つ確実に防止し、装置信頼性を向上させることができる
という種々優れた効果がある。As described above, according to the resin-encapsulated semiconductor device of the present invention, the back surface portion of the island portion for mounting the semiconductor element, which is in contact with the resin encapsulant, has a close-packed zigzag pattern as long as it can be processed. Since it is formed in an uneven surface shape and the specific surface area in contact with the sealing resin material is increased to at least 60% or more as compared with the case of the conventional simple flat surface shape, a simple and inexpensive structure Nevertheless, the specific surface area of the back surface that contacts the encapsulating resin material of the island portion that constitutes the lead frame frame is increased as much as possible compared to the conventional method, and as a result, the back surface of the island portion and the encapsulating resin material are increased. It is possible to secure the bonding strength between the package and the package, and to ensure high adhesion. As a result, the package body made of the encapsulating resin material when the temperature changes during device mounting and thermal stress after moisture absorption as in the past. In The problem rack occurrence appropriately and reliably prevented, there are a variety excellent effect that it is possible to improve the device reliability.
第１図は本発明に係る樹脂封止形半導体装置の一実施例
を示すリードフレーム枠体を構成するアイランド部裏面
の要部平面図、第２図はその装置全体の概略断面図、第
３図および第４図は従来例を示す装置全体の概略断面図
およびこれに用いるリードフレーム枠体を示す概略平面
図、第５図は本発明によるクラック防止効果を説明する
ための面積増加率とクラック発生率との関係を示す特性
図である。 １……半導体素子、２……アイランド部、2a……素子搭
載面、2b……裏面、３……リードフレーム、3a……内部
リード部、４……ワイヤ、５……封止樹脂材によるパッ
ケージ本体、６……リードフレーム枠体、10……凹凸面
形状。FIG. 1 is a plan view of an essential part of the back surface of an island portion constituting a lead frame frame showing an embodiment of a resin-sealed semiconductor device according to the present invention. FIG. 2 is a schematic sectional view of the entire device, and FIG. FIG. 4 and FIG. 4 are a schematic cross-sectional view of the entire apparatus showing a conventional example and a schematic plan view showing a lead frame frame body used for it, and FIG. 5 is an area increase rate and cracks for explaining a crack prevention effect according to the present invention. It is a characteristic view which shows the relationship with an incidence. 1 ... Semiconductor element, 2 ... Island portion, 2a ... Element mounting surface, 2b ... Back surface, 3 ... Lead frame, 3a ... Internal lead portion, 4 ... Wire, 5 ... Sealing resin material Package body, 6 ... Lead frame frame, 10 ... Uneven surface shape.
フロントページの続き (56)参考文献 特開 昭61−123162（ＪＰ，Ａ) 特開 昭61−185955（ＪＰ，Ａ) 特開 昭62−210658（ＪＰ，Ａ)Continuation of the front page (56) References JP-A-61-123162 (JP, A) JP-A-61-185955 (JP, A) JP-A-62-210658 (JP, A)
Claims (1)
半導体素子側にワイヤ接続されるリードフレームを構成
する内部リード部とを封止樹脂材により樹脂封止してな
る樹脂封止形半導体装置において、 前記封止樹脂材と接するアイランド部の裏面部を、最密
千鳥格子状を呈する凹凸面形状で形成し、該封止樹脂材
と接する比表面積を、平坦面形状である場合よりも少な
くとも60％以上に増大させたことを特徴とする樹脂封止
形半導体装置。1. A resin-encapsulated semiconductor device in which an island portion on which a semiconductor element is mounted and an internal lead portion constituting a lead frame wire-connected to the semiconductor element side are resin-sealed with a sealing resin material. In the above, the back surface of the island portion in contact with the sealing resin material is formed in an uneven surface shape exhibiting a close-packed houndstooth pattern, and the specific surface area in contact with the sealing resin material is larger than that in the case of a flat surface shape. A resin-sealed semiconductor device characterized by being increased to at least 60% or more.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63127308A JPH079961B2 (en) | 1988-05-25 | 1988-05-25 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63127308A JPH079961B2 (en) | 1988-05-25 | 1988-05-25 | Resin-sealed semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01296653A JPH01296653A (en) | 1989-11-30 |
| JPH079961B2 true JPH079961B2 (en) | 1995-02-01 |
Family
ID=14956734
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63127308A Expired - Fee Related JPH079961B2 (en) | 1988-05-25 | 1988-05-25 | Resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH079961B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106876359A (en) * | 2015-11-05 | 2017-06-20 | 新光电气工业株式会社 | Lead frame and its manufacture method, semiconductor device |
| CN106981470A (en) * | 2015-10-23 | 2017-07-25 | 新光电气工业株式会社 | Lead frame and its manufacture method |
| CN107068643A (en) * | 2015-10-16 | 2017-08-18 | 新光电气工业株式会社 | Lead frame and its manufacture method, semiconductor device |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4931835B2 (en) * | 2008-01-16 | 2012-05-16 | 株式会社デンソー | Semiconductor device |
| JP2024099856A (en) * | 2021-03-25 | 2024-07-26 | ローム株式会社 | Semiconductor device and manufacturing method for semiconductor device |
-
1988
- 1988-05-25 JP JP63127308A patent/JPH079961B2/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107068643A (en) * | 2015-10-16 | 2017-08-18 | 新光电气工业株式会社 | Lead frame and its manufacture method, semiconductor device |
| CN107068643B (en) * | 2015-10-16 | 2021-12-14 | 新光电气工业株式会社 | Lead frame, method of manufacturing the same, and semiconductor device |
| CN106981470A (en) * | 2015-10-23 | 2017-07-25 | 新光电气工业株式会社 | Lead frame and its manufacture method |
| CN106876359A (en) * | 2015-11-05 | 2017-06-20 | 新光电气工业株式会社 | Lead frame and its manufacture method, semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01296653A (en) | 1989-11-30 |
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